ARM: DT: tegra: Add Colibri T20 512MB COM
Subsystems (3)
PATCH 1/2 ARM: DT: tegra: Add Colibri T20 512MB COM
This adds the device tree include file for the Toradex Colibri T20 Computer on Module (COM). It's only valid for the 512MB RAM version of the module, as the 256MB version needs different EMC tables and flash configuration. To make this clear the suffix -512 was added to the board compatible string.
The Colibri T20 uses a Tegra2 SoC and has onboard USB Ethernet and AC97 sound.
Still some things like onboard NAND support missing, but should be a good base for further development.
--- Documentation/devicetree/bindings/arm/tegra.txt | 1 + arch/arm/boot/dts/tegra20-colibri-512.dtsi | 505 ++++++++++++++++++++++++ 2 files changed, 506 insertions(+) create mode 100644 arch/arm/boot/dts/tegra20-colibri-512.dtsi
Documentation/devicetree/bindings/arm/tegra.txt +1 -0
@@ -30,3 +30,4 @@ board-specific compatible values: nvidia,seaboard nvidia,ventana nvidia,whistler + toradex,colibri_t20-512
arch/arm/boot/dts/tegra20-colibri-512.dtsi new file +505 -0
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Signature · 1 line
1.8.0.2
PATCH 2/2 ARM: DT: tegra: Add Toradex Iris carrier board with T20 512MB COM
This adds the device tree for the Toradex Iris carrier board used together with a Colibri T20 512MB COM.
The Iris has the following features, in brackets the current status:
- DVI and VGA output through DVI-I connector (DVI-D enabled and tested)
- LVDS output
- 1 USB host port (enabled and tested)
- 1 USB OTG port (enabled)
- 100 MBit Ethernet (enabled and tested)
- 5 UART ports (2 on 10way headers enabled and tested)
- 1 MicroSD Slot (enabled and tested)
- Audio connectors (enabled, only HP out and Line-in tested)
- i2c RTC
- GPIO connector (enabled, only sparsely tested)
- external i2c bus
- 4 PWM out
- analog in
--- Documentation/devicetree/bindings/arm/tegra.txt | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/tegra20-iris-512.dts | 88 +++++++++++++++++++++++++ 3 files changed, 90 insertions(+) create mode 100644 arch/arm/boot/dts/tegra20-iris-512.dts
Documentation/devicetree/bindings/arm/tegra.txt +1 -0
@@ -31,3 +31,4 @@ board-specific compatible values: nvidia,ventana nvidia,whistler toradex,colibri_t20-512 + toradex,iris
arch/arm/boot/dts/Makefile +1 -0
@@ -134,6 +134,7 @@ dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \ sun5i-a13-olinuxino.dtb dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ + tegra20-iris-512.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ tegra20-plutux.dtb \
arch/arm/boot/dts/tegra20-iris-512.dts new file +88 -0
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1.8.0.2
PATCH 2/2 ARM: DT: tegra: Add Toradex Iris carrier board with T20 512MB COM
arch/arm/boot/dts/tegra20-iris-512.dts
Quoted 6 lines · Lucas Stach
This adds the device tree for the Toradex Iris carrier board used together with a Colibri T20 512MB COM.
arch/arm/boot/dts/tegra20-iris-512.dts +1
-0+ board_regulators {
Similarly, name that node just regulators
arch/arm/boot/dts/tegra20-iris-512.dts line 67
Quoted 3 lines
arch/arm/boot/dts/tegra20-iris-512.dts +3
-0+ compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>;
Those properties will then already exist, so no need to duplicate them here.
arch/arm/boot/dts/tegra20-iris-512.dts line 69
Quoted 1 line
arch/arm/boot/dts/tegra20-iris-512.dts +1
-0+ usb_host_vbus {
That would be regulator at 3
arch/arm/boot/dts/tegra20-iris-512.dts line 71
Quoted 2 lines
arch/arm/boot/dts/tegra20-iris-512.dts +2
-0+ compatible = "regulator-fixed"; + reg = <0>;
That reg = <3>;
(or start numbering the board entries at say 100 to leave room for changes in the COM include file)
arch/arm/boot/dts/tegra20-iris-512.dts line 82
Quoted 11 lines
arch/arm/boot/dts/tegra20-iris-512.dts +11
-0+ regulator-name = "usb_host_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + gpio = <&gpio 178 0>; + }; + + vcc_sd_reg: regulator at 3 { + compatible = "regulator-fixed"; + reg = <1>;
And the node name and reg property here would be 4.
arch/arm/boot/dts/tegra20-iris-512.dts line 88
Quoted 6 lines
arch/arm/boot/dts/tegra20-iris-512.dts +6
-0+ regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + }; +};
Oh and in patch 1, I noticed spaces after < or before >; could you remove those while you're at it. Thanks.
PATCH 1/2 ARM: DT: tegra: Add Colibri T20 512MB COM
In reply to Lucas StachQuoted 13 lines · Lucas Stach
This adds the device tree include file for the Toradex Colibri T20 Computer on Module (COM). It's only valid for the 512MB RAM version of the module, as the 256MB version needs different EMC tables and flash configuration. To make this clear the suffix -512 was added to the board compatible string.
The Colibri T20 uses a Tegra2 SoC and has onboard USB Ethernet and AC97 sound.
Still some things like onboard NAND support missing, but should be a good base for further development.
arch/arm/boot/dts/tegra20-colibri-512.dtsi line 359
Quoted 3 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi +2
-0+ temperature-sensor at 4c { + compatible = "national,lm95245";
You should probably add that compatible value to Documentation/devicetree/bindings/i2c/trivial-devices.txt.
Quoted 24 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi +23
-0+ i2c at 7000c000 { + clock-frequency = <400000>; + }; + + i2c_ddc: i2c at 7000c400 { + clock-frequency = <100000>; + }; + + i2c at 7000c500 { + clock-frequency = <400000>; + }; + serial at 70006000 { + clock-frequency = <216000000>; + }; + + serial at 70006300 { + clock-frequency = <216000000>; + }; + + usb at c5000000 { + dr_mode = "otg"; + }; +
arch/arm/boot/dts/tegra20-colibri-512.dtsi line 284
Quoted 10 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi +10
-0+ usb at c5004000 { + status = "okay"; + nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + }; + + sdhci at c8000600 { + cd-gpios = <&gpio 23 0>; /* gpio PC7 */ + vmmc-supply = <&ldo5_reg>; + vqmmc-supply = <&vcc_sd_reg>; + };
I assume that all of those nodes are meant to have status="okay"?
Oh, I see those are in the top-level board .dts file. You may as well put all the properties there; stuff like the GPIOs and regulators at least would be purely specific to the individual board, and not the COM.
I guess we should really move the serial node's clock-frequency property in the SoC .dtsi files.
arch/arm/boot/dts/tegra20-colibri-512.dtsi line 479
Quoted 1 line
arch/arm/boot/dts/tegra20-colibri-512.dtsi +1
-0+ com_regulators {
I think just call that "regulators"; the final board .dts file can easily add more sub-nodes to this node, so there's no need to try and avoid any naming conflict here. See Cardhu as an example.
arch/arm/boot/dts/tegra20-colibri-512.dtsi line 484
Quoted 1 line
arch/arm/boot/dts/tegra20-colibri-512.dtsi +1
-0+ vdd_5v0_reg: com_reg0 {
Those should be named regulator at 0, regulator at 1, etc.
PATCH 1/2 ARM: DT: tegra: Add Colibri T20 512MB COM
Am Donnerstag, den 17.01.2013, 13:55 -0700 schrieb Stephen Warren:
Quoted 13 lines · Lucas Stach
Quoted 11 lines
This adds the device tree include file for the Toradex Colibri T20 Computer on Module (COM). It's only valid for the 512MB RAM version of the module, as the 256MB version needs different EMC tables and flash configuration. To make this clear the suffix -512 was added to the board compatible string.
The Colibri T20 uses a Tegra2 SoC and has onboard USB Ethernet and AC97 sound.
Still some things like onboard NAND support missing, but should be a good base for further development.
Quoted 8 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi line 359
Quoted 4 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi +2
-0+ temperature-sensor at 4c { + compatible = "national,lm95245";You should probably add that compatible value to
Documentation/devicetree/bindings/i2c/trivial-devices.txt.
Yep, will send a separate patch for this.
Quoted 37 lines
Quoted 24 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi +23
-0+ i2c at 7000c000 { + clock-frequency = <400000>; + }; + + i2c_ddc: i2c at 7000c400 { + clock-frequency = <100000>; + }; + + i2c at 7000c500 { + clock-frequency = <400000>; + }; + serial at 70006000 { + clock-frequency = <216000000>; + }; + + serial at 70006300 { + clock-frequency = <216000000>; + }; + + usb at c5000000 { + dr_mode = "otg"; + }; +arch/arm/boot/dts/tegra20-colibri-512.dtsi line 284
Quoted 10 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi +10
-0+ usb at c5004000 { + status = "okay"; + nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + }; + + sdhci at c8000600 { + cd-gpios = <&gpio 23 0>; /* gpio PC7 */ + vmmc-supply = <&ldo5_reg>; + vqmmc-supply = <&vcc_sd_reg>; + };I assume that all of those nodes are meant to have status="okay"?
Quoted 4 lines
Oh, I see those are in the top-level board .dts file. You may as well put all the properties there; stuff like the GPIOs and regulators at least would be purely specific to the individual board, and not the COM.
I would like to keep everything that is defined by the COM to reside in the COM dtsi. You are right that the regulator in this case is board specific and should be moved to the board file, I missed this while splitting things out. But at least the GPIO is defined by the fixed COM pinout.
Quoted 3 lines
I guess we should really move the serial node's clock-frequency property in the SoC .dtsi files.
Might be a nice cleanup.
Quoted 6 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi line 479
Quoted 1 line
arch/arm/boot/dts/tegra20-colibri-512.dtsi +1
-0+ com_regulators {I think just call that "regulators"; the final board .dts file can easily add more sub-nodes to this node, so there's no need to try and avoid any naming conflict here. See Cardhu as an example.
I don't really see the benefit of merging those nodes. They are separate regulators, some are located on the COM, others on the carrier board. So I would like to keep them in separate nodes, unless you have strong feelings to change this.
PATCH 1/2 ARM: DT: tegra: Add Colibri T20 512MB COM
Quoted 65 lines · Lucas Stach
Am Donnerstag, den 17.01.2013, 13:55 -0700 schrieb Stephen Warren:
Quoted 13 lines · Lucas Stach
Quoted 11 lines
This adds the device tree include file for the Toradex Colibri T20 Computer on Module (COM). It's only valid for the 512MB RAM version of the module, as the 256MB version needs different EMC tables and flash configuration. To make this clear the suffix -512 was added to the board compatible string.
The Colibri T20 uses a Tegra2 SoC and has onboard USB Ethernet and AC97 sound.
Still some things like onboard NAND support missing, but should be a good base for further development.
Quoted 8 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi line 359
Quoted 4 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi +2
-0+ temperature-sensor at 4c { + compatible = "national,lm95245";You should probably add that compatible value to
Documentation/devicetree/bindings/i2c/trivial-devices.txt.Yep, will send a separate patch for this.
Quoted 37 lines
Quoted 24 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi +23
-0+ i2c at 7000c000 { + clock-frequency = <400000>; + }; + + i2c_ddc: i2c at 7000c400 { + clock-frequency = <100000>; + }; + + i2c at 7000c500 { + clock-frequency = <400000>; + }; + serial at 70006000 { + clock-frequency = <216000000>; + }; + + serial at 70006300 { + clock-frequency = <216000000>; + }; + + usb at c5000000 { + dr_mode = "otg"; + }; +arch/arm/boot/dts/tegra20-colibri-512.dtsi line 284
Quoted 10 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi +10
-0+ usb at c5004000 { + status = "okay"; + nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + }; + + sdhci at c8000600 { + cd-gpios = <&gpio 23 0>; /* gpio PC7 */ + vmmc-supply = <&ldo5_reg>; + vqmmc-supply = <&vcc_sd_reg>; + };I assume that all of those nodes are meant to have status="okay"?
Quoted 3 lines
Oh, I see those are in the top-level board .dts file. You may as well put all the properties there; stuff like the GPIOs and regulators at least would be purely specific to the individual board, and not the COM.
Quoted 5 lines
I would like to keep everything that is defined by the COM to reside in the COM dtsi. You are right that the regulator in this case is board specific and should be moved to the board file, I missed this while splitting things out. But at least the GPIO is defined by the fixed COM pinout.
If these are really defined by the COM itself, it does indeed make sense for the COM .dtsi file to define those properties. But, I have a hard time understanding how the COM design can force the carrier module into using a particular GPIO for the SD controller CD functionality; couldn't the carrier use any GPIO passed through the COM<->carrier connector for any purpose?
Quoted 10 lines
Quoted 5 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi line 479
Quoted 1 line
arch/arm/boot/dts/tegra20-colibri-512.dtsi +1
-0+ com_regulators {I think just call that "regulators"; the final board .dts file can easily add more sub-nodes to this node, so there's no need to try and avoid any naming conflict here. See Cardhu as an example.
I don't really see the benefit of merging those nodes. They are separate regulators, some are located on the COM, others on the carrier board. So I would like to keep them in separate nodes, unless you have strong feelings to change this.
The issue here is that if we don't do this, we end up with wierd node names; plain "regulators" is a fairly canonical name for what the name contains, and purely indicates the type of the node. "com_regulators" is unusual, and starts to encode identity into the node name itself, which is something not usually done in the node name (differentiation between identities is usually done using the unit address; "@nnn"),
PATCH 1/2 ARM: DT: tegra: Add Colibri T20 512MB COM
Am Donnerstag, den 17.01.2013, 15:13 -0700 schrieb Stephen Warren:
Quoted 33 lines · Lucas Stach
Quoted 26 lines
Am Donnerstag, den 17.01.2013, 13:55 -0700 schrieb Stephen Warren:
Quoted 21 lines · Lucas Stach
Quoted 11 lines
This adds the device tree include file for the Toradex Colibri T20 Computer on Module (COM). It's only valid for the 512MB RAM version of the module, as the 256MB version needs different EMC tables and flash configuration. To make this clear the suffix -512 was added to the board compatible string.
The Colibri T20 uses a Tegra2 SoC and has onboard USB Ethernet and AC97 sound.
Still some things like onboard NAND support missing, but should be a good base for further development.
arch/arm/boot/dts/tegra20-colibri-512.dtsi line 462
Quoted 6 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi new file +6
-0+ + sdhci at c8000600 { + cd-gpios = <&gpio 23 0>; /* gpio PC7 */ + vmmc-supply = <&ldo5_reg>; + vqmmc-supply = <&vcc_sd_reg>; + };I assume that all of those nodes are meant to have status="okay"?
Quoted 3 lines
Oh, I see those are in the top-level board .dts file. You may as well put all the properties there; stuff like the GPIOs and regulators at least would be purely specific to the individual board, and not the COM.
Quoted 5 lines
I would like to keep everything that is defined by the COM to reside in the COM dtsi. You are right that the regulator in this case is board specific and should be moved to the board file, I missed this while splitting things out. But at least the GPIO is defined by the fixed COM pinout.
Quoted 7 lines
If these are really defined by the COM itself, it does indeed make sense for the COM .dtsi file to define those properties. But, I have a hard time understanding how the COM design can force the carrier module into using a particular GPIO for the SD controller CD functionality; couldn't the carrier use any GPIO passed through the COM<->carrier connector for any purpose?
It's not a GPIO anymore as soon as it hits the COM<->carrier connector. The connector pin assignment is strictly specified. There are a lot of freely assignable GPIOs on the connector, everything related to a specific function is not part of this.
The Colibri specification dictates which pin to use if you want to realize a SDcard CD. This is done so that modules and carrier boards are interchangeable. In fact you can just as well run a new Colibri T30 module on a years old carrier designed for the ColibriPXA series of modules.
Quoted 11 lines
Quoted 10 lines
Quoted 5 lines
arch/arm/boot/dts/tegra20-colibri-512.dtsi line 479
Quoted 1 line
arch/arm/boot/dts/tegra20-colibri-512.dtsi new file +1
-0+ com_regulators {I think just call that "regulators"; the final board .dts file can easily add more sub-nodes to this node, so there's no need to try and avoid any naming conflict here. See Cardhu as an example.
I don't really see the benefit of merging those nodes. They are separate regulators, some are located on the COM, others on the carrier board. So I would like to keep them in separate nodes, unless you have strong feelings to change this.
Quoted 6 lines
The issue here is that if we don't do this, we end up with wierd node names; plain "regulators" is a fairly canonical name for what the name contains, and purely indicates the type of the node. "
com_regulators" is unusual, and starts to encode identity into the node name itself, which is something not usually done in the node name (differentiation between identities is usually done using the unit address; "@nnn"),
Hm, ok. Keeping some space in between module and carrier regulator addresses should do as well.
PATCH v2 1/3 ARM: DT: tegra: move serial clock-frequency attr into the SoC dtsi
In reply to Lucas StachNo Tegra Platform is running PLL_P at another rate than 216MHz, nor is any using an other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files.
---
v2:
- initial revision
--- arch/arm/boot/dts/tegra20-harmony.dts | 1 - arch/arm/boot/dts/tegra20-paz00.dts | 2 -- arch/arm/boot/dts/tegra20-seaboard.dts | 1 - arch/arm/boot/dts/tegra20-tamonten.dtsi | 1 - arch/arm/boot/dts/tegra20-trimslice.dts | 1 - arch/arm/boot/dts/tegra20-ventana.dts | 1 - arch/arm/boot/dts/tegra20-whistler.dts | 1 - arch/arm/boot/dts/tegra20.dtsi | 5 +++++ 8 files changed, 5 insertions(+), 8 deletions(-)
arch/arm/boot/dts/tegra20-harmony.dts +0 -1
@@ -252,7 +252,6 @@ serial at 70006300 { status = "okay"; - clock-frequency = <216000000>; }; i2c at 7000c000 {
arch/arm/boot/dts/tegra20-paz00.dts +0 -2
@@ -244,12 +244,10 @@ serial at 70006000 { status = "okay"; - clock-frequency = <216000000>; }; serial at 70006200 { status = "okay"; - clock-frequency = <216000000>; }; i2c at 7000c000 {
arch/arm/boot/dts/tegra20-seaboard.dts +0 -1
@@ -303,7 +303,6 @@ serial at 70006300 { status = "okay"; - clock-frequency = <216000000>; }; i2c at 7000c000 {
arch/arm/boot/dts/tegra20-tamonten.dtsi +0 -1
@@ -276,7 +276,6 @@ }; serial at 70006300 { - clock-frequency = <216000000>; status = "okay"; };
arch/arm/boot/dts/tegra20-trimslice.dts +0 -1
@@ -263,7 +263,6 @@ serial at 70006000 { status = "okay"; - clock-frequency = <216000000>; }; dvi_ddc: i2c at 7000c000 {
arch/arm/boot/dts/tegra20-ventana.dts +0 -1
@@ -300,7 +300,6 @@ serial at 70006300 { status = "okay"; - clock-frequency = <216000000>; }; i2c at 7000c000 {
arch/arm/boot/dts/tegra20-whistler.dts +0 -1
@@ -255,7 +255,6 @@ serial at 70006000 { status = "okay"; - clock-frequency = <216000000>; }; hdmi_ddc: i2c at 7000c400 {
arch/arm/boot/dts/tegra20.dtsi +5 -0
@@ -223,6 +223,7 @@ reg = <0x70006000 0x40>; reg-shift = <2>; interrupts = <0 36 0x04>; + clock-frequency = <216000000>; nvidia,dma-request-selector = <&apbdma 8>; status = "disabled"; };
@@ -232,6 +233,7 @@ reg = <0x70006040 0x40>; reg-shift = <2>; interrupts = <0 37 0x04>; + clock-frequency = <216000000>; nvidia,dma-request-selector = <&apbdma 9>; status = "disabled"; };
@@ -241,6 +243,7 @@ reg = <0x70006200 0x100>; reg-shift = <2>; interrupts = <0 46 0x04>; + clock-frequency = <216000000>; nvidia,dma-request-selector = <&apbdma 10>; status = "disabled"; };
@@ -250,6 +253,7 @@ reg = <0x70006300 0x100>; reg-shift = <2>; interrupts = <0 90 0x04>; + clock-frequency = <216000000>; nvidia,dma-request-selector = <&apbdma 19>; status = "disabled"; };
@@ -259,6 +263,7 @@ reg = <0x70006400 0x100>; reg-shift = <2>; interrupts = <0 91 0x04>; + clock-frequency = <216000000>; nvidia,dma-request-selector = <&apbdma 20>; status = "disabled"; };
Signature · 1 line
1.8.0.2
PATCH v2 2/3 ARM: DT: tegra: Add Colibri T20 512MB COM
This adds the device tree include file for the Toradex Colibri T20 Computer on Module (COM). It's only valid for the 512MB RAM version of the module, as the 256MB version needs different EMC tables and flash configuration. To make this clear the suffix -512 was added to the board compatible string.
The Colibri T20 uses a Tegra2 SoC and has onboard USB Ethernet and AC97 sound.
Still some things like onboard NAND support missing, but should be a good base for further development.
---
v2:
- remove some whitespace
- remove nodes that don't carry any additional info
- unify regulator node between module and carrier board
--- Documentation/devicetree/bindings/arm/tegra.txt | 1 + arch/arm/boot/dts/tegra20-colibri-512.dtsi | 491 ++++++++++++++++++++++++ 2 files changed, 492 insertions(+) create mode 100644 arch/arm/boot/dts/tegra20-colibri-512.dtsi
Documentation/devicetree/bindings/arm/tegra.txt +1 -0
@@ -30,3 +30,4 @@ board-specific compatible values: nvidia,seaboard nvidia,ventana nvidia,whistler + toradex,colibri_t20-512
arch/arm/boot/dts/tegra20-colibri-512.dtsi new file +491 -0
491 lines not on this page · raw message
Signature · 1 line
1.8.0.2
PATCH v2 3/3 ARM: DT: tegra: Add Toradex Iris carrier board with T20 512MB COM
In reply to Lucas StachThis adds the device tree for the Toradex Iris carrier board used together with a Colibri T20 512MB COM.
The Iris has the following features, in brackets the current status:
- DVI and VGA output through DVI-I connector (DVI-D enabled and tested)
- LVDS output
- 1 USB host port (enabled and tested)
- 1 USB OTG port (enabled)
- 100 MBit Ethernet (enabled and tested)
- 5 UART ports (2 on 10way headers enabled and tested)
- 1 MicroSD Slot (enabled and tested)
- Audio connectors (enabled, only HP out and Line-in tested)
- i2c RTC
- GPIO connector (enabled, only sparsely tested)
- external i2c bus
- 4 PWM out
- analog in
---
v2:
- unify regulator node between module and carrier
- use correct regulator for sdhci
--- Documentation/devicetree/bindings/arm/tegra.txt | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/tegra20-iris-512.dts | 89 +++++++++++++++++++++++++ 3 files changed, 91 insertions(+) create mode 100644 arch/arm/boot/dts/tegra20-iris-512.dts
Documentation/devicetree/bindings/arm/tegra.txt +1 -0
@@ -31,3 +31,4 @@ board-specific compatible values: nvidia,ventana nvidia,whistler toradex,colibri_t20-512 + toradex,iris
arch/arm/boot/dts/Makefile +1 -0
@@ -134,6 +134,7 @@ dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \ sun5i-a13-olinuxino.dtb dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ + tegra20-iris-512.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ tegra20-plutux.dtb \
arch/arm/boot/dts/tegra20-iris-512.dts new file +89 -0
89 lines not on this page · raw message
Signature · 1 line
1.8.0.2
Stephen Warren
AppliedPATCH v2 1/3 ARM: DT: tegra: move serial clock-frequency attr into the SoC dtsi
In reply to Lucas StachQuoted 3 lines · Lucas Stach
No Tegra Platform is running
PLL_Pat another rate than 216MHz, nor is any using an other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files.
I've applied the series to Tegra's for-3.9/dt branch.