ARM: arch_timer: Don't expect both secure and nonsecure PPI IRQ info
PATCH 1/1 ARM: arch_timer: Don't expect both secure and nonsecure PPI IRQ info
The current logic expects platforms to pass information about *both* secure and nonsecure PPI IRQ. Make arch_timer work even when either one of those are provided instead.
--- arch/arm/kernel/arch_timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/kernel/arch_timer.c +1 -1
@@ -495,7 +495,7 @@ int __init arch_timer_of_register(void)if (!arch_timer_ppi[VIRT_PPI ]) { arch_timer_use_virtual = false; -if (!arch_timer_ppi[PHYS_SECURE_PPI ] || +if (!arch_timer_ppi[PHYS_SECURE_PPI ] && !arch_timer_ppi[PHYS_NONSECURE_PPI ]) {pr_warn ("arch_timer: No interrupt available, giving up\n" );return -EINVAL ;
Signature · 1 line
1.7.9.5
PATCH 1/1 ARM: arch_timer: Don't expect both secure and nonsecure PPI IRQ info
On 18/01/13 12:23, Rajendra Nayak wrote:
Hi Rajendra,
Quoted 3 lines
The current logic expects platforms to pass information about *both* secure and nonsecure PPI IRQ. Make
arch_timerwork even when either one of those are provided instead.
I'm afraid this patch doesn't really solve the problem. The DT binding cannot express having only the virtual interrupt, or only the non-secure physical interrupt. This patch only works in the case where you only have the secure physical interrupt.
I think the real fix should be to make all the interrupts mandatory in the DT (they do exist in the HW), and make the code less tolerant of broken DTs.
Cheers,
M.
Signature · 1 line
Jazz is not dead. It just smells funny...
PATCH 1/1 ARM: arch_timer: Don't expect both secure and nonsecure PPI IRQ info
Quoted 3 lines · Marc Zyngier
I think the real fix should be to make all the interrupts mandatory in the DT (they do exist in the HW), and make the code less tolerant of broken DTs.
Got it, thanks Mark. Time for me to go fix the OMAP5 broken DT then.