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ARM: DTS: exynos5250-arndale: Add initial board support file

PATCH Superseded Tushar Behera 2 participants 3 messages Jan 25, 2013

Subsystems (3)

v2 of 3 Superseded Latest is v3 →

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PATCH v2 1/1 ARM: DTS: exynos5250-arndale: Add initial board support file

From: Girish K S <[email protected]>

Arndale is a low cost board based on the Samsung Exynos5250 SoC. This patch adds initial device tree support for this board.

---
Changes for V2:
* Addressed review comments from Sachin.
* Fixed GPIO numbers for dwmmc0 and dwmmc2.

 arch/arm/boot/dts/Makefile               |    1 +
 arch/arm/boot/dts/exynos5250-arndale.dts |  124 ++++++++++++++++++++++++++++++
 2 files changed, 125 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/exynos5250-arndale.dts
arch/arm/boot/dts/Makefile +1 -0
index 5ebb44f..e21f27c 100644
@@ -43,6 +43,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
 	exynos4210-smdkv310.dtb \
 	exynos4210-trats.dtb \
 	exynos4412-smdk4412.dtb \
+	exynos5250-arndale.dtb \
 	exynos5250-smdk5250.dtb \
 	exynos5250-snow.dtb \
 	exynos5440-ssdk5440.dtb
arch/arm/boot/dts/exynos5250-arndale.dts new file +124 -0

124 lines not on this page · raw message

Signature · 1 line
1.7.4.1
#1 lore raw

PATCH v2 1/1 ARM: DTS: exynos5250-arndale: Add initial board support file

Hi Tushar,

Quoted 130 lines · Tushar Behera

From: Girish K S <[email protected]>

Arndale is a low cost board based on the Samsung Exynos5250 SoC. This patch adds initial device tree support for this board.

---
Changes for V2:
* Addressed review comments from Sachin.
* Fixed GPIO numbers for dwmmc0 and dwmmc2.

 arch/arm/boot/dts/Makefile               |    1 +
 arch/arm/boot/dts/exynos5250-arndale.dts |  124 ++++++++++++++++++++++++++++++
 2 files changed, 125 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/exynos5250-arndale.dts
arch/arm/boot/dts/Makefile +1 -0
index 5ebb44f..e21f27c 100644
@@ -43,6 +43,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
        exynos4210-smdkv310.dtb \
        exynos4210-trats.dtb \
        exynos4412-smdk4412.dtb \
+       exynos5250-arndale.dtb \
        exynos5250-smdk5250.dtb \
        exynos5250-snow.dtb \
        exynos5440-ssdk5440.dtb
arch/arm/boot/dts/exynos5250-arndale.dts new file +95 -0
new file mode 100644
index 0000000..23ec841
@@ -0,0 +1,124 @@
+/*
+ * Samsung's Exynos5250 based Arndale board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos5250.dtsi"
+
+/ {
+       model = "Insignal Arndale evaluation board based on EXYNOS5250";
+       compatible = "insignal,arndale", "samsung,exynos5250";
+
+       memory {
+               reg = <0x40000000 0x80000000>;
+       };
+
+       chosen {
+               bootargs = "console=ttySAC2,115200";
+       };
+
+       i2c at 12C60000 {
+               status = "disabled";
+       };
+
+       i2c at 12C70000 {
+               status = "disabled";
+       };
+
+       i2c at 12C80000 {
+               status = "disabled";
+       };
+
+       i2c at 12C90000 {
+               status = "disabled";
+       };
+
+       i2c at 12CA0000 {
+               status = "disabled";
+       };
+
+       i2c at 12CB0000 {
+               status = "disabled";
+       };
+
+       i2c at 12CC0000 {
+               status = "disabled";
+       };
+
+       i2c at 12CD0000 {
+               status = "disabled";
+       };
+
+       i2c at 121D0000 {
+               status = "disabled";
+       };
+
+       dwmmc_0: dwmmc0 at 12200000 {
+               num-slots = <1>;
+               supports-highspeed;
+               broken-cd;
+               fifo-depth = <0x80>;
+               card-detect-delay = <200>;
+               samsung,dw-mshc-ciu-div = <3>;
+               samsung,dw-mshc-sdr-timing = <2 3>;
+               samsung,dw-mshc-ddr-timing = <1 2>;
+
+               slot at 0 {
+                       reg = <0>;
+                       bus-width = <8>;
+                       gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
+                               <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
+                               <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>,
+                               <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
+                               <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>;
+               };
+       };
+
+       dwmmc_1: dwmmc1 at 12210000 {
+               status = "disabled";
+       };
+
+       dwmmc_2: dwmmc2 at 12220000 {
+               num-slots = <1>;
+               supports-highspeed;
+               fifo-depth = <0x80>;
+               card-detect-delay = <200>;
+               samsung,dw-mshc-ciu-div = <3>;
+               samsung,dw-mshc-sdr-timing = <2 3>;
+               samsung,dw-mshc-ddr-timing = <1 2>;

arch/arm/boot/dts/exynos5250-arndale.dts line 105

Quoted 10 lines
arch/arm/boot/dts/exynos5250-arndale.dts new file +10 -0
+
+               slot at 0 {
+                       reg = <0>;
+                       bus-width = <4>;
+                       samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>;
+                       gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
+                               <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
+                               <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>,
+                               <&gpc4 3 3 3 3>, <&gpc4 4 3 3 3>,
+                               <&gpc4 5 3 3 3>, <&gpc4 6 3 3 3>;

bus-width property is assigned as 4 (see above bus-width = <4>;) but here you are configuring 8 __data line__ . Any reason?
I am not sure if Arndale board supports 8 bit bus-width, in any case either change the bus-width or gpios properties accordingly.

Quoted 20 lines
arch/arm/boot/dts/exynos5250-arndale.dts new file +19 -1
+               };
+       };
+
+       dwmmc_3: dwmmc3 at 12230000 {
+               status = "disabled";
+       };
+
+       spi_0: spi at 12d20000 {
+               status = "disabled";
+       };
+
+       spi_1: spi at 12d30000 {
+               status = "disabled";
+       };
+
+       spi_2: spi at 12d40000 {
+               status = "disabled";
+       };
+};
--
Quoted 1 line

1.7.4.1

with the above fix fill free to add

Signature · 2 lines
Regards,
Alim
#2 lore raw

PATCH v2 1/1 ARM: DTS: exynos5250-arndale: Add initial board support file

On 01/25/2013 10:59 AM, Alim Akhtar wrote:

[ ... ]

Quoted 15 lines
Quoted 15 lines
arch/arm/boot/dts/exynos5250-arndale.dts new file +15 -0
+
+       dwmmc_2: dwmmc2 at 12220000 {
+               num-slots = <1>;
+               supports-highspeed;
+               fifo-depth = <0x80>;
+               card-detect-delay = <200>;
+               samsung,dw-mshc-ciu-div = <3>;
+               samsung,dw-mshc-sdr-timing = <2 3>;
+               samsung,dw-mshc-ddr-timing = <1 2>;
+
+               slot at 0 {
+                       reg = <0>;
+                       bus-width = <4>;
+                       samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>;
+                       gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
Quoted 8 lines

arch/arm/boot/dts/exynos5250-arndale.dts line 105

Quoted 4 lines
arch/arm/boot/dts/exynos5250-arndale.dts new file +4 -0
+                               <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
+                               <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>,
+                               <&gpc4 3 3 3 3>, <&gpc4 4 3 3 3>,
+                               <&gpc4 5 3 3 3>, <&gpc4 6 3 3 3>;

bus-width property is assigned as 4 (see above bus-width = <4>;) but here you are configuring 8 __data line__ . Any reason?
I am not sure if Arndale board supports 8 bit bus-width, in any case either change the bus-width or gpios properties accordingly.

Right. As per the schematics, Arndale supports 4-bit bus-width. I will remove the extra GPIO lines.

[ ... ]

Quoted 5 lines

with the above fix fill free to add

Thanks for reviewing. I will re-submit the patch with your ack.

Signature · 1 line
Tushar Behera