ARM: Exynos: Enable device tree support for MCT controller
Subsystems (5)
v4 cover ARM: Exynos: Enable device tree support for MCT controller
Changes since v3:
- Based on Stephen Warren's CONFIG_CLKSRC_OF patches (merged from arm-soc 'timer/cleanup' branch).
- Moved the mct driver from mach-exynos to drivers/clocksource
Changes since v2:
- Rebased to linux 3.8-rc1
Changes since v1:
- Includes changes suggested by Sylwester Nawrocki <[email protected]>
This patch series adds device tree support for Exynos4/5 MCT controller and moves the MCT driver from mach-exynos to drivers/clocksource. These patches are based on Stephen Warren's CONFIG_CLKSRC_OF patches which were merged from the 'timer/cleanup' branch of the arm-soc tree. It also depends on the following two patches.
- http://lists.infradead.org/pipermail/linux-arm-kernel/2013-January/143084.html
- http://lists.infradead.org/pipermail/linux-arm-kernel/2013-January/143119.html
This patch series has been tested on Exynos4210 based Origen board, Exynos4412 based Origen board and Exynos5250 based SMDK board.
Thomas Abraham (7):
ARM: Exynos: add a register base address variable in mct controller driver
ARM: Exynos: prepare an array of MCT interrupt numbers and use it
ARM: Exynos: add device tree support for MCT controller driver
ARM: Exynos: allow dt based discovery of mct controller using clocksource_of_init
ARM: dts: add mct device tree node for all supported Exynos SoC's
ARM: Exynos: remove static io-remapping of mct registers for Exynos5
ARM: Exynos: move mct driver to drivers/clocksource
.../bindings/timer/samsung,exynos4210-mct.txt | 68 +++++++ arch/arm/Kconfig | 2 +- arch/arm/boot/dts/exynos4210.dtsi | 7 + arch/arm/boot/dts/exynos4212.dtsi | 9 + arch/arm/boot/dts/exynos4412.dtsi | 7 + arch/arm/boot/dts/exynos5250.dtsi | 20 ++ arch/arm/mach-exynos/Kconfig | 8 +- arch/arm/mach-exynos/Makefile | 2 - arch/arm/mach-exynos/common.c | 5 - arch/arm/mach-exynos/common.h | 2 +- arch/arm/mach-exynos/include/mach/irqs.h | 6 - arch/arm/mach-exynos/include/mach/map.h | 1 - arch/arm/mach-exynos/include/mach/regs-mct.h | 53 ------ arch/arm/mach-exynos/mach-armlex4210.c | 2 +- arch/arm/mach-exynos/mach-exynos4-dt.c | 3 +- arch/arm/mach-exynos/mach-exynos5-dt.c | 3 +- arch/arm/mach-exynos/mach-nuri.c | 2 +- arch/arm/mach-exynos/mach-origen.c | 2 +- arch/arm/mach-exynos/mach-smdk4x12.c | 4 +- arch/arm/mach-exynos/mach-smdkv310.c | 4 +- drivers/clocksource/Kconfig | 5 + drivers/clocksource/Makefile | 1 + .../mct.c => drivers/clocksource/exynos_mct.c | 197 +++++++++++++------- 23 files changed, 264 insertions(+), 149 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt delete mode 100644 arch/arm/mach-exynos/include/mach/regs-mct.h rename arch/arm/mach-exynos/mct.c => drivers/clocksource/exynos_mct.c (67%)
PATCH v4 1/7 ARM: Exynos: add a register base address variable in mct controller driver
All the MCT register read/writes use a fixed remapped address S5P_VA_SYSTIMER. With device tree support for MCT controller, it is possible to remove the static remap of the MCT controller address space and do the remap during the initialization of the MCT controller with the physical address obtained from the device tree.
So in preparation of adding device tree support for MCT controller, add a new register base address variable that will hold the remapped MCT controller base address and convert all MCT register read/writes to use this new variable as the base address instead of the fixed S5P_VA_SYSTIMER.
While at it, the MCT register offset and bit mask definitions are moved into the MCT controller driver file since there are no other consumers of these definitions.
--- arch/arm/mach-exynos/include/mach/regs-mct.h | 53 -------------- arch/arm/mach-exynos/mct.c | 97 ++++++++++++++++--------- 2 files changed, 62 insertions(+), 88 deletions(-) delete mode 100644 arch/arm/mach-exynos/include/mach/regs-mct.h
arch/arm/mach-exynos/include/mach/regs-mct.h deleted +0 -53
@@ -1,53 +0,0 @@ -/* arch/arm/mach-exynos4/include/mach/regs-mct.h -* -* Copyright (c) 2011 Samsung Electronics Co., Ltd. -* http://www.samsung.com -* -* EXYNOS4 MCT configutation -* -* This program is free software; you can redistribute it and/or modify -* it under the terms of the GNU General Public License version 2 as -* published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_MCT_H -#define __ASM_ARCH_REGS_MCT_H __FILE__ - -#include <mach/map.h> - -#define EXYNOS4_MCTREG (x) (S5P_VA_SYSTIMER + (x)) - -#define EXYNOS4_MCT_G_CNT_L EXYNOS4_MCTREG(0x100) -#define EXYNOS4_MCT_G_CNT_U EXYNOS4_MCTREG(0x104) -#define EXYNOS4_MCT_G_CNT_WSTAT EXYNOS4_MCTREG(0x110) - -#define EXYNOS4_MCT_G_COMP0_L EXYNOS4_MCTREG(0x200) -#define EXYNOS4_MCT_G_COMP0_U EXYNOS4_MCTREG(0x204) -#define EXYNOS4_MCT_G_COMP0_ADD_INCR EXYNOS4_MCTREG(0x208) - -#define EXYNOS4_MCT_G_TCON EXYNOS4_MCTREG(0x240) - -#define EXYNOS4_MCT_G_INT_CSTAT EXYNOS4_MCTREG(0x244) -#define EXYNOS4_MCT_G_INT_ENB EXYNOS4_MCTREG(0x248) -#define EXYNOS4_MCT_G_WSTAT EXYNOS4_MCTREG(0x24C) - -#define _EXYNOS4_MCT_L_BASE EXYNOS4_MCTREG(0x300) -#define EXYNOS4_MCT_L_BASE (x) (_EXYNOS4_MCT_L_BASE + (0x100 * x)) -#define EXYNOS4_MCT_L_MASK (0xffffff00) - -#define MCT_L_TCNTB_OFFSET (0x00) -#define MCT_L_ICNTB_OFFSET (0x08) -#define MCT_L_TCON_OFFSET (0x20) -#define MCT_L_INT_CSTAT_OFFSET (0x30) -#define MCT_L_INT_ENB_OFFSET (0x34) -#define MCT_L_WSTAT_OFFSET (0x40) - -#define MCT_G_TCON_START (1 << 8) -#define MCT_G_TCON_COMP0_AUTO_INC (1 << 1) -#define MCT_G_TCON_COMP0_ENABLE (1 << 0) - -#define MCT_L_TCON_INTERVAL_MODE (1 << 2) -#define MCT_L_TCON_INT_START (1 << 1) -#define MCT_L_TCON_TIMER_START (1 << 0) - -#endif /* __ASM_ARCH_REGS_MCT_H */
arch/arm/mach-exynos/mct.c +62 -35
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Signature · 1 line
1.7.5.4
PATCH v4 2/7 ARM: Exynos: prepare an array of MCT interrupt numbers and use it
In reply to Thomas AbrahamInstead of using soc_is_xxx macro at more than one place in the MCT controller driver to decide the MCT interrpt number to be setup, populate a table of known MCT global and local timer interrupts and use the values in table to setup the MCT interrupts.
This also helps in adding device tree support for MCT controller driver by allowing the driver to retrieve interrupt numbers from device tree and populating them into this table, thereby supporting both legacy and dt functionality to co-exist.
--- arch/arm/mach-exynos/mct.c | 57 +++++++++++++++++++++++++++---------------- 1 files changed, 36 insertions(+), 21 deletions(-)
arch/arm/mach-exynos/mct.c +36 -21
@@ -66,9 +66,22 @@ enum {MCT_INT_PPI }; +enum { +MCT_G0_IRQ , +MCT_G1_IRQ , +MCT_G2_IRQ , +MCT_G3_IRQ , +MCT_L0_IRQ , +MCT_L1_IRQ , +MCT_L2_IRQ , +MCT_L3_IRQ , +MCT_NR_IRQS , +}; +static void __iomem *reg_base;static unsigned long clk_rate;static unsigned int mct_int_type; +static int mct_irqs[MCT_NR_IRQS ];struct mct_clock_event_device {struct clock_event_device *evt;
@@ -287,11 +300,7 @@ static void exynos4_clockevent_init(void)clockevent_delta2ns (0xf , &mct_comp_device); mct_comp_device.cpumask =cpumask_of (0 );clockevents_register_device (&mct_comp_device); - -if (soc_is_exynos5250 ()) -setup_irq (EXYNOS5_IRQ_MCT_G0 , &mct_comp_event_irq); -else -setup_irq (EXYNOS4_IRQ_MCT_G0 , &mct_comp_event_irq); +setup_irq (mct_irqs[MCT_G0_IRQ ], &mct_comp_event_irq); }#ifdef CONFIG_LOCAL_TIMERS
@@ -415,7 +424,6 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt) {struct mct_clock_event_device *mevt;unsigned int cpu =smp_processor_id (); -int mct_lx_irq; mevt =this_cpu_ptr (&percpu_mct_tick); mevt->evt = evt;
@@ -442,21 +450,17 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)if (mct_int_type ==MCT_INT_SPI ) {if (cpu ==0 ) { - mct_lx_irq =soc_is_exynos4210 () ?EXYNOS4_IRQ_MCT_L0 : -EXYNOS5_IRQ_MCT_L0 ; mct_tick0_event_irq.dev_id = mevt; - evt->irq = mct_lx_irq; -setup_irq (mct_lx_irq, &mct_tick0_event_irq); + evt->irq = mct_irqs[MCT_L0_IRQ ]; +setup_irq (evt->irq, &mct_tick0_event_irq); }else { - mct_lx_irq =soc_is_exynos4210 () ?EXYNOS4_IRQ_MCT_L1 : -EXYNOS5_IRQ_MCT_L1 ; mct_tick1_event_irq.dev_id = mevt; - evt->irq = mct_lx_irq; -setup_irq (mct_lx_irq, &mct_tick1_event_irq); -irq_set_affinity (mct_lx_irq,cpumask_of (1 )); + evt->irq = mct_irqs[MCT_L1_IRQ ]; +setup_irq (evt->irq, &mct_tick1_event_irq); +irq_set_affinity (evt->irq,cpumask_of (1 )); } }else { -enable_percpu_irq (EXYNOS_IRQ_MCT_LOCALTIMER ,0 ); +enable_percpu_irq (mct_irqs[MCT_L0_IRQ ],0 ); }return 0 ;
@@ -472,7 +476,7 @@ static void exynos4_local_timer_stop(struct clock_event_device *evt)else remove_irq (evt->irq, &mct_tick1_event_irq); else -disable_percpu_irq (EXYNOS_IRQ_MCT_LOCALTIMER ); +disable_percpu_irq (mct_irqs [MCT_L0_IRQ ]); }static struct local_timer_ops exynos4_mct_tick_ops__cpuinitdata = {
@@ -494,11 +498,11 @@ static void __init exynos4_timer_resources(void)if (mct_int_type ==MCT_INT_PPI ) {int err; - err =request_percpu_irq (EXYNOS_IRQ_MCT_LOCALTIMER , + err =request_percpu_irq (mct_irqs[MCT_L0_IRQ ], exynos4_mct_tick_isr,"MCT" , &percpu_mct_tick);WARN (err,"MCT: can't request IRQ %d (%d)\n" , -EXYNOS_IRQ_MCT_LOCALTIMER , err); + mct_irqs[MCT_L0_IRQ ], err); }local_timer_register (&exynos4_mct_tick_ops);
@@ -512,10 +516,21 @@ void __init exynos4_timer_init(void)return ; } -if ((soc_is_exynos4210 ()) || (soc_is_exynos5250 ())) +if (soc_is_exynos4210 ()) { + mct_irqs[MCT_G0_IRQ ] =EXYNOS4_IRQ_MCT_G0 ; + mct_irqs[MCT_L0_IRQ ] =EXYNOS4_IRQ_MCT_L0 ; + mct_irqs[MCT_L1_IRQ ] =EXYNOS4_IRQ_MCT_L1 ; mct_int_type =MCT_INT_SPI ; -else + }else if (soc_is_exynos5250 ()) { + mct_irqs[MCT_G0_IRQ ] =EXYNOS5_IRQ_MCT_G0 ; + mct_irqs[MCT_L0_IRQ ] =EXYNOS5_IRQ_MCT_L0 ; + mct_irqs[MCT_L1_IRQ ] =EXYNOS5_IRQ_MCT_L1 ; + mct_int_type =MCT_INT_SPI ; + }else { + mct_irqs[MCT_G0_IRQ ] =EXYNOS4_IRQ_MCT_G0 ; + mct_irqs[MCT_L0_IRQ ] =EXYNOS_IRQ_MCT_LOCALTIMER ; mct_int_type =MCT_INT_PPI ; + }exynos4_timer_resources ();exynos4_clocksource_init ();
Signature · 1 line
1.7.5.4
PATCH v4 3/7 ARM: Exynos: add device tree support for MCT controller driver
In reply to Thomas AbrahamAllow the MCT controller base address and interrupts to be obtained from device tree and remove unused static definitions of these. The non-dt support for Exynos5250 is removed but retained for Exynos4210 based platforms.
--- .../bindings/timer/samsung,exynos4210-mct.txt | 68 ++++++++++++++++++++ arch/arm/mach-exynos/include/mach/irqs.h | 6 -- arch/arm/mach-exynos/mct.c | 49 +++++++++++---- 3 files changed, 105 insertions(+), 18 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt new file +68 -0
@@ -0,0 +1,68 @@ +Samsung's Multi Core Timer (MCT) + +The Samsung's Multi Core Timer (MCT) module includes two main blocks, the +global timer and CPU local timers. The global timer is a 64-bit free running +up-counter and can generate 4 interrupts when the counter reaches one of the +four preset counter values. The CPU local timers are 32-bit free running +down-counters and generate an interrupt when the counter expires. There is +one CPU local timer instantiated in MCT for every CPU in the system. + +Required properties: + +- compatible: should be "samsung,exynos4210-mct". + (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct. + (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct. + +- reg: base address of the mct controller and length of the address space + it occupies. + +- interrupts: the list of interrupts generated by the controller. The following + should be the order of the interrupts specified. The local timer interrupts + should be specified after the four global timer interrupts have been + specified. + + 0: Global Timer Interrupt 0 + 1: Global Timer Interrupt 1 + 2: Global Timer Interrupt 2 + 3: Global Timer Interrupt 3 + 4: Local Timer Interrupt 0 + 5: Local Timer Interrupt 1 + 6: .. + 7: .. + i: Local Timer Interrupt n + +Example 1: In this example, the system uses only the first global timer + interrupt generated by MCT and the remaining three global timer + interrupts are unused. Two local timer interrupts have been + specified. + + mct at 10050000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, + <0 42 0>, <0 48 0>; + }; + +Example 2: In this example, the MCT global and local timer interrupts are + connected to two seperate interrupt controllers. Hence, an + interrupt-map is created to map the interrupts to the respective + interrupt controllers. + + mct at 101C0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + interrupt-controller; + #interrups-cells = <2>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, + <4 0>, <5 0>; + + mct_map: mct-map { + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &combiner 23 3>, + <0x4 0 &gic 0 120 0>, + <0x5 0 &gic 0 121 0>; + }; + };
arch/arm/mach-exynos/include/mach/irqs.h +0 -6
@@ -30,8 +30,6 @@/* For EXYNOS4 and EXYNOS5 */ -#define EXYNOS_IRQ_MCT_LOCALTIMER IRQ_PPI(12) -#define EXYNOS_IRQ_EINT16_31 IRQ_SPI(32)/* For EXYNOS4 SoCs */
@@ -330,8 +328,6 @@#define EXYNOS5_IRQ_CEC IRQ_SPI(114)#define EXYNOS5_IRQ_SATA IRQ_SPI(115) -#define EXYNOS5_IRQ_MCT_L0 IRQ_SPI(120) -#define EXYNOS5_IRQ_MCT_L1 IRQ_SPI(121)#define EXYNOS5_IRQ_MMC44 IRQ_SPI(123)#define EXYNOS5_IRQ_MDMA1 IRQ_SPI(124)#define EXYNOS5_IRQ_FIMC_LITE0 IRQ_SPI(125)
@@ -426,8 +422,6 @@#define EXYNOS5_IRQ_PMU_CPU1 COMBINER_IRQ(22, 4)#define EXYNOS5_IRQ_EINT0 COMBINER_IRQ(23, 0) -#define EXYNOS5_IRQ_MCT_G0 COMBINER_IRQ(23, 3) -#define EXYNOS5_IRQ_MCT_G1 COMBINER_IRQ(23, 4)#define EXYNOS5_IRQ_EINT1 COMBINER_IRQ(24, 0)#define EXYNOS5_IRQ_SYSMMU_LITE1_0 COMBINER_IRQ(24, 1)
arch/arm/mach-exynos/mct.c +37 -12
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1.7.5.4
PATCH v4 3/7 ARM: Exynos: add device tree support for MCT controller driver
Quoted 52 lines · Thomas Abraham
Allow the MCT controller base address and interrupts to be obtained from device tree and remove unused static definitions of these. The non-dt support for Exynos5250 is removed but retained for Exynos4210 based platforms.
Cc Changhwan Youn <[email protected]>Signed-off-by Thomas Abraham <[email protected]>--- .../bindings/timer/samsung,exynos4210-mct.txt | 68 ++++++++++++++++++++ arch/arm/mach-exynos/include/mach/irqs.h | 6 -- arch/arm/mach-exynos/mct.c | 49 +++++++++++---- 3 files changed, 105 insertions(+), 18 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txtDocumentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt new file +33
-0@@ -0,0 +1,68 @@ +Samsung's Multi Core Timer (MCT) + +The Samsung's Multi Core Timer (MCT) module includes two main blocks, the +global timer and CPU local timers. The global timer is a 64-bit free running +up-counter and can generate 4 interrupts when the counter reaches one of the +four preset counter values. The CPU local timers are 32-bit free running +down-counters and generate an interrupt when the counter expires. There is +one CPU local timer instantiated in MCT for every CPU in the system. + +Required properties: + +- compatible: should be "samsung,exynos4210-mct". + (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct. + (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct. + +- reg: base address of the mct controller and length of the address space + it occupies. + +- interrupts: the list of interrupts generated by the controller. The following + should be the order of the interrupts specified. The local timer interrupts + should be specified after the four global timer interrupts have been + specified. + + 0: Global Timer Interrupt 0 + 1: Global Timer Interrupt 1 + 2: Global Timer Interrupt 2 + 3: Global Timer Interrupt 3 + 4: Local Timer Interrupt 0 + 5: Local Timer Interrupt 1 + 6: .. + 7: .. + i: Local Timer Interrupt n +
Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt line 43
Quoted 10 lines
Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt new file +10
-0+Example 1: In this example, the system uses only the first global timer + interrupt generated by MCT and the remaining three global timer + interrupts are unused. Two local timer interrupts have been + specified. + + mct at 10050000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, + <0 42 0>, <0 48 0>;
Rather than padding the interrupts list with nonexistent interrupts, could you not use something like a #global-interrupts property?
That way you don't have to list fake interrupts, you know exactly how many global interrupts to expect (so you can sanity-check the list without any special knowledge of the interrupt controller), and it's easier to support future revisions which could have more interrupts, in a backwards-compatible fashion.
Quoted 15 lines
Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt new file +15
-0+ }; + +Example 2: In this example, the MCT global and local timer interrupts are + connected to two seperate interrupt controllers. Hence, an + interrupt-map is created to map the interrupts to the respective + interrupt controllers. + + mct at 101C0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + interrupt-controller; + #interrups-cells = <2>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, + <4 0>, <5 0>;
Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt line 68
Quoted 10 lines
Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt new file +10
-0+ + mct_map: mct-map { + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &combiner 23 3>, + <0x4 0 &gic 0 120 0>, + <0x5 0 &gic 0 121 0>; + }; + };
[...]
Thanks,
Mark.
PATCH v4 3/7 ARM: Exynos: add device tree support for MCT controller driver
Hi Marc,
Quoted 67 lines · Mark Rutland
Quoted 52 lines · Thomas Abraham
Allow the MCT controller base address and interrupts to be obtained from device tree and remove unused static definitions of these. The non-dt support for Exynos5250 is removed but retained for Exynos4210 based platforms.
Cc Changhwan Youn <[email protected]>Signed-off-by Thomas Abraham <[email protected]>--- .../bindings/timer/samsung,exynos4210-mct.txt | 68 ++++++++++++++++++++ arch/arm/mach-exynos/include/mach/irqs.h | 6 -- arch/arm/mach-exynos/mct.c | 49 +++++++++++---- 3 files changed, 105 insertions(+), 18 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txtDocumentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt new file +33
-0@@ -0,0 +1,68 @@ +Samsung's Multi Core Timer (MCT) + +The Samsung's Multi Core Timer (MCT) module includes two main blocks, the +global timer and CPU local timers. The global timer is a 64-bit free running +up-counter and can generate 4 interrupts when the counter reaches one of the +four preset counter values. The CPU local timers are 32-bit free running +down-counters and generate an interrupt when the counter expires. There is +one CPU local timer instantiated in MCT for every CPU in the system. + +Required properties: + +- compatible: should be "samsung,exynos4210-mct". + (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct. + (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct. + +- reg: base address of the mct controller and length of the address space + it occupies. + +- interrupts: the list of interrupts generated by the controller. The following + should be the order of the interrupts specified. The local timer interrupts + should be specified after the four global timer interrupts have been + specified. + + 0: Global Timer Interrupt 0 + 1: Global Timer Interrupt 1 + 2: Global Timer Interrupt 2 + 3: Global Timer Interrupt 3 + 4: Local Timer Interrupt 0 + 5: Local Timer Interrupt 1 + 6: .. + 7: .. + i: Local Timer Interrupt n +Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt line 43
Quoted 10 lines
Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt new file +10
-0+Example 1: In this example, the system uses only the first global timer + interrupt generated by MCT and the remaining three global timer + interrupts are unused. Two local timer interrupts have been + specified. + + mct at 10050000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, + <0 42 0>, <0 48 0>;Rather than padding the interrupts list with nonexistent interrupts, could you not use something like a #global-interrupts property?
Quoted 5 lines
That way you don't have to list fake interrupts, you know exactly how many global interrupts to expect (so you can sanity-check the list without any special knowledge of the interrupt controller), and it's easier to support future revisions which could have more interrupts, in a backwards-compatible fashion.
Yes, you are right. I will do this change in the next version. Thanks for your suggestion.
Thanks,
Thomas.
Quoted 33 lines
Quoted 16 lines
Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt new file +15
-0+ }; + +Example 2: In this example, the MCT global and local timer interrupts are + connected to two seperate interrupt controllers. Hence, an + interrupt-map is created to map the interrupts to the respective + interrupt controllers. + + mct at 101C0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + interrupt-controller; + #interrups-cells = <2>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, + <4 0>, <5 0>;Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt line 68
Quoted 10 lines
Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt new file +10
-0+ + mct_map: mct-map { + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &combiner 23 3>, + <0x4 0 &gic 0 120 0>, + <0x5 0 &gic 0 121 0>; + }; + };[...]
Thanks,
Mark.
PATCH v4 3/7 ARM: Exynos: add device tree support for MCT controller driver
In reply to Thomas AbrahamQuoted 3 lines · Thomas Abraham
Allow the MCT controller base address and interrupts to be obtained from device tree and remove unused static definitions of these. The non-dt support for Exynos5250 is removed but retained for Exynos4210 based platforms.
Patches 3 and later in this series, fairly quickly,
Sorry for the slow review.
I'm not 100% sure if I like Mark's #global-interrupts suggestion or not, but I'd be fine with the binding either way, so choose as you see fit.
PATCH v4 4/7 ARM: Exynos: allow dt based discovery of mct controller using clocksource_of_init
In reply to Thomas AbrahamAdd entries to __clksrc_of_table so that Exynos MCT controller is discoverable using call to clocksource_of_init. With this change, it would be appropriate to rename the function 'exynos4_timer_init' as 'mct_init' since it aptly describes this function. Additionally, the 'init_time' callback of all machine descriptors for exynos platforms that were previously set to 'exynos4_timer_init' are now set to either 'mct_init' or 'clocksource_of_init'.
--- arch/arm/mach-exynos/Kconfig | 2 ++ arch/arm/mach-exynos/common.h | 2 +- arch/arm/mach-exynos/mach-armlex4210.c | 2 +- arch/arm/mach-exynos/mach-exynos4-dt.c | 3 ++- arch/arm/mach-exynos/mach-exynos5-dt.c | 3 ++- arch/arm/mach-exynos/mach-nuri.c | 2 +- arch/arm/mach-exynos/mach-origen.c | 2 +- arch/arm/mach-exynos/mach-smdk4x12.c | 4 ++-- arch/arm/mach-exynos/mach-smdkv310.c | 4 ++-- arch/arm/mach-exynos/mct.c | 12 ++++++------ 10 files changed, 20 insertions(+), 16 deletions(-)
arch/arm/mach-exynos/Kconfig +2 -0
@@ -416,6 +416,7 @@ config MACH_EXYNOS4_DT select PINCTRL select PINCTRL_EXYNOS4 select USE_OF + select CLKSRC_OF help Machine support for Samsung Exynos4 machine with device tree enabled. Select this if a fdt blob is available for the Exynos4 SoC based board.
@@ -428,6 +429,7 @@ config MACH_EXYNOS5_DT depends on ARCH_EXYNOS5 select ARM_AMBA select USE_OF + select CLKSRC_OF help Machine support for Samsung EXYNOS5 machine with device tree enabled. Select this if a fdt blob is available for the EXYNOS5 SoC based board.
arch/arm/mach-exynos/common.h +1 -1
@@ -12,7 +12,7 @@#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H#define __ARCH_ARM_MACH_EXYNOS_COMMON_H -extern void exynos4_timer_init (void ); +extern void mct_init (void );struct map_desc ;void exynos_init_io (struct map_desc *mach_desc,int size);
arch/arm/mach-exynos/mach-armlex4210.c +1 -1
@@ -204,6 +204,6 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210") .handle_irq = gic_handle_irq, .init_machine = armlex4210_machine_init, .init_late = exynos_init_late, - .init_time = exynos4_timer_init, + .init_time = mct_init, .restart = exynos4_restart,MACHINE_END
arch/arm/mach-exynos/mach-exynos4-dt.c +2 -1
@@ -13,6 +13,7 @@#include <linux/of_platform.h> #include <linux/serial_core.h> +#include <linux/clocksource.h> #include <asm/mach/arch.h> #include <asm/hardware/gic.h>
@@ -111,7 +112,7 @@ DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)") .init_early = exynos_firmware_init, .init_machine = exynos4_dt_machine_init, .init_late = exynos_init_late, - .init_time = exynos4_timer_init, + .init_time = clocksource_of_init, .dt_compat = exynos4_dt_compat, .restart = exynos4_restart,MACHINE_END
arch/arm/mach-exynos/mach-exynos5-dt.c +2 -1
@@ -14,6 +14,7 @@#include <linux/serial_core.h> #include <linux/memblock.h> #include <linux/io.h> +#include <linux/clocksource.h> #include <asm/mach/arch.h> #include <asm/hardware/gic.h>
@@ -182,7 +183,7 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") .handle_irq = gic_handle_irq, .init_machine = exynos5_dt_machine_init, .init_late = exynos_init_late, - .init_time = exynos4_timer_init, + .init_time = clocksource_of_init, .dt_compat = exynos5_dt_compat, .restart = exynos5_restart, .reserve = exynos5_reserve,
arch/arm/mach-exynos/mach-nuri.c +1 -1
@@ -1382,7 +1382,7 @@ MACHINE_START(NURI, "NURI") .handle_irq = gic_handle_irq, .init_machine = nuri_machine_init, .init_late = exynos_init_late, - .init_time = exynos4_timer_init, + .init_time = mct_init, .reserve = &nuri_reserve, .restart = exynos4_restart,MACHINE_END
arch/arm/mach-exynos/mach-origen.c +1 -1
@@ -817,7 +817,7 @@ MACHINE_START(ORIGEN, "ORIGEN") .handle_irq = gic_handle_irq, .init_machine = origen_machine_init, .init_late = exynos_init_late, - .init_time = exynos4_timer_init, + .init_time = mct_init, .reserve = &origen_reserve, .restart = exynos4_restart,MACHINE_END
arch/arm/mach-exynos/mach-smdk4x12.c +2 -2
@@ -378,7 +378,7 @@ MACHINE_START(SMDK4212, "SMDK4212") .map_io = smdk4x12_map_io, .handle_irq = gic_handle_irq, .init_machine = smdk4x12_machine_init, - .init_time = exynos4_timer_init, + .init_time = mct_init, .restart = exynos4_restart, .reserve = &smdk4x12_reserve,MACHINE_END
@@ -393,7 +393,7 @@ MACHINE_START(SMDK4412, "SMDK4412") .handle_irq = gic_handle_irq, .init_machine = smdk4x12_machine_init, .init_late = exynos_init_late, - .init_time = exynos4_timer_init, + .init_time = mct_init, .restart = exynos4_restart, .reserve = &smdk4x12_reserve,MACHINE_END
arch/arm/mach-exynos/mach-smdkv310.c +2 -2
@@ -425,7 +425,7 @@ MACHINE_START(SMDKV310, "SMDKV310") .map_io = smdkv310_map_io, .handle_irq = gic_handle_irq, .init_machine = smdkv310_machine_init, - .init_time = exynos4_timer_init, + .init_time = mct_init, .reserve = &smdkv310_reserve, .restart = exynos4_restart,MACHINE_END
@@ -439,7 +439,7 @@ MACHINE_START(SMDKC210, "SMDKC210") .handle_irq = gic_handle_irq, .init_machine = smdkv310_machine_init, .init_late = exynos_init_late, - .init_time = exynos4_timer_init, + .init_time = mct_init, .reserve = &smdkv310_reserve, .restart = exynos4_restart,MACHINE_END
arch/arm/mach-exynos/mct.c +6 -6
@@ -22,6 +22,7 @@#include <linux/of.h> #include <linux/of_irq.h> #include <linux/of_address.h> +#include <linux/clocksource.h> #include <asm/arch_timer.h> #include <asm/hardware/gic.h>
@@ -518,17 +519,12 @@ static const struct of_device_id exynos_mct_ids[] = { { .compatible = "samsung,exynos4412-mct", .data = (void *)MCT_INT_PPI }, }; -void __init exynos4_timer_init (void ) +void __init mct_init (void ) {struct device_node *np =NULL ;const struct of_device_id *match;u32 nr_irqs, i; -if (soc_is_exynos5440 ()) { -arch_timer_of_register (); -return ; - } -#ifdef CONFIG_OF np =of_find_matching_node_and_match (NULL , exynos_mct_ids, &match);#endif
@@ -561,3 +557,7 @@ void __init exynos4_timer_init(void)exynos4_clocksource_init ();exynos4_clockevent_init (); } +#ifdef CONFIG_CLKSRC_OF +CLOCKSOURCE_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init) +CLOCKSOURCE_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init) +#endif
Signature · 1 line
1.7.5.4
PATCH v4 4/7 ARM: Exynos: allow dt based discovery of mct controller using clocksource_of_init
arch/arm/mach-exynos/mct.c void __init exynos4_timer_init(void) · line 563
Quoted 13 lines · Thomas Abraham
Add entries to
__clksrc_of_tableso that Exynos MCT controller is discoverable using call toclocksource_of_init. With this change, it would be appropriate to rename the function 'exynos4_timer_init' as 'mct_init' since it aptly describes this function. Additionally, the 'init_time' callback of all machine descriptors for exynos platforms that were previously set to 'exynos4_timer_init' are now set to either 'mct_init' or 'clocksource_of_init'.arch/arm/mach-exynos/mct.c +4
-0+#ifdef CONFIG_CLKSRC_OF +CLOCKSOURCE_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init) +CLOCKSOURCE_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init) +#endif
I suggested in another review (IIRC for a different SoC) that CLOCKSOURCE_OF_DECLARE() should always be declared so you don't need that ifdef. Would you care to send a patch to add to arm-soc's timer/cleanup branch to do that? If not, let me know and I can.
PATCH v4 4/7 ARM: Exynos: allow dt based discovery of mct controller using clocksource_of_init
Quoted 10 lines · Stephen Warren
Quoted 8 lines · Thomas Abraham
Add entries to
__clksrc_of_tableso that Exynos MCT controller is discoverable using call toclocksource_of_init. With this change, it would be appropriate to rename the function 'exynos4_timer_init' as 'mct_init' since it aptly describes this function. Additionally, the 'init_time' callback of all machine descriptors for exynos platforms that were previously set to 'exynos4_timer_init' are now set to either 'mct_init' or 'clocksource_of_init'.arch/arm/mach-exynos/mct.c +0
-0
Quoted 9 lines
arch/arm/mach-exynos/mct.c void __init exynos4_timer_init(void) · line 563
Quoted 4 lines
arch/arm/mach-exynos/mct.c +4
-0+#ifdef CONFIG_CLKSRC_OF +CLOCKSOURCE_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init) +CLOCKSOURCE_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init) +#endif I suggested in another review (IIRC for a different SoC) that
CLOCKSOURCE_OF_DECLARE()should always be declared so you don't need that ifdef. Would you care to send a patch to add to arm-soc's timer/cleanup branch to do that? If not, let me know and I can.
I just sent a patch for this.
PATCH v4 5/7 ARM: dts: add mct device tree node for all supported Exynos SoC's
In reply to Thomas AbrahamAdd MCT device tree node for Exynos4210, Exynos4212, Exynos4412 and Exynos5250.
--- arch/arm/boot/dts/exynos4210.dtsi | 7 +++++++ arch/arm/boot/dts/exynos4212.dtsi | 9 +++++++++ arch/arm/boot/dts/exynos4412.dtsi | 7 +++++++ arch/arm/boot/dts/exynos5250.dtsi | 20 ++++++++++++++++++++ 4 files changed, 43 insertions(+), 0 deletions(-)
arch/arm/boot/dts/exynos4210.dtsi +7 -0
@@ -47,6 +47,13 @@ <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; }; + mct at 10050000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, + <0 42 0>, <0 48 0>; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupt-parent = <&combiner>;
arch/arm/boot/dts/exynos4212.dtsi +9 -0
@@ -25,4 +25,13 @@ gic:interrupt-controller at 10490000 { cpu-offset = <0x8000>; }; + + mct at 10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, + <1 12 0>, <1 12 0>; + }; + + };
arch/arm/boot/dts/exynos4412.dtsi +7 -0
@@ -25,4 +25,11 @@ gic:interrupt-controller at 10490000 { cpu-offset = <0x4000>; }; + + mct at 10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>, + <1 12 0>, <1 12 0>, <1 12 0>, <1 12 0>; + }; };
arch/arm/boot/dts/exynos5250.dtsi +20 -0
@@ -69,6 +69,26 @@ <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; }; + mct at 101C0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + interrupt-controller; + #interrups-cells = <2>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <0 0>, <0 0>, <0 0>, + <4 0>, <5 0>; + + mct_map: mct-map { + compatible = "samsung,mct-map"; + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &combiner 23 3>, + <0x4 0 &gic 0 120 0>, + <0x5 0 &gic 0 121 0>; + }; + }; + pmu { compatible = "arm,cortex-a15-pmu"; interrupt-parent = <&combiner>;
Signature · 1 line
1.7.5.4
PATCH v4 6/7 ARM: Exynos: remove static io-remapping of mct registers for Exynos5
In reply to Thomas AbrahamWith device tree support enabled for MCT controller, the staticio-remapping of the MCT controller address space is removed for Exynos5 platforms (which supports only device tree based boot).
--- arch/arm/mach-exynos/common.c | 5 ----- arch/arm/mach-exynos/include/mach/map.h | 1 - 2 files changed, 0 insertions(+), 6 deletions(-)
arch/arm/mach-exynos/common.c +0 -5
@@ -283,11 +283,6 @@ static struct map_desc exynos5_iodesc[] __initdata = { .length = SZ_4K, .type = MT_DEVICE, }, { - .virtual = (unsigned long)S5P_VA_SYSTIMER, - .pfn = __phys_to_pfn(EXYNOS5_PA_SYSTIMER), - .length = SZ_4K, - .type = MT_DEVICE, - }, { .virtual = (unsigned long)S5P_VA_SYSRAM, .pfn = __phys_to_pfn(EXYNOS5_PA_SYSRAM), .length = SZ_4K,
arch/arm/mach-exynos/include/mach/map.h +0 -1
@@ -68,7 +68,6 @@#define EXYNOS5_PA_CMU 0x10010000#define EXYNOS4_PA_SYSTIMER 0x10050000 -#define EXYNOS5_PA_SYSTIMER 0x101C0000#define EXYNOS4_PA_WATCHDOG 0x10060000#define EXYNOS5_PA_WATCHDOG 0x101D0000
Signature · 1 line
1.7.5.4
PATCH v4 7/7 ARM: Exynos: move mct driver to drivers/clocksource
In reply to Thomas AbrahamMove the multi core timer (mct) driver from mach-exynos to drivers/clocksource and update the Kconfig and makefiles.
--- arch/arm/Kconfig | 2 +- arch/arm/mach-exynos/Kconfig | 6 ------ arch/arm/mach-exynos/Makefile | 2 -- drivers/clocksource/Kconfig | 5 +++++ drivers/clocksource/Makefile | 1 + .../mct.c => drivers/clocksource/exynos_mct.c | 0 6 files changed, 7 insertions(+), 9 deletions(-) rename arch/arm/mach-exynos/mct.c => drivers/clocksource/exynos_mct.c (100%)
arch/arm/Kconfig +1 -1
@@ -1624,7 +1624,7 @@ config LOCAL_TIMERS bool "Use local timer interrupts" depends on SMP default y - select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT) + select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !CLKSRC_EXYNOS_MCT) help Enable support for local timers on SMP platforms, rather then the legacy IPI broadcast method. Local timers allows the system
arch/arm/mach-exynos/Kconfig +0 -6
@@ -79,12 +79,6 @@ config SOC_EXYNOS5440 help Enable EXYNOS5440 SoC support -config EXYNOS4_MCT - bool - default y - help - Use MCT (Multi Core Timer) as kernel timers - config EXYNOS_DEV_DMA bool help
arch/arm/mach-exynos/Makefile +0 -2
@@ -26,8 +26,6 @@ obj-$(CONFIG_ARCH_EXYNOS) += pmu.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o -obj-$(CONFIG_EXYNOS4_MCT) += mct.o - obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_ARCH_EXYNOS) += exynos-smc.o
drivers/clocksource/Kconfig +5 -0
@@ -61,3 +61,8 @@ config CLKSRC_ARM_GENERIC def_bool y if ARM64 help This option enables support for the ARM generic timer. + +config CLKSRC_EXYNOS_MCT + def_bool y if ARCH_EXYNOS + help + Support for Multi Core Timer controller on Exynos SoCs.
drivers/clocksource/Makefile +1 -0
@@ -17,5 +17,6 @@ obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o +obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o obj-$(CONFIG_CLKSRC_ARM_GENERIC) += arm_generic.o
drivers/clocksource/exynos_mct.c renamed from arch/arm/mach-exynos/mct.c +0 -0
Signature · 1 line
1.7.5.4