ARM: OMAP2+: AM33XX: Misc fixes/updates
Subsystems (7)
v3 cover ARM: OMAP2+: AM33XX: Misc fixes/updates
Hi,
The following patches were earlier posted as part the AM33XX suspend-resume support series [1]. Based on the suggestion from Santosh Shilimkar <[email protected]> i have split out the changes which update the various data files related to AM33XX support.
These patches apply on top of v3.8-rc5
v1->v2: Address the comments received from Sergei Shtylyov and Peter Korsgaard.
v2->v3: Address an additional comment from Peter Korgaard and add his Acked-by to the patches
Regards,
Vaibhav
[1] http://marc.info/?l=linux-arm-kernel&m=135698501821074&w=2
Vaibhav Bedia (9):
ARM: OMAP2+: AM33XX: CM: Get rid of unnecessary header inclusions
ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files
ARM: OMAP2+: AM33XX: hwmod: Register OCMC RAM hwmod
ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags
ARM: OMAP2+: AM33XX: hwmod: Fixup cpgmac0 hwmod entry
ARM: OMAP2+: AM33XX: hwmod: Update the WKUP-M3 hwmod with reset status
bit
ARM: OMAP2+: AM33XX: Update the hardreset API
ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3
ARM: OMAP2+: AM33XX: control: Add some control module registers and
APIs
arch/arm/boot/dts/am33xx.dtsi | 14 +++++++++ arch/arm/mach-omap2/cm33xx.h | 9 ++---- arch/arm/mach-omap2/control.c | 20 ++++++++++++ arch/arm/mach-omap2/control.h | 41 ++++++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod.c | 5 +-- arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 50 +++++++++++++++++------------- arch/arm/mach-omap2/prm33xx.c | 11 ++++--- arch/arm/mach-omap2/prm33xx.h | 4 ++- 8 files changed, 118 insertions(+), 36 deletions(-)
Signature · 1 line
1.8.1
PATCH v3 1/9 ARM: OMAP2+: AM33XX: CM: Get rid of unnecessary header inclusions
cm33xx.h unnecessarily includes a lot of header files. Get rid of these and directly include "iomap.h" which is needed to keep things compiling.
---
v3: Add Peter's Acked-by
v2: Reword the changelog
arch/arm/mach-omap2/cm33xx.h | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-)
arch/arm/mach-omap2/cm33xx.h +1 -6
@@ -17,16 +17,11 @@#ifndef __ARCH_ARM_MACH_OMAP2_CM_33XX_H#define __ARCH_ARM_MACH_OMAP2_CM_33XX_H -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/io.h> -#include "common.h" #include "cm.h" #include "cm-regbits-33xx.h" -#include "cm33xx.h" +#include "iomap.h" /* CM base address */ #define AM33XX_CM_BASE 0x44e00000
Signature · 1 line
1.8.1
PATCH v3 2/9 ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files
In reply to Vaibhav BediaThis is necessary to ensure that macros declared here can be reused from assembly files.
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/cm33xx.h | 2 ++ arch/arm/mach-omap2/prm33xx.h | 2 ++ 2 files changed, 4 insertions(+)
arch/arm/mach-omap2/cm33xx.h +2 -0
@@ -376,6 +376,7 @@#define AM33XX_CM_CEFUSE_CEFUSE_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_CEFUSE_MOD, 0x0020) +#ifndef __ASSEMBLER__extern bool am33xx_cm_is_clkdm_in_hwsup (s16 inst,u16 cdoffs);extern void am33xx_cm_clkdm_enable_hwsup (s16 inst,u16 cdoffs);extern void am33xx_cm_clkdm_disable_hwsup (s16 inst,u16 cdoffs);
@@ -412,4 +413,5 @@ static inline int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, }#endif +#endif /* ASSEMBLER */ #endif
arch/arm/mach-omap2/prm33xx.h +2 -0
@@ -117,6 +117,7 @@#define AM33XX_PM_CEFUSE_PWRSTST_OFFSET 0x0004#define AM33XX_PM_CEFUSE_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004) +#ifndef __ASSEMBLER__extern u32 am33xx_prm_read_reg (s16 inst,u16 idx);extern void am33xx_prm_write_reg (u32 val,s16 inst,u16 idx);extern u32 am33xx_prm_rmw_reg_bits (u32 mask,u32 bits,s16 inst,s16 idx);
@@ -126,4 +127,5 @@ extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,extern int am33xx_prm_assert_hardreset (u8 shift,s16 inst,u16 rstctrl_offs);extern int am33xx_prm_deassert_hardreset (u8 shift,s16 inst,u16 rstctrl_offs,u16 rstst_offs); +#endif /* ASSEMBLER */ #endif
Signature · 1 line
1.8.1
PATCH v3 3/9 ARM: OMAP2+: AM33XX: hwmod: Register OCMC RAM hwmod
In reply to Vaibhav BediaOCMC RAM lies in the PER power domain and this memory support retention.
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 47 +++++++++++++++++------------- 1 file changed, 27 insertions(+), 20 deletions(-)
arch/arm/mach-omap2/omap_hwmod_33xx_data.c +27 -20
@@ -414,7 +414,6 @@ static struct omap_hwmod am33xx_adc_tsc_hwmod = {* - cEFUSE (doesn't fall under any ocp_if) * - clkdiv32k * - debugss -* - ocmc ram * - ocp watch point * - aes0 * - sha0
@@ -481,25 +480,6 @@ static struct omap_hwmod am33xx_debugss_hwmod = { }, }; -/* ocmcram */ -static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = { - .name ="ocmcram" , -}; - -static struct omap_hwmod am33xx_ocmcram_hwmod = { - .name ="ocmcram" , - .class = &am33xx_ocmcram_hwmod_class, - .clkdm_name ="l3_clkdm" , - .flags = (HWMOD_INIT_NO_IDLE |HWMOD_INIT_NO_RESET ), - .main_clk ="l3_gclk" , - .prcm = { - .omap4 = { - .clkctrl_offs =AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET , - .modulemode =MODULEMODE_SWCTRL , - }, - }, -}; -/* ocpwp */ static struct omap_hwmod_class am33xx_ocpwp_hwmod_class = { .name ="ocpwp" ,
@@ -570,6 +550,25 @@ static struct omap_hwmod am33xx_sha0_hwmod = {#endif +/* ocmcram */ +static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = { + .name ="ocmcram" , +}; + +static struct omap_hwmod am33xx_ocmcram_hwmod = { + .name ="ocmcram" , + .class = &am33xx_ocmcram_hwmod_class, + .clkdm_name ="l3_clkdm" , + .flags = (HWMOD_INIT_NO_IDLE |HWMOD_INIT_NO_RESET ), + .main_clk ="l3_gclk" , + .prcm = { + .omap4 = { + .clkctrl_offs =AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET , + .modulemode =MODULEMODE_SWCTRL , + }, + }, +}; +/* 'smartreflex' class */ static struct omap_hwmod_class am33xx_smartreflex_hwmod_class = { .name ="smartreflex" ,
@@ -3328,6 +3327,13 @@ static struct omap_hwmod_ocp_if am33xx_l3_s__usbss = { .flags = OCPIF_SWSUP_IDLE, }; +/* l3 main -> ocmc */ +static struct omap_hwmod_ocp_if am33xx_l3_main__ocmc = { + .master = &am33xx_l3_main_hwmod, + .slave = &am33xx_ocmcram_hwmod, + .user =OCP_USER_MPU |OCP_USER_SDMA , +}; +static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[]__initdata = { &am33xx_l4_fw__emif_fw, &am33xx_l3_main__emif,
@@ -3398,6 +3404,7 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l3_main__tptc0, &am33xx_l3_main__tptc1, &am33xx_l3_main__tptc2, + &am33xx_l3_main__ocmc, &am33xx_l3_s__usbss, &am33xx_l4_hs__cpgmac0, &am33xx_cpgmac0__mdio,
Signature · 1 line
1.8.1
PATCH v3 4/9 ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags
In reply to Vaibhav BediaThird Party Transfer Controller (TPTC0) needs to be idled and put to standby under SW control. Add the appropriate flags in the TPTC0 hwmod entry.
---
v3: Add Peter's Acked-by
v2: Drop unnecessary parens
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 + 1 file changed, 1 insertion(+)
arch/arm/mach-omap2/omap_hwmod_33xx_data.c +1 -0
@@ -1823,6 +1823,7 @@ static struct omap_hwmod am33xx_tptc0_hwmod = { .class = &am33xx_tptc_hwmod_class, .clkdm_name = "l3_clkdm", .mpu_irqs = am33xx_tptc0_irqs, + .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, .main_clk = "l3_gclk", .prcm = { .omap4 = {
Signature · 1 line
1.8.1
PATCH v3 5/9 ARM: OMAP2+: AM33XX: hwmod: Fixup cpgmac0 hwmod entry
In reply to Vaibhav BediaThe current HWMOD code expects the memory region with the IP's SYSCONFIG register to be marked with ADDR_TYPE_RT flag.
CPGMAC0 hwmod entry specifies two memory regions and marks both with the flag ADDR_TYPE_RT although only the 2nd region has the SYSCONFIG register. This leads to the HWMOD code accessing the wrong memory address for idle and standby operations. Fix this by removing the ADDR_TYPE_RT flag from the 1st memory region in CPGMAC0 hwmod entry.
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 - 1 file changed, 1 deletion(-)
arch/arm/mach-omap2/omap_hwmod_33xx_data.c +0 -1
@@ -2496,7 +2496,6 @@ static struct omap_hwmod_addr_space am33xx_cpgmac0_addr_space[] = { { .pa_start = 0x4a100000, .pa_end = 0x4a100000 + SZ_2K - 1, - .flags = ADDR_TYPE_RT, },/* cpsw wr */ {
Signature · 1 line
1.8.1
PATCH v3 6/9 ARM: OMAP2+: AM33XX: hwmod: Update the WKUP-M3 hwmod with reset status bit
In reply to Vaibhav BediaWKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST) Update the WKUP-M3 hwmod data to reflect the same.
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 + 1 file changed, 1 insertion(+)
arch/arm/mach-omap2/omap_hwmod_33xx_data.c +1 -0
@@ -269,6 +269,7 @@ static struct omap_hwmod am33xx_wkup_m3_hwmod = { .omap4 = { .clkctrl_offs = AM33XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET, .rstctrl_offs = AM33XX_RM_WKUP_RSTCTRL_OFFSET, + .rstst_offs = AM33XX_RM_WKUP_RSTST_OFFSET, .modulemode = MODULEMODE_SWCTRL, }, },
Signature · 1 line
1.8.1
PATCH v3 7/9 ARM: OMAP2+: AM33XX: Update the hardreset API
In reply to Vaibhav BediaWKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST) Update the hardreset API to ensure that the reset line properly deasserted.
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/omap_hwmod.c | 5 +---- arch/arm/mach-omap2/prm33xx.c | 11 +++++++---- arch/arm/mach-omap2/prm33xx.h | 2 +- 3 files changed, 9 insertions(+), 9 deletions(-)
arch/arm/mach-omap2/omap_hwmod.c +1 -4
@@ -3041,11 +3041,8 @@ static int _am33xx_assert_hardreset(struct omap_hwmod *oh,static int _am33xx_deassert_hardreset (struct omap_hwmod *oh,struct omap_hwmod_rst_info *ohri) { -if (ohri->st_shift) -pr_err ("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n" , - oh->name, ohri->name); -return am33xx_prm_deassert_hardreset (ohri->rst_shift, + ohri->st_shift, oh->clkdm->pwrdm.ptr->prcm_offs, oh->prcm.omap4.rstctrl_offs, oh->prcm.omap4.rstst_offs);
arch/arm/mach-omap2/prm33xx.c +7 -4
@@ -110,11 +110,11 @@ int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs)* -EINVAL upon an argument error, -EEXIST if the submodule was already out * of reset, or -EBUSY if the submodule did not exit reset promptly. */ -int am33xx_prm_deassert_hardreset (u8 shift,s16 inst, +int am33xx_prm_deassert_hardreset (u8 shift,u8 st_shift,s16 inst,u16 rstctrl_offs,u16 rstst_offs) {int c; -u32 mask =1 << shift; +u32 mask =1 << st_shift;/* Check the current status to avoid de-asserting the line twice */ if (am33xx_prm_is_hardreset_asserted (shift, inst, rstctrl_offs) ==0 )
@@ -122,11 +122,14 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,/* Clear the reset status by writing 1 to the status bit */ am33xx_prm_rmw_reg_bits (0xffffffff , mask, inst, rstst_offs); +/* de-assert the reset control line */ + mask =1 << shift; +am33xx_prm_rmw_reg_bits (mask,0 , inst, rstctrl_offs); -/* wait the status to be set */ -omap_test_timeout (am33xx_prm_is_hardreset_asserted (shift, inst, +/* wait the status to be set */ +omap_test_timeout (am33xx_prm_is_hardreset_asserted (st_shift, inst, rstst_offs),MAX_MODULE_HARDRESET_WAIT , c);
arch/arm/mach-omap2/prm33xx.h +1 -1
@@ -125,7 +125,7 @@ extern void am33xx_prm_global_warm_sw_reset(void);extern int am33xx_prm_is_hardreset_asserted (u8 shift,s16 inst,u16 rstctrl_offs);extern int am33xx_prm_assert_hardreset (u8 shift,s16 inst,u16 rstctrl_offs); -extern int am33xx_prm_deassert_hardreset (u8 shift,s16 inst, +extern int am33xx_prm_deassert_hardreset (u8 shift,u8 st_shift,s16 inst,u16 rstctrl_offs,u16 rstst_offs);#endif /* ASSEMBLER */ #endif
Signature · 1 line
1.8.1
PATCH v3 8/9 ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3
In reply to Vaibhav BediaSince AM33XX supports only DT-boot, this is needed for the appropriate device nodes to be created.
Note: OCMC RAM is part of the PER power domain and supports retention. The assembly code for low power entry/exit will run from OCMC RAM. To ensure that the OMAP PM code does not attempt to disable the clock to OCMC RAM as part of the suspend process add the no_idle_on_suspend flag.
---
v3: Update the compatible field as mentioned by Peter and his Acked-by
v2: Add reg property
arch/arm/boot/dts/am33xx.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
arch/arm/boot/dts/am33xx.dtsi +14 -0
@@ -385,5 +385,19 @@ mac-address = [ 00 00 00 00 00 00 ]; }; }; + + ocmcram: ocmcram at 40300000 { + compatible = "ti,am3352-ocmcram"; + reg = <0x40300000 0x10000>; + ti,hwmods = "ocmcram"; + ti,no_idle_on_suspend; + }; + + wkup_m3: wkup_m3 at 44d00000 { + compatible = "ti,am3353-wkup-m3"; + reg = <0x44d00000 0x4000 /* M3 UMEM */ + 0x44d80000 0x2000>; /* M3 DMEM */ + ti,hwmods = "wkup_m3"; + }; }; };
Signature · 1 line
1.8.1
PATCH v3 9/9 ARM: OMAP2+: AM33XX: control: Add some control module registers and APIs
In reply to Vaibhav BediaAdd minimal APIs for writing to the IPC and the M3_TXEV registers in the Control module. These will be used in a subsequent patch which adds suspend-resume support for AM33XX.
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/control.c | 20 ++++++++++++++++++++ arch/arm/mach-omap2/control.h | 41 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+)
arch/arm/mach-omap2/control.c +20 -0
@@ -604,3 +604,23 @@ int omap3_ctrl_save_padconf(void) }#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ + +#if defined(CONFIG_SOC_AM33XX ) && defined(CONFIG_PM ) +void am33xx_txev_eoi (void ) +{ +omap_ctrl_writel (AM33XX_M3_TXEV_ACK ,AM33XX_CONTROL_M3_TXEV_EOI ); +} + +void am33xx_txev_enable (void ) +{ +omap_ctrl_writel (AM33XX_M3_TXEV_ENABLE ,AM33XX_CONTROL_M3_TXEV_EOI ); +} + +void am33xx_wkup_m3_ipc_cmd (struct am33xx_ipc_data *data) +{ +omap_ctrl_writel (data->resume_addr,AM33XX_CONTROL_IPC_MSG_REG0 ); +omap_ctrl_writel (data->sleep_mode,AM33XX_CONTROL_IPC_MSG_REG1 ); +omap_ctrl_writel (data->param1,AM33XX_CONTROL_IPC_MSG_REG2 ); +omap_ctrl_writel (data->param2,AM33XX_CONTROL_IPC_MSG_REG3 ); +} +#endif /* CONFIG_SOC_AM33XX && CONFIG_PM */
arch/arm/mach-omap2/control.h +41 -0
53 lines not on this page · raw message
Signature · 1 line
1.8.1
Paul Walmsley
maintainerPATCH v3 9/9 ARM: OMAP2+: AM33XX: control: Add some control module registers and APIs
Hi Vaibhav,
a comment on this one:
Quoted 32 lines · Vaibhav Bedia
Add minimal APIs for writing to the IPC and the
M3_TXEVregisters in the Control module. These will be used in a subsequent patch which adds suspend-resume support for AM33XX.Signed-off-by Vaibhav Bedia <[email protected]>Acked-by Peter Korsgaard <[email protected]>---
v3: Add Peter's Acked-by
v2: No changearch/arm/mach-omap2/control.c | 20 ++++++++++++++++++++ arch/arm/mach-omap2/control.h | 41 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+)arch/arm/mach-omap2/control.c +9
-0@@ -604,3 +604,23 @@ int omap3_ctrl_save_padconf(void) }#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ + +#if defined(CONFIG_SOC_AM33XX ) && defined(CONFIG_PM ) +void am33xx_txev_eoi (void ) +{ +omap_ctrl_writel (AM33XX_M3_TXEV_ACK ,AM33XX_CONTROL_M3_TXEV_EOI ); +} + +void am33xx_txev_enable (void ) +{
arch/arm/mach-omap2/control.c int omap3_ctrl_save_padconf(void) · line 625
Quoted 10 lines
arch/arm/mach-omap2/control.c +10
-0+omap_ctrl_writel (AM33XX_M3_TXEV_ENABLE ,AM33XX_CONTROL_M3_TXEV_EOI ); +} + +void am33xx_wkup_m3_ipc_cmd (struct am33xx_ipc_data *data) +{ +omap_ctrl_writel (data->resume_addr,AM33XX_CONTROL_IPC_MSG_REG0 ); +omap_ctrl_writel (data->sleep_mode,AM33XX_CONTROL_IPC_MSG_REG1 ); +omap_ctrl_writel (data->param1,AM33XX_CONTROL_IPC_MSG_REG2 ); +omap_ctrl_writel (data->param2,AM33XX_CONTROL_IPC_MSG_REG3 ); +}
Could you please add some kerneldoc-style comments to these functions so others can understand what they're intended to do, any side-effects they have, any prerequisites, etc.?
- Paul
PATCH v3 9/9 ARM: OMAP2+: AM33XX: control: Add some control module registers and APIs
Hi Paul,
Quoted 44 lines · Paul Walmsley
Hi Vaibhav,
a comment on this one:
Quoted 38 lines · Vaibhav Bedia
Add minimal APIs for writing to the IPC and the
M3_TXEVregisters in the Control module. These will be used in a subsequent patch which adds suspend-resume support for AM33XX.Signed-off-by Vaibhav Bedia <[email protected]>Acked-by Peter Korsgaard <[email protected]>---
v3: Add Peter's Acked-by
v2: No changearch/arm/mach-omap2/control.c | 20 ++++++++++++++++++++ arch/arm/mach-omap2/control.h | 41 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+)arch/arm/mach-omap2/control.c +15
-0@@ -604,3 +604,23 @@ int omap3_ctrl_save_padconf(void) }#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ + +#if defined(CONFIG_SOC_AM33XX ) && defined(CONFIG_PM ) +void am33xx_txev_eoi (void ) +{ +omap_ctrl_writel (AM33XX_M3_TXEV_ACK ,AM33XX_CONTROL_M3_TXEV_EOI ); +} + +void am33xx_txev_enable (void ) +{ +omap_ctrl_writel (AM33XX_M3_TXEV_ENABLE ,AM33XX_CONTROL_M3_TXEV_EOI ); +} + +void am33xx_wkup_m3_ipc_cmd (struct am33xx_ipc_data *data) +{ +omap_ctrl_writel (data->resume_addr,AM33XX_CONTROL_IPC_MSG_REG0 );
Quoted 9 lines
arch/arm/mach-omap2/control.c int omap3_ctrl_save_padconf(void) · line 625
Quoted 4 lines
arch/arm/mach-omap2/control.c +4
-0+omap_ctrl_writel (data->sleep_mode,AM33XX_CONTROL_IPC_MSG_REG1 ); +omap_ctrl_writel (data->param1,AM33XX_CONTROL_IPC_MSG_REG2 ); +omap_ctrl_writel (data->param2,AM33XX_CONTROL_IPC_MSG_REG3 ); +}Could you please add some kerneldoc-style comments to these functions so others can understand what they're intended to do, any side-effects they have, any prerequisites, etc.?
Sure. Will do that in the next version and post it separately.
Thanks,
Vaibhav
v3 cover ARM: OMAP2+: AM33XX: Misc fixes/updates
In reply to Vaibhav BediaVaibhav,
Quoted 8 lines · Vaibhav Bedia
Hi,
The following patches were earlier posted as part the AM33XX suspend-resume support series [1]. Based on the suggestion from Santosh Shilimkar <[email protected]> i have split out the changes which update the various data files related to AM33XX support.
Quoted 8 lines
These patches apply on top of v3.8-rc5
v1->v2: Address the comments received from Sergei Shtylyov and Peter Korsgaard.
v2->v3: Address an additional comment from Peter Korgaard and add his Acked-by to the patches
Just a suggestion here...
I saw v2 of $subject series just today morning and in just few hours, I see v3 as well. You should at least let v2 settle down for a while :-)
Collecting tags and minor update can always be done once you gather sufficient comments to warrant a re-spin.
Regards,
Santosh
v3 cover ARM: OMAP2+: AM33XX: Misc fixes/updates
Quoted 19 lines · Santosh
Vaibhav,
Quoted 8 lines · Vaibhav Bedia
Hi,
The following patches were earlier posted as part the AM33XX suspend-resume support series [1]. Based on the suggestion from Santosh Shilimkar <[email protected]> i have split out the changes which update the various data files related to AM33XX support.
Quoted 8 lines
These patches apply on top of v3.8-rc5
v1->v2: Address the comments received from Sergei Shtylyov and Peter Korsgaard.
v2->v3: Address an additional comment from Peter Korgaard and add his Acked-by to the patches
Quoted 8 lines
Just a suggestion here...
I saw v2 of $subject series just today morning and in just few hours, I see v3 as well. You should at least let v2 settle down for a while :-)
Collecting tags and minor update can always be done once you gather sufficient comments to warrant a re-spin.
OK. v1 has been in the wild for more than 10 days without any more comments so I went aggressive on v3 :)
Regards,
Vaibhav
Paul Walmsley
maintainerv3 cover ARM: OMAP2+: AM33XX: Misc fixes/updates
In reply to Vaibhav BediaHi,
Quoted 5 lines · Vaibhav Bedia
The following patches were earlier posted as part the AM33XX suspend-resume support series [1]. Based on the suggestion from Santosh Shilimkar <[email protected]> i have split out the changes which update the various data files related to AM33XX support.
Thanks, queued patches 1-8. 9 looks reasonable to me once documentation is added. One caveat is that I'm unable to test these patches at the moment due to the appended DTB issue here, but they seem pretty straightforward.
- Paul