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ARM: EXYNOS: Map SYSRAM through generic SRAM bindings

PATCH Superseded Sachin Kamat 4 participants 9 messages May 1, 2014 – May 2, 2014

Subsystems (4)
Device tree bindings Arm (32-bit) Arm sub-architectures Arm Samsung Exynos

v1 of 3 Superseded Latest is v3 →

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Sachin Kamat

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#0 lore raw

PATCH 1/2 ARM: EXYNOS: Map SYSRAM through generic SRAM bindings

Instead of hardcoding the SYSRAM details for each SoC, pass this information through device tree (DT) and make the code SoC agnostic. Generic SRAM bindings are used for achieving this.

Signed-off-by Sachin Kamat <[email protected]>
Cc Heiko Stuebner <[email protected]>
Cc Arnd Bergmann <[email protected]>

---
This patch is based on linux next (next-20140501) on top of my Kconfig consolidation patch
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/28642

Tested on 4210/4412 Origen, 5250/5420 Arndale and SMDK5420 boards.

---
 arch/arm/Kconfig                                |    1 +
 arch/arm/boot/dts/exynos4210-universal_c210.dts |   17 ++++++
 arch/arm/boot/dts/exynos4210.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos4x12.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos5250.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos5420.dtsi               |   18 +++++++
 arch/arm/mach-exynos/common.h                   |    1 +
 arch/arm/mach-exynos/exynos.c                   |   64 -----------------------
 arch/arm/mach-exynos/firmware.c                 |    5 +-
 arch/arm/mach-exynos/include/mach/map.h         |    7 ---
 arch/arm/mach-exynos/platsmp.c                  |   39 +++++++++++++-
 11 files changed, 133 insertions(+), 73 deletions(-)
arch/arm/Kconfig +1 -0
index a6aaaad19b1a..f66ea9453df9 100644
@@ -855,6 +855,7 @@ config ARCH_EXYNOS
 	select S5P_DEV_MFC
 	select SAMSUNG_DMADEV
 	select SPARSE_IRQ
+	select SRAM
 	select USE_OF
 	help
 	  Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
arch/arm/boot/dts/exynos4210-universal_c210.dts +17 -0
index 63e34b24b04f..8d4de5c0d0c7 100644
@@ -28,6 +28,23 @@
 		bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1";
 	};
 
+	sram at 02020000 {
+		status = "disabled";
+	};
+
+	sram at 02025000 {
+		compatible = "mmio-sram";
+		reg = <0x02025000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x02025000 0x1000>;
+
+		smp-sram at 0 {
+			compatible = "samsung,exynos4210-sram";
+			reg = <0x0 0x1000>;
+		};
+	};
+
 	mct at 10050000 {
 		compatible = "none";
 	};
arch/arm/boot/dts/exynos4210.dtsi +18 -0
index cacf6140dd2f..d3d727b0c263 100644
@@ -31,6 +31,24 @@
 		pinctrl2 = &pinctrl_2;
 	};
 
+	sram at 02020000 {
+		compatible = "mmio-sram";
+		reg = <0x02020000 0x20000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x02020000 0x20000>;
+
+		smp-sram at 0 {
+			compatible = "samsung,exynos4210-sram";
+			reg = <0x0 0x1000>;
+		};
+
+		smp-sram at 1f000 {
+			compatible = "samsung,exynos4210-sram-ns";
+			reg = <0x1f000 0x1000>;
+		};
+	};
+
 	pd_lcd1: lcd1-power-domain at 10023CA0 {
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x10023CA0 0x20>;
arch/arm/boot/dts/exynos4x12.dtsi +18 -0
index c4a9306f8529..75fb3e7e3999 100644
@@ -37,6 +37,24 @@
 		interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
 	};
 
+	sram at 02020000 {
+		compatible = "mmio-sram";
+		reg = <0x02020000 0x40000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x02020000 0x40000>;
+
+		smp-sram at 0 {
+			compatible = "samsung,exynos4210-sram";
+			reg = <0x0 0x1000>;
+		};
+
+		smp-sram at 2f000 {
+			compatible = "samsung,exynos4210-sram-ns";
+			reg = <0x2f000 0x1000>;
+		};
+	};
+
 	pd_isp: isp-power-domain at 10023CA0 {
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x10023CA0 0x20>;
arch/arm/boot/dts/exynos5250.dtsi +18 -0
index 37423314a028..8d724d56a5c6 100644
@@ -72,6 +72,24 @@
 		};
 	};
 
+	sram at 02020000 {
+		compatible = "mmio-sram";
+		reg = <0x02020000 0x30000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x02020000 0x30000>;
+
+		smp-sram at 0 {
+			compatible = "samsung,exynos4210-sram";
+			reg = <0x0 0x1000>;
+		};
+
+		smp-sram at 2f000 {
+			compatible = "samsung,exynos4210-sram-ns";
+			reg = <0x2f000 0x1000>;
+		};
+	};
+
 	pd_gsc: gsc-power-domain at 10044000 {
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x10044000 0x20>;
arch/arm/boot/dts/exynos5420.dtsi +18 -0
index c3a9a66c5767..ff496adfabde 100644
@@ -110,6 +110,24 @@
 		};
 	};
 
+	sram at 02020000 {
+		compatible = "mmio-sram";
+		reg = <0x02020000 0x54000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x02020000 0x54000>;
+
+		smp-sram at 0 {
+			compatible = "samsung,exynos4210-sram";
+			reg = <0x0 0x1000>;
+		};
+
+		smp-sram at 53000 {
+			compatible = "samsung,exynos4210-sram-ns";
+			reg = <0x53000 0x1000>;
+		};
+	};
+
 	clock: clock-controller at 10010000 {
 		compatible = "samsung,exynos5420-clock";
 		reg = <0x10010000 0x30000>;
arch/arm/mach-exynos/common.h +1 -0
index 9ef3f83efaff..47cbab0f008e 100644
@@ -18,6 +18,7 @@
 void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
 
 struct map_desc;
+extern void __iomem *sram_ns_base_addr;
 void exynos_init_io(void);
 void exynos_restart(enum reboot_mode mode, const char *cmd);
 void exynos_cpuidle_init(void);
arch/arm/mach-exynos/exynos.c +0 -64

82 lines not on this page · raw message

arch/arm/mach-exynos/firmware.c +4 -1
index 932129ef26c6..455e7802e52e 100644
@@ -18,6 +18,7 @@
 
 #include <mach/map.h>
 
+#include "common.h"
 #include "smc.h"
 
 static int exynos_do_idle(void)

@@ -34,7 +35,9 @@ static int exynos_cpu_boot(int cpu)
 
 static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
 {
-	void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu;
+	void __iomem *boot_reg;
+
+	boot_reg = sram_ns_base_addr + 0x1c + 4*cpu;
 
 	__raw_writel(boot_addr, boot_reg);
 	return 0;
arch/arm/mach-exynos/include/mach/map.h +0 -7
index 7b046b59d9ec..548269a60634 100644
@@ -23,13 +23,6 @@
 
 #include <plat/map-s5p.h>
 
-#define EXYNOS4_PA_SYSRAM0		0x02025000
-#define EXYNOS4_PA_SYSRAM1		0x02020000
-#define EXYNOS5_PA_SYSRAM		0x02020000
-#define EXYNOS4210_PA_SYSRAM_NS		0x0203F000
-#define EXYNOS4x12_PA_SYSRAM_NS		0x0204F000
-#define EXYNOS5250_PA_SYSRAM_NS		0x0204F000
-
 #define EXYNOS_PA_CHIPID		0x10000000
 
 #define EXYNOS4_PA_SYSCON		0x10010000
arch/arm/mach-exynos/platsmp.c +38 -1
index 03e5e9f94705..4315b4821361 100644
@@ -20,6 +20,7 @@
 #include <linux/jiffies.h>
 #include <linux/smp.h>
 #include <linux/io.h>
+#include <linux/of_address.h>
 
 #include <asm/cacheflush.h>
 #include <asm/smp_plat.h>

@@ -33,11 +34,41 @@
 
 extern void exynos4_secondary_startup(void);
 
+static void __iomem *sram_base_addr;
+void __iomem *sram_ns_base_addr;
+
+static int __init exynos_smp_prepare_sram(void)
+{
+	struct device_node *node;
+
+	node = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-sram");
+	if (!node)
+		return -ENODEV;
+
+	sram_base_addr = of_iomap(node, 0);
+	if (!sram_base_addr) {
+		pr_err("Secondary CPU boot address not found\n");
+		return -ENODEV;
+	}
+
+	node = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-sram-ns");
+	if (!node)
+		return -ENODEV;
+
+	sram_ns_base_addr = of_iomap(node, 0);
+	if (!sram_ns_base_addr) {
+		pr_err("Secondary CPU boot address not found\n");
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
 static inline void __iomem *cpu_boot_reg_base(void)
 {
 	if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
 		return S5P_INFORM5;
-	return S5P_VA_SYSRAM;
+	return sram_base_addr;
 }
 
 static inline void __iomem *cpu_boot_reg(int cpu)

@@ -91,6 +122,9 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
 	unsigned long timeout;
 	unsigned long phys_cpu = cpu_logical_map(cpu);
 
+	if (!cpu_boot_reg_base())
+		return -EINVAL;
+
 	/*
 	 * Set synchronisation state between this boot processor
 	 * and the secondary one

@@ -205,6 +239,9 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
 	if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
 		scu_enable(scu_base_addr());
 
+	if (exynos_smp_prepare_sram())
+		return;
+
 	/*
 	 * Write the address of secondary startup into the
 	 * system-wide flags register. The boot monitor waits
Signature · 1 line
1.7.9.5
author
#1 lore raw

PATCH 2/2 Documentation: DT: Exynos: Bind SRAM though DT

Add SRAM binding documentation.

Signed-off-by Sachin Kamat <[email protected]>
---
 .../devicetree/bindings/arm/exynos/smp-sram.txt    |   38 ++++++++++++++++++++
 1 file changed, 38 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/exynos/smp-sram.txt
Documentation/devicetree/bindings/arm/exynos/smp-sram.txt new file +38 -0
new file mode 100644
index 000000000000..9969ca22b6af
@@ -0,0 +1,38 @@
+Samsung Exynos SRAM for SMP bringup:
+------------------------------------
+
+Samsung SMP-capable Exynos SoCs use part of the SRAM for the bringup
+of the cores. Once the core gets powered up it executes the code
+that is residing at some specific location of the SRAM.
+
+Therefore reserved section sub-nodes have to be added to the mmio-sram
+declaration. These nodes are of two types depending upon secure or
+non-secure execution environment.
+
+Required sub-node properties:
+- compatible : should be
+		"samsung,exynos4210-sram" : Secure SYSRAM
+		"samsung,exynos4210-sram-ns" : Non-secure SYSRAM
+
+The rest of the properties should follow the generic mmio-sram discription
+found in ../../misc/sram.txt
+
+Example:
+
+	sram at 02020000 {
+		compatible = "mmio-sram";
+		reg = <0x02020000 0x54000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x02020000 0x54000>;
+
+		smp-sram at 0 {
+			compatible = "samsung,exynos4210-sram";
+			reg = <0x0 0x1000>;
+		};
+
+		smp-sram at 53000 {
+			compatible = "samsung,exynos4210-sram-ns";
+			reg = <0x53000 0x1000>;
+		};
+	};
Signature · 1 line
1.7.9.5
#2 lore raw

PATCH 1/2 ARM: EXYNOS: Map SYSRAM through generic SRAM bindings

In reply to Sachin Kamat

Hi Sachin,

Am Donnerstag, 1. Mai 2014, 16:14:44 schrieb Sachin Kamat:

Quoted 8 lines

Instead of hardcoding the SYSRAM details for each SoC, pass this information through device tree (DT) and make the code SoC agnostic. Generic SRAM bindings are used for achieving this.

Signed-off-by Sachin Kamat <[email protected]>
Cc Heiko Stuebner <[email protected]>
Cc Arnd Bergmann <[email protected]>

very cool :-).

I've found one little thing I do not understand, which I describe below. Otherwise

Acked-by Heiko Stuebner <[email protected]>
Quoted 48 lines

---
This patch is based on linux next (next-20140501) on top of my Kconfig consolidation patch
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/28642

Tested on 4210/4412 Origen, 5250/5420 Arndale and SMDK5420 boards.

---
 arch/arm/Kconfig                                |    1 +
 arch/arm/boot/dts/exynos4210-universal_c210.dts |   17 ++++++
 arch/arm/boot/dts/exynos4210.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos4x12.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos5250.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos5420.dtsi               |   18 +++++++
 arch/arm/mach-exynos/common.h                   |    1 +
 arch/arm/mach-exynos/exynos.c                   |   64
----------------------- arch/arm/mach-exynos/firmware.c                 |  
 5 +-
 arch/arm/mach-exynos/include/mach/map.h         |    7 ---
 arch/arm/mach-exynos/platsmp.c                  |   39 +++++++++++++-
 11 files changed, 133 insertions(+), 73 deletions(-)
arch/arm/Kconfig +1 -0
index a6aaaad19b1a..f66ea9453df9 100644
@@ -855,6 +855,7 @@ config ARCH_EXYNOS
 	select S5P_DEV_MFC
 	select SAMSUNG_DMADEV
 	select SPARSE_IRQ
+	select SRAM
 	select USE_OF
 	help
 	  Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
(quoted diff) +0 -0

b/arch/arm/boot/dts/exynos4210-universal_c210.dts index 63e34b24b04f..8d4de5c0d0c7 100644

arch/arm/boot/dts/exynos4210-universal_c210.dts +6 -0
@@ -28,6 +28,23 @@
 		bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait
 earlyprintk panic=5 maxcpus=1"; };
 
+	sram@02020000 {
+		status = "disabled";
+	};
+
+	sram@02025000 {
+		compatible = "mmio-sram";

arch/arm/boot/dts/exynos4210-universal_c210.dts line 46

Quoted 10 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +10 -0
+		reg = <0x02025000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x02025000 0x1000>;
+
+		smp-sram@0 {
+			compatible = "samsung,exynos4210-sram";
+			reg = <0x0 0x1000>;
+		};
+	};

exynos_smp_prepare_sram returns -ENODEV if it can't find samsung,exynos4210-sram-ns, so are you sure your universal_c210 will run without it? I didn't dig to deep into this, so it can also simply be something I overlooked :-)

Heiko

#3 lore raw

PATCH 1/2 ARM: EXYNOS: Map SYSRAM through generic SRAM bindings

Quoted 13 lines · Heiko St?bner

Hi Sachin,

Am Donnerstag, 1. Mai 2014, 16:14:44 schrieb Sachin Kamat:

Quoted 8 lines

Instead of hardcoding the SYSRAM details for each SoC, pass this information through device tree (DT) and make the code SoC agnostic. Generic SRAM bindings are used for achieving this.

Signed-off-by Sachin Kamat <[email protected]>
Cc Heiko Stuebner <[email protected]>
Cc Arnd Bergmann <[email protected]>
Quoted 22 lines

very cool :-).

I've found one little thing I do not understand, which I describe below. Otherwise

Acked-by Heiko Stuebner <[email protected]>
Quoted 16 lines

---
This patch is based on linux next (next-20140501) on top of my Kconfig consolidation patch
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/28642

Tested on 4210/4412 Origen, 5250/5420 Arndale and SMDK5420 boards.

---
 arch/arm/Kconfig                                |    1 +
 arch/arm/boot/dts/exynos4210-universal_c210.dts |   17 ++++++
 arch/arm/boot/dts/exynos4210.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos4x12.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos5250.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos5420.dtsi               |   18 +++++++
 arch/arm/mach-exynos/common.h                   |    1 +
 arch/arm/mach-exynos/exynos.c                   |   64

----------------------- arch/arm/mach-exynos/firmware.c

|

Quoted 41 lines
Quoted 23 lines

5 +-

 arch/arm/mach-exynos/include/mach/map.h         |    7 ---
 arch/arm/mach-exynos/platsmp.c                  |   39 +++++++++++++-
 11 files changed, 133 insertions(+), 73 deletions(-)
arch/arm/Kconfig +1 -0
index a6aaaad19b1a..f66ea9453df9 100644
@@ -855,6 +855,7 @@ config ARCH_EXYNOS
 	select S5P_DEV_MFC
 	select SAMSUNG_DMADEV
 	select SPARSE_IRQ
+	select SRAM
 	select USE_OF
 	help
 	  Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
(quoted diff) +0 -0

b/arch/arm/boot/dts/exynos4210-universal_c210.dts index 63e34b24b04f..8d4de5c0d0c7 100644

arch/arm/boot/dts/exynos4210-universal_c210.dts line 28

Quoted 1 line
arch/arm/boot/dts/exynos4210-universal_c210.dts +0 -0
@@ -28,6 +28,23 @@
 		bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw

rootwait

Quoted 16 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +14 -0
 earlyprintk panic=5 maxcpus=1"; };
 
+	sram at 02020000 {
+		status = "disabled";
+	};
+
+	sram at 02025000 {
+		compatible = "mmio-sram";
+		reg = <0x02025000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x02025000 0x1000>;
+
+		smp-sram at 0 {
+			compatible = "samsung,exynos4210-sram";
+			reg = <0x0 0x1000>;
Quoted 9 lines

arch/arm/boot/dts/exynos4210-universal_c210.dts line 46

Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +2 -0
+		};
+	};

exynos_smp_prepare_sram returns -ENODEV if it can't find samsung,exynos4210-sram-ns, so are you sure your universal_c210 will run without it? I didn't dig to deep into this, so it can also simply be something
I overlooked :-)

Hi Andrzej and Tomasz,

Can you please check above?

- Kukjin

author
#4 lore raw

PATCH 1/2 ARM: EXYNOS: Map SYSRAM through generic SRAM bindings

Quoted 87 lines · Kukjin Kim
Quoted 13 lines · Heiko St?bner

Hi Sachin,

Am Donnerstag, 1. Mai 2014, 16:14:44 schrieb Sachin Kamat:

Quoted 8 lines

Instead of hardcoding the SYSRAM details for each SoC, pass this information through device tree (DT) and make the code SoC agnostic. Generic SRAM bindings are used for achieving this.

Signed-off-by Sachin Kamat <[email protected]>
Cc Heiko Stuebner <[email protected]>
Cc Arnd Bergmann <[email protected]>
Quoted 22 lines

very cool :-).

I've found one little thing I do not understand, which I describe below. Otherwise

Acked-by Heiko Stuebner <[email protected]>
Quoted 16 lines

---
This patch is based on linux next (next-20140501) on top of my Kconfig consolidation patch
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/28642

Tested on 4210/4412 Origen, 5250/5420 Arndale and SMDK5420 boards.

---
 arch/arm/Kconfig                                |    1 +
 arch/arm/boot/dts/exynos4210-universal_c210.dts |   17 ++++++
 arch/arm/boot/dts/exynos4210.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos4x12.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos5250.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos5420.dtsi               |   18 +++++++
 arch/arm/mach-exynos/common.h                   |    1 +
 arch/arm/mach-exynos/exynos.c                   |   64

----------------------- arch/arm/mach-exynos/firmware.c

|

Quoted 41 lines
Quoted 23 lines

5 +-

 arch/arm/mach-exynos/include/mach/map.h         |    7 ---
 arch/arm/mach-exynos/platsmp.c                  |   39 +++++++++++++-
 11 files changed, 133 insertions(+), 73 deletions(-)
arch/arm/Kconfig +1 -0
index a6aaaad19b1a..f66ea9453df9 100644
@@ -855,6 +855,7 @@ config ARCH_EXYNOS
    select S5P_DEV_MFC
    select SAMSUNG_DMADEV
    select SPARSE_IRQ
+   select SRAM
    select USE_OF
    help
      Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
(quoted diff) +0 -0

b/arch/arm/boot/dts/exynos4210-universal_c210.dts index 63e34b24b04f..8d4de5c0d0c7 100644

arch/arm/boot/dts/exynos4210-universal_c210.dts line 28

Quoted 1 line
arch/arm/boot/dts/exynos4210-universal_c210.dts +0 -0
@@ -28,6 +28,23 @@
            bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw

rootwait

Quoted 16 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +14 -0
 earlyprintk panic=5 maxcpus=1"; };
 
+   sram at 02020000 {
+           status = "disabled";
+   };
+
+   sram at 02025000 {
+           compatible = "mmio-sram";
+           reg = <0x02025000 0x1000>;
+           #address-cells = <1>;
+           #size-cells = <1>;
+           ranges = <0 0x02025000 0x1000>;
+
+           smp-sram at 0 {
+                   compatible = "samsung,exynos4210-sram";
+                   reg = <0x0 0x1000>;
Quoted 9 lines

arch/arm/boot/dts/exynos4210-universal_c210.dts line 46

Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +2 -0
+           };
+   };

exynos_smp_prepare_sram returns -ENODEV if it can't find samsung,exynos4210-sram-ns, so are you sure your universal_c210 will run without it? I didn't dig to deep into this, so it can also simply be something
I overlooked :-)

Quoted 3 lines

Hi Andrzej and Tomasz,

Can you please check above?

Please test v2 of this series.

Signature · 2 lines
With warm regards,
Sachin
author
#5 lore raw

PATCH 1/2 ARM: EXYNOS: Map SYSRAM through generic SRAM bindings

In reply to Heiko Stübner

Hi Heiko,

Quoted 8 lines · Heiko St?bner

Hi Sachin,

Am Donnerstag, 1. Mai 2014, 16:14:44 schrieb Sachin Kamat:

Quoted 5 lines

Instead of hardcoding the SYSRAM details for each SoC, pass this information through device tree (DT) and make the code SoC agnostic. Generic SRAM bindings are used for achieving this.

Quoted 5 lines
Quoted 3 lines
Signed-off-by Sachin Kamat <[email protected]>
Cc Heiko Stuebner <[email protected]>
Cc Arnd Bergmann <[email protected]>

very cool :-).

Thanks :)

Quoted 60 lines

I've found one little thing I do not understand, which I describe below. Otherwise

Acked-by Heiko Stuebner <[email protected]>
Quoted 55 lines

---
This patch is based on linux next (next-20140501) on top of my Kconfig consolidation patch
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/28642

Tested on 4210/4412 Origen, 5250/5420 Arndale and SMDK5420 boards.

---
 arch/arm/Kconfig                                |    1 +
 arch/arm/boot/dts/exynos4210-universal_c210.dts |   17 ++++++
 arch/arm/boot/dts/exynos4210.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos4x12.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos5250.dtsi               |   18 +++++++
 arch/arm/boot/dts/exynos5420.dtsi               |   18 +++++++
 arch/arm/mach-exynos/common.h                   |    1 +
 arch/arm/mach-exynos/exynos.c                   |   64
----------------------- arch/arm/mach-exynos/firmware.c                 |
 5 +-
 arch/arm/mach-exynos/include/mach/map.h         |    7 ---
 arch/arm/mach-exynos/platsmp.c                  |   39 +++++++++++++-
 11 files changed, 133 insertions(+), 73 deletions(-)
arch/arm/Kconfig +1 -0
index a6aaaad19b1a..f66ea9453df9 100644
@@ -855,6 +855,7 @@ config ARCH_EXYNOS
      select S5P_DEV_MFC
      select SAMSUNG_DMADEV
      select SPARSE_IRQ
+     select SRAM
      select USE_OF
      help
        Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
(quoted diff) +0 -0

b/arch/arm/boot/dts/exynos4210-universal_c210.dts index 63e34b24b04f..8d4de5c0d0c7 100644

arch/arm/boot/dts/exynos4210-universal_c210.dts +13 -0
@@ -28,6 +28,23 @@
              bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait
 earlyprintk panic=5 maxcpus=1"; };
 
+     sram at 02020000 {
+             status = "disabled";
+     };
+
+     sram at 02025000 {
+             compatible = "mmio-sram";
+             reg = <0x02025000 0x1000>;
+             #address-cells = <1>;
+             #size-cells = <1>;
+             ranges = <0 0x02025000 0x1000>;
+
+             smp-sram at 0 {
+                     compatible = "samsung,exynos4210-sram";
Quoted 8 lines

arch/arm/boot/dts/exynos4210-universal_c210.dts line 46

Quoted 3 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +3 -0
+                     reg = <0x0 0x1000>;
+             };
+     };

exynos_smp_prepare_sram returns -ENODEV if it can't find samsung,exynos4210-sram-ns, so are you sure your universal_c210 will run without it? I didn't dig to deep into this, so it can also simply be something I overlooked :-)

Actually I do not have a universal_c210 board and hence could not check on it and
thus this point got overlooked. Thanks for spotting it and you are right. There shouldn't
be a error return if second node is not present as it is optional. I will modify accordingly
and send this patch again. Thanks for your review and Ack :)

Signature · 2 lines
With warm regards,
Sachin
#6 lore raw

PATCH 1/2 ARM: EXYNOS: Map SYSRAM through generic SRAM bindings

In reply to Sachin Kamat
Quoted 9 lines · On Thursday 01 May 2014 16:14:44 Sachin Kamat wrote:

Instead of hardcoding the SYSRAM details for each SoC, pass this information through device tree (DT) and make the code SoC agnostic. Generic SRAM bindings are used for achieving this.

Signed-off-by Sachin Kamat <[email protected]>
Cc Heiko Stuebner <[email protected]>
Cc Arnd Bergmann <[email protected]>

Looks good to me. Both patches

Acked-by Arnd Bergmann <[email protected]>

Heiko, can you also have a look?

#7 lore raw

PATCH 1/2 ARM: EXYNOS: Map SYSRAM through generic SRAM bindings

Am Donnerstag, 1. Mai 2014, 15:32:14 schrieb Arnd Bergmann:

Quoted 10 lines · On Thursday 01 May 2014 16:14:44 Sachin Kamat wrote:
Quoted 8 lines

Instead of hardcoding the SYSRAM details for each SoC, pass this information through device tree (DT) and make the code SoC agnostic. Generic SRAM bindings are used for achieving this.

Signed-off-by Sachin Kamat <[email protected]>
Cc Heiko Stuebner <[email protected]>
Cc Arnd Bergmann <[email protected]>
Quoted 5 lines

Looks good to me. Both patches

Acked-by Arnd Bergmann <[email protected]>

Heiko, can you also have a look?

Already did :-)

#8 lore raw

PATCH 1/2 ARM: EXYNOS: Map SYSRAM through generic SRAM bindings

Quoted 11 lines · Heiko St?bner

Am Donnerstag, 1. Mai 2014, 15:32:14 schrieb Arnd Bergmann:

Quoted 10 lines · On Thursday 01 May 2014 16:14:44 Sachin Kamat wrote:
Quoted 8 lines

Instead of hardcoding the SYSRAM details for each SoC, pass this information through device tree (DT) and make the code SoC agnostic. Generic SRAM bindings are used for achieving this.

Signed-off-by Sachin Kamat <[email protected]>
Cc Heiko Stuebner <[email protected]>
Cc Arnd Bergmann <[email protected]>
Quoted 7 lines
Quoted 5 lines

Looks good to me. Both patches

Acked-by Arnd Bergmann <[email protected]>

Heiko, can you also have a look?

Already did :-)

Thanks you guys ;-)

I will take this series when I get confirmation of universal-c210's behavior from Andrzej or Tomasz.

- Kukjin