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omap-common/hwinit-common.c: Mark omap_rev_string as static

PATCH New Tom Rini 3 participants 6 messages May 31, 2013 – Jun 3, 2013 Arm (32-bit)

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Tom Rini

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#0 lore raw

PATCH 1/3 omap-common/hwinit-common.c: Mark omap_rev_string as static

Only called in this file, mark as static.

---
 arch/arm/cpu/armv7/omap-common/hwinit-common.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/cpu/armv7/omap-common/hwinit-common.c +1 -1
index 1645120..e614641 100644
@@ -84,7 +84,7 @@ u32 cortex_rev(void)
 	return rev;
 }
 
-void omap_rev_string(void)
+static void omap_rev_string(void)
 {
 	u32 omap_rev = omap_revision();
 	u32 soc_variant	= (omap_rev & 0xF0000000) >> 28;
Signature · 1 line
1.7.9.5
author
#1 lore raw

PATCH 2/3 am33xx: Correct NON_SECURE_SRAM_START/END

Prior to Sricharan's cleanup of the boot parameter saving code, we did not make use of NON_SECURE_SRAM_START on am33xx, so it wasn't a problem that the address was pointing to the middle of our running SPL. Correct to point to the base location of the download image area. Increase CONFIG_SPL_TEXT_BASE to account for this scratch area being used. As part of correcting these tests, make use of the fact that we've always been placing our stack outside of the download image area (which is fine, once the downloaded image is run, ROM is gone) so correct the max size test to be the ROM defined top of the download area to where we link/load at.

---
 arch/arm/include/asm/arch-am33xx/omap.h |    4 ++--
 include/configs/am335x_evm.h            |   10 ++++++++--
 include/configs/igep0033.h              |   10 ++++++++--
 include/configs/pcm051.h                |   10 ++++++++--
 4 files changed, 26 insertions(+), 8 deletions(-)
arch/arm/include/asm/arch-am33xx/omap.h +2 -2
index 7e3bb9c..db15159 100644
@@ -29,8 +29,8 @@
  * at 0x40304000(EMU base) so that our code works for both EMU and GP
  */
 #ifdef CONFIG_AM33XX
-#define NON_SECURE_SRAM_START	0x40304000
-#define NON_SECURE_SRAM_END	0x4030E000
+#define NON_SECURE_SRAM_START	0x402F0400
+#define NON_SECURE_SRAM_END	0x40310000
 #elif defined(CONFIG_TI814X)
 #define NON_SECURE_SRAM_START	0x40300000
 #define NON_SECURE_SRAM_END	0x40320000
include/configs/am335x_evm.h +8 -2
index f019134..a4777c7 100644
@@ -305,8 +305,14 @@
 /* Defines for SPL */
 #define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE		0x402F0400
-#define CONFIG_SPL_MAX_SIZE		(101 * 1024)
+/*
+ * Place the image at the start of the ROM defined image space and leave
+ * space for SRAM scratch entries (see arch/arm/include/omap_common.h).
+ * We limit our size to the ROM-defined dowloaded image area, and use the
+ * rest of the space for stack.
+ */
+#define CONFIG_SPL_TEXT_BASE		0x402F0500
+#define CONFIG_SPL_MAX_SIZE		(0x4030C000 - CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
 
 #define CONFIG_SPL_BSS_START_ADDR	0x80000000
include/configs/igep0033.h +8 -2
index 1912d7d..dd26d9c 100644
@@ -214,8 +214,14 @@
 /* Defines for SPL */
 #define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE		0x402F0400
-#define CONFIG_SPL_MAX_SIZE		(101 * 1024)
+/*
+ * Place the image at the start of the ROM defined image space and leave
+ * space for SRAM scratch entries (see arch/arm/include/omap_common.h).
+ * We limit our size to the ROM-defined dowloaded image area, and use the
+ * rest of the space for stack.
+ */
+#define CONFIG_SPL_TEXT_BASE		0x402F0500
+#define CONFIG_SPL_MAX_SIZE		(0x4030C000 - CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
 
 #define CONFIG_SPL_BSS_START_ADDR	0x80000000
include/configs/pcm051.h +8 -2
index 478f805..a7d01f1 100644
@@ -204,8 +204,14 @@
 /* Defines for SPL */
 #define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE		0x402F0400
-#define CONFIG_SPL_MAX_SIZE		(101 * 1024)
+/*
+ * Place the image at the start of the ROM defined image space and leave
+ * space for SRAM scratch entries (see arch/arm/include/omap_common.h).
+ * We limit our size to the ROM-defined dowloaded image area, and use the
+ * rest of the space for stack.
+ */
+#define CONFIG_SPL_TEXT_BASE		0x402F0500
+#define CONFIG_SPL_MAX_SIZE		(0x4030C000 - CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
 
 #define CONFIG_SPL_BSS_START_ADDR	0x80000000
Signature · 1 line
1.7.9.5
#2 lore raw

PATCH 2/3 am33xx: Correct NON_SECURE_SRAM_START/END

Quoted 1 line
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Quoted 1 line

"Tom" == Tom Rini <[email protected]> writes:

Tom> Prior to Sricharan's cleanup of the boot parameter saving code, we Tom> did not make use of NON_SECURE_SRAM_START on am33xx, so it wasn't a Tom> problem that the address was pointing to the middle of our running SPL. Tom> Correct to point to the base location of the download image area. Tom> Increase CONFIG_SPL_TEXT_BASE to account for this scratch area being Tom> used. As part of correcting these tests, make use of the fact that Tom> we've always been placing our stack outside of the download image area Tom> (which is fine, once the downloaded image is run, ROM is gone) so Tom> correct the max size test to be the ROM defined top of the download area Tom> to where we link/load at.

Tom> Signed-off-by: Tom Rini <[email protected]>
Tom> ---

 Tom>  arch/arm/include/asm/arch-am33xx/omap.h |    4 ++--
 Tom>  include/configs/am335x_evm.h            |   10 ++++++++--
 Tom>  include/configs/igep0033.h              |   10 ++++++++--
 Tom>  include/configs/pcm051.h                |   10 ++++++++--

Tom> 4 files changed, 26 insertions(+), 8 deletions(-)

Tom> diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h Tom> index 7e3bb9c..db15159 100644
Tom> --- a/arch/arm/include/asm/arch-am33xx/omap.h
Tom> +++ b/arch/arm/include/asm/arch-am33xx/omap.h
Tom> @@ -29,8 +29,8 @@
Tom> * at 0x40304000(EMU base) so that our code works for both EMU and GP
Tom> */
Tom> #ifdef CONFIG_AM33XX
Tom> -#define NON_SECURE_SRAM_START 0x40304000
Tom> -#define NON_SECURE_SRAM_END 0x4030E000
Tom> +#define NON_SECURE_SRAM_START 0x402F0400
Tom> +#define NON_SECURE_SRAM_END 0x40310000

 Tom>  #elif defined(CONFIG_TI814X)
 Tom>  #define NON_SECURE_SRAM_START	0x40300000
 Tom>  #define NON_SECURE_SRAM_END	0x40320000
 Tom> diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
 Tom> index f019134..a4777c7 100644
 Tom> --- a/include/configs/am335x_evm.h
 Tom> +++ b/include/configs/am335x_evm.h
 Tom> @@ -305,8 +305,14 @@
 Tom>  /* Defines for SPL */
 Tom>  #define CONFIG_SPL
 Tom>  #define CONFIG_SPL_FRAMEWORK

Tom> -#define CONFIG_SPL_TEXT_BASE 0x402F0400
Tom> -#define CONFIG_SPL_MAX_SIZE (101 * 1024)
Tom> +/*
Tom> + * Place the image at the start of the ROM defined image space and leave Tom> + * space for SRAM scratch entries (see arch/arm/include/omap_common.h). Tom> + * We limit our size to the ROM-defined dowloaded image area, and use the

s/dowloaded/downloaded/

Tom> + * rest of the space for stack.
Tom> + */
Tom> +#define CONFIG_SPL_TEXT_BASE 0x402F0500
Tom> +#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
Tom> #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR

Tom> #define CONFIG_SPL_BSS_START_ADDR 0x80000000
Tom> diff --git a/include/configs/igep0033.h b/include/configs/igep0033.h Tom> index 1912d7d..dd26d9c 100644
Tom> --- a/include/configs/igep0033.h
Tom> +++ b/include/configs/igep0033.h
Tom> @@ -214,8 +214,14 @@

 Tom>  /* Defines for SPL */
 Tom>  #define CONFIG_SPL
 Tom>  #define CONFIG_SPL_FRAMEWORK

Tom> -#define CONFIG_SPL_TEXT_BASE 0x402F0400
Tom> -#define CONFIG_SPL_MAX_SIZE (101 * 1024)
Tom> +/*
Tom> + * Place the image at the start of the ROM defined image space and leave Tom> + * space for SRAM scratch entries (see arch/arm/include/omap_common.h). Tom> + * We limit our size to the ROM-defined dowloaded image area, and use the

s/dowloaded/downloaded/

Tom> + * rest of the space for stack.
Tom> + */
Tom> +#define CONFIG_SPL_TEXT_BASE 0x402F0500
Tom> +#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
Tom> #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR

Tom> #define CONFIG_SPL_BSS_START_ADDR 0x80000000
Tom> diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h Tom> index 478f805..a7d01f1 100644
Tom> --- a/include/configs/pcm051.h
Tom> +++ b/include/configs/pcm051.h
Tom> @@ -204,8 +204,14 @@

 Tom>  /* Defines for SPL */
 Tom>  #define CONFIG_SPL
 Tom>  #define CONFIG_SPL_FRAMEWORK

Tom> -#define CONFIG_SPL_TEXT_BASE 0x402F0400
Tom> -#define CONFIG_SPL_MAX_SIZE (101 * 1024)
Tom> +/*
Tom> + * Place the image at the start of the ROM defined image space and leave Tom> + * space for SRAM scratch entries (see arch/arm/include/omap_common.h). Tom> + * We limit our size to the ROM-defined dowloaded image area, and use the

s/dowloaded/downloaded/

Otherwise it looks good.

Signature · 1 line
Bye, Peter Korsgaard
author
#3 lore raw

PATCH 2/3 am33xx: Correct NON_SECURE_SRAM_START/END

Quoted 12 lines · Peter Korsgaard
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line

"Tom" == Tom Rini <[email protected]> writes:

Tom> Prior to Sricharan's cleanup of the boot parameter saving code, we Tom> did not make use of NON_SECURE_SRAM_START on am33xx, so it wasn't a Tom> problem that the address was pointing to the middle of our running SPL. Tom> Correct to point to the base location of the download image area. Tom> Increase CONFIG_SPL_TEXT_BASE to account for this scratch area being Tom> used. As part of correcting these tests, make use of the fact that Tom> we've always been placing our stack outside of the download image area Tom> (which is fine, once the downloaded image is run, ROM is gone) so Tom> correct the max size test to be the ROM defined top of the download area Tom> to where we link/load at.

[snip]

Quoted 3 lines

Tom> + * We limit our size to the ROM-defined dowloaded image area, and use the

s/dowloaded/downloaded/

And copy/pasted to the other configs, oops, fixed in all 3. If there's no other feedback, I'll refrain from a v2 posting and just include the typo correction when I merge it middle of next week, thanks!

Signature · 8 lines
Tom
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author
#4 lore raw

PATCH 3/3 am33xx/omap: Move save_omap_boot_params to omap-common/boot-common.c

In reply to Tom Rini

We need to call the save_omap_boot_params function on am33xx/ti81xx and other newer TI SoCs, so move the function to boot-common. Only OMAP4+ has the omap_hw_init_context function so add ifdefs to not call it on am33xx/ti81xx. Call save_omap_boot_params from s_init on am33xx/ti81xx boards.

---
 arch/arm/cpu/armv7/omap-common/boot-common.c   |   39 ++++++++++++++++++++++++
 arch/arm/cpu/armv7/omap-common/hwinit-common.c |   36 ----------------------
 arch/arm/include/asm/arch-am33xx/sys_proto.h   |    1 +
 arch/arm/include/asm/arch-omap4/sys_proto.h    |    1 +
 arch/arm/include/asm/arch-omap5/sys_proto.h    |    1 +
 board/isee/igep0033/board.c                    |    9 ++++++
 board/phytec/pcm051/board.c                    |    9 ++++++
 board/ti/am335x/board.c                        |    9 ++++++
 board/ti/ti814x/evm.c                          |    9 ++++++
 9 files changed, 78 insertions(+), 36 deletions(-)
arch/arm/cpu/armv7/omap-common/boot-common.c +39 -0
index bff7e9c..76ae1b6 100644
@@ -25,6 +25,45 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+void save_omap_boot_params(void)
+{
+	u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
+	u8 boot_device;
+	u32 dev_desc, dev_data;
+
+	if ((rom_params <  NON_SECURE_SRAM_START) ||
+	    (rom_params > NON_SECURE_SRAM_END))
+		return;
+
+	/*
+	 * rom_params can be type casted to omap_boot_parameters and
+	 * used. But it not correct to assume that romcode structure
+	 * encoding would be same as u-boot. So use the defined offsets.
+	 */
+	gd->arch.omap_boot_params.omap_bootdevice = boot_device =
+				   *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
+
+	gd->arch.omap_boot_params.ch_flags =
+				*((u8 *)(rom_params + CH_FLAGS_OFFSET));
+
+	if ((boot_device >= MMC_BOOT_DEVICES_START) &&
+	    (boot_device <= MMC_BOOT_DEVICES_END)) {
+#if !defined(CONFIG_AM33XX) && !defined(CONFIG_TI81XX)
+		if ((omap_hw_init_context() ==
+				      OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
+			gd->arch.omap_boot_params.omap_bootmode =
+			*((u8 *)(rom_params + BOOT_MODE_OFFSET));
+		} else
+#endif
+		{
+			dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
+			dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
+			gd->arch.omap_boot_params.omap_bootmode =
+					*((u32 *)(dev_data + BOOT_MODE_OFFSET));
+		}
+	}
+}
+
 #ifdef CONFIG_SPL_BUILD
 u32 spl_boot_device(void)
 {
arch/arm/cpu/armv7/omap-common/hwinit-common.c +0 -36
index e614641..0776d5c 100644
@@ -111,42 +111,6 @@ void __weak srcomp_enable(void)
 {
 }
 
-static void save_omap_boot_params(void)
-{
-	u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
-	u8 boot_device;
-	u32 dev_desc, dev_data;
-
-	if ((rom_params <  NON_SECURE_SRAM_START) ||
-	    (rom_params > NON_SECURE_SRAM_END))
-		return;
-
-	/*
-	 * rom_params can be type casted to omap_boot_parameters and
-	 * used. But it not correct to assume that romcode structure
-	 * encoding would be same as u-boot. So use the defined offsets.
-	 */
-	gd->arch.omap_boot_params.omap_bootdevice = boot_device =
-				   *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
-
-	gd->arch.omap_boot_params.ch_flags =
-				*((u8 *)(rom_params + CH_FLAGS_OFFSET));
-
-	if ((boot_device >= MMC_BOOT_DEVICES_START) &&
-	    (boot_device <= MMC_BOOT_DEVICES_END)) {
-		if ((omap_hw_init_context() ==
-				      OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
-			gd->arch.omap_boot_params.omap_bootmode =
-			*((u8 *)(rom_params + BOOT_MODE_OFFSET));
-		} else {
-			dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
-			dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
-			gd->arch.omap_boot_params.omap_bootmode =
-					*((u32 *)(dev_data + BOOT_MODE_OFFSET));
-		}
-	}
-}
-
 #ifdef CONFIG_ARCH_CPU_INIT
 /*
  * SOC specific cpu init
arch/arm/include/asm/arch-am33xx/sys_proto.h +1 -0
index c913b5f..fedc674 100644
@@ -30,6 +30,7 @@ int print_cpuinfo(void);
 
 extern struct ctrl_stat *cstat;
 u32 get_device_type(void);
+void save_omap_boot_params(void);
 void setup_clocks_for_console(void);
 void ddr_pll_config(unsigned int ddrpll_M);
 
arch/arm/include/asm/arch-omap4/sys_proto.h +1 -0
index 039a1f2..ef85594 100644
@@ -54,6 +54,7 @@ void cancel_out(u32 *num, u32 *den, u32 den_limit);
 void sdram_init(void);
 u32 omap_sdram_size(void);
 u32 cortex_rev(void);
+void save_omap_boot_params(void);
 void init_omap_revision(void);
 void do_io_settings(void);
 void omap_vc_init(u16 speed_khz);
arch/arm/include/asm/arch-omap5/sys_proto.h +1 -0
index b79161d..4d99db9 100644
@@ -58,6 +58,7 @@ void cancel_out(u32 *num, u32 *den, u32 den_limit);
 void sdram_init(void);
 u32 omap_sdram_size(void);
 u32 cortex_rev(void);
+void save_omap_boot_params(void);
 void init_omap_revision(void);
 void do_io_settings(void);
 void omap_vc_init(u16 speed_khz);
board/isee/igep0033/board.c +9 -0
index d315516..826cead 100644
@@ -105,6 +105,15 @@ static struct emif_regs ddr3_emif_reg_data = {
  */
 void s_init(void)
 {
+	/*
+	 * Save the boot parameters passed from romcode.
+	 * We cannot delay the saving further than this,
+	 * to prevent overwrites.
+	 */
+#ifdef CONFIG_SPL_BUILD
+	save_omap_boot_params();
+#endif
+
 	/* WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
 	 */
board/phytec/pcm051/board.c +9 -0
index 43d7b6e..93c611d 100644
@@ -115,6 +115,15 @@ static struct emif_regs ddr3_emif_reg_data = {
 void s_init(void)
 {
 	/*
+	 * Save the boot parameters passed from romcode.
+	 * We cannot delay the saving further than this,
+	 * to prevent overwrites.
+	 */
+#ifdef CONFIG_SPL_BUILD
+	save_omap_boot_params();
+#endif
+
+	/*
 	 * WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
 	 */
board/ti/am335x/board.c +9 -0
index b371376..ebddf0c 100644
@@ -304,6 +304,15 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
  */
 void s_init(void)
 {
+	/*
+	 * Save the boot parameters passed from romcode.
+	 * We cannot delay the saving further than this,
+	 * to prevent overwrites.
+	 */
+#ifdef CONFIG_SPL_BUILD
+	save_omap_boot_params();
+#endif
+
 	/* WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
 	 */
board/ti/ti814x/evm.c +9 -0
index 7adb524..4759b16 100644
@@ -149,6 +149,15 @@ static const struct ddr_data evm_ddr2_data = {
 void s_init(void)
 {
 #ifdef CONFIG_SPL_BUILD
+	/*
+	 * Save the boot parameters passed from romcode.
+	 * We cannot delay the saving further than this,
+	 * to prevent overwrites.
+	 */
+#ifdef CONFIG_SPL_BUILD
+	save_omap_boot_params();
+#endif
+
 	/* WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
 	 */
Signature · 1 line
1.7.9.5
#5 lore raw

PATCH 3/3 am33xx/omap: Move save_omap_boot_params to omap-common/boot-common.c

Quoted 47 lines · Tom Rini

We need to call the save_omap_boot_params function on am33xx/ti81xx and other newer TI SoCs, so move the function to boot-common. Only OMAP4+ has the omap_hw_init_context function so add ifdefs to not call it on am33xx/ti81xx. Call save_omap_boot_params from s_init on am33xx/ti81xx boards.

---
 arch/arm/cpu/armv7/omap-common/boot-common.c   |   39 ++++++++++++++++++++++++
 arch/arm/cpu/armv7/omap-common/hwinit-common.c |   36 ----------------------
 arch/arm/include/asm/arch-am33xx/sys_proto.h   |    1 +
 arch/arm/include/asm/arch-omap4/sys_proto.h    |    1 +
 arch/arm/include/asm/arch-omap5/sys_proto.h    |    1 +
 board/isee/igep0033/board.c                    |    9 ++++++
 board/phytec/pcm051/board.c                    |    9 ++++++
 board/ti/am335x/board.c                        |    9 ++++++
 board/ti/ti814x/evm.c                          |    9 ++++++
 9 files changed, 78 insertions(+), 36 deletions(-)
arch/arm/cpu/armv7/omap-common/boot-common.c +20 -0
index bff7e9c..76ae1b6 100644
@@ -25,6 +25,45 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+void save_omap_boot_params(void)
+{
+	u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
+	u8 boot_device;
+	u32 dev_desc, dev_data;
+
+	if ((rom_params <  NON_SECURE_SRAM_START) ||
+	    (rom_params > NON_SECURE_SRAM_END))
+		return;
+
+	/*
+	 * rom_params can be type casted to omap_boot_parameters and
+	 * used. But it not correct to assume that romcode structure
+	 * encoding would be same as u-boot. So use the defined offsets.
+	 */
+	gd->arch.omap_boot_params.omap_bootdevice = boot_device =
+				   *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
+
+	gd->arch.omap_boot_params.ch_flags =
+				*((u8 *)(rom_params + CH_FLAGS_OFFSET));

arch/arm/cpu/armv7/omap-common/boot-common.c line 57

Quoted 10 lines
arch/arm/cpu/armv7/omap-common/boot-common.c +10 -0
+
+	if ((boot_device >= MMC_BOOT_DEVICES_START) &&
+	    (boot_device <= MMC_BOOT_DEVICES_END)) {
+#if !defined(CONFIG_AM33XX) && !defined(CONFIG_TI81XX)
+		if ((omap_hw_init_context() ==
+				      OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
+			gd->arch.omap_boot_params.omap_bootmode =
+			*((u8 *)(rom_params + BOOT_MODE_OFFSET));
+		} else
+#endif

This is fine, as long as omap_bootmode is not required in u-boot, which i think is the case now.

Quoted 165 lines
arch/arm/cpu/armv7/omap-common/boot-common.c +9 -0
+		{
+			dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
+			dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
+			gd->arch.omap_boot_params.omap_bootmode =
+					*((u32 *)(dev_data + BOOT_MODE_OFFSET));
+		}
+	}
+}
+
 #ifdef CONFIG_SPL_BUILD
 u32 spl_boot_device(void)
 {
arch/arm/cpu/armv7/omap-common/hwinit-common.c +0 -36
index e614641..0776d5c 100644
@@ -111,42 +111,6 @@ void __weak srcomp_enable(void)
 {
 }
 
-static void save_omap_boot_params(void)
-{
-	u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
-	u8 boot_device;
-	u32 dev_desc, dev_data;
-
-	if ((rom_params <  NON_SECURE_SRAM_START) ||
-	    (rom_params > NON_SECURE_SRAM_END))
-		return;
-
-	/*
-	 * rom_params can be type casted to omap_boot_parameters and
-	 * used. But it not correct to assume that romcode structure
-	 * encoding would be same as u-boot. So use the defined offsets.
-	 */
-	gd->arch.omap_boot_params.omap_bootdevice = boot_device =
-				   *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
-
-	gd->arch.omap_boot_params.ch_flags =
-				*((u8 *)(rom_params + CH_FLAGS_OFFSET));
-
-	if ((boot_device >= MMC_BOOT_DEVICES_START) &&
-	    (boot_device <= MMC_BOOT_DEVICES_END)) {
-		if ((omap_hw_init_context() ==
-				      OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
-			gd->arch.omap_boot_params.omap_bootmode =
-			*((u8 *)(rom_params + BOOT_MODE_OFFSET));
-		} else {
-			dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
-			dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
-			gd->arch.omap_boot_params.omap_bootmode =
-					*((u32 *)(dev_data + BOOT_MODE_OFFSET));
-		}
-	}
-}
-
 #ifdef CONFIG_ARCH_CPU_INIT
 /*
  * SOC specific cpu init
arch/arm/include/asm/arch-am33xx/sys_proto.h +1 -0
index c913b5f..fedc674 100644
@@ -30,6 +30,7 @@ int print_cpuinfo(void);
 
 extern struct ctrl_stat *cstat;
 u32 get_device_type(void);
+void save_omap_boot_params(void);
 void setup_clocks_for_console(void);
 void ddr_pll_config(unsigned int ddrpll_M);
 
arch/arm/include/asm/arch-omap4/sys_proto.h +1 -0
index 039a1f2..ef85594 100644
@@ -54,6 +54,7 @@ void cancel_out(u32 *num, u32 *den, u32 den_limit);
 void sdram_init(void);
 u32 omap_sdram_size(void);
 u32 cortex_rev(void);
+void save_omap_boot_params(void);
 void init_omap_revision(void);
 void do_io_settings(void);
 void omap_vc_init(u16 speed_khz);
arch/arm/include/asm/arch-omap5/sys_proto.h +1 -0
index b79161d..4d99db9 100644
@@ -58,6 +58,7 @@ void cancel_out(u32 *num, u32 *den, u32 den_limit);
 void sdram_init(void);
 u32 omap_sdram_size(void);
 u32 cortex_rev(void);
+void save_omap_boot_params(void);
 void init_omap_revision(void);
 void do_io_settings(void);
 void omap_vc_init(u16 speed_khz);
board/isee/igep0033/board.c +9 -0
index d315516..826cead 100644
@@ -105,6 +105,15 @@ static struct emif_regs ddr3_emif_reg_data = {
  */
 void s_init(void)
 {
+	/*
+	 * Save the boot parameters passed from romcode.
+	 * We cannot delay the saving further than this,
+	 * to prevent overwrites.
+	 */
+#ifdef CONFIG_SPL_BUILD
+	save_omap_boot_params();
+#endif
+
 	/* WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
 	 */
board/phytec/pcm051/board.c +9 -0
index 43d7b6e..93c611d 100644
@@ -115,6 +115,15 @@ static struct emif_regs ddr3_emif_reg_data = {
 void s_init(void)
 {
 	/*
+	 * Save the boot parameters passed from romcode.
+	 * We cannot delay the saving further than this,
+	 * to prevent overwrites.
+	 */
+#ifdef CONFIG_SPL_BUILD
+	save_omap_boot_params();
+#endif
+
+	/*
 	 * WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
 	 */
board/ti/am335x/board.c +9 -0
index b371376..ebddf0c 100644
@@ -304,6 +304,15 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
  */
 void s_init(void)
 {
+	/*
+	 * Save the boot parameters passed from romcode.
+	 * We cannot delay the saving further than this,
+	 * to prevent overwrites.
+	 */
+#ifdef CONFIG_SPL_BUILD
+	save_omap_boot_params();
+#endif
+
 	/* WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
 	 */
board/ti/ti814x/evm.c +2 -0
index 7adb524..4759b16 100644
@@ -149,6 +149,15 @@ static const struct ddr_data evm_ddr2_data = {
 void s_init(void)
 {
 #ifdef CONFIG_SPL_BUILD
+	/*
+	 * Save the boot parameters passed from romcode.

board/ti/ti814x/evm.c static const struct ddr_data evm_ddr2_data = { · line 163

Quoted 10 lines
board/ti/ti814x/evm.c +7 -0
+	 * We cannot delay the saving further than this,
+	 * to prevent overwrites.
+	 */
+#ifdef CONFIG_SPL_BUILD
+	save_omap_boot_params();
+#endif
+
 	/* WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
 	 */

Regards,
Sricharan