Make tzpc initialization common for exynos4 and exynos5

PATCH New Inderpal Singh 2 participants 5 messages Apr 5, 2013 – Jun 4, 2013

Subsystems (3)

Arm (32-bit) Arm Samsung Exynos Arm/actions semi architecture

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Inderpal Singh

author

2013-04-05 09:09 UTC #0 lore raw

v3 cover Make tzpc initialization common for exynos4 and exynos5

The first patch moves the tzpc_init file from smdk5250 to armv7/exynos. The second makes tzpc common for exynos4 and exynos5. And the third makes necessary changes to exynos4 based origen and smdkv310 boards.

The patchset has been tested on exynos4 based origen and exynos5 based Arndale board.

Changes in v2:
- removed uninitialised warning for start and end variables
- corrected the SPL_TEXT_BASE for origen and smdkv310
- Added Chander's Acked-by

Changes in v3:
As per Minkyu:
- renamed the file as tzpc.c
- implemented the samsung_get_base_tzpc
- removed the TZPCx_BASE macros and used samsung_get_base_tzpc

Inderpal Singh (3):
exynos: move tzpc_init to armv7/exynos
exynos: update tzpc to make it common for exynos4 and exynos5
exynos: Update origen and smdkv310 to use common tzpc_init

 arch/arm/cpu/armv7/exynos/Makefile      |    2 +-
 arch/arm/cpu/armv7/exynos/tzpc.c        |   57 +++++++++++++++++++++++++++++
 arch/arm/cpu/armv7/s5p-common/Makefile  |    2 ++
 arch/arm/include/asm/arch-exynos/cpu.h  |    4 +++
 arch/arm/include/asm/arch-exynos/tzpc.h |   20 +++++++++++
 board/samsung/origen/lowlevel_init.S    |   44 ++---------------------
 board/samsung/origen/origen_setup.h     |   25 -------------
 board/samsung/smdk5250/Makefile         |    1 -
 board/samsung/smdk5250/lowlevel_init.S  |    2 ++
 board/samsung/smdk5250/setup.h          |   25 -------------
 board/samsung/smdk5250/tzpc_init.c      |   48 -------------------------
 board/samsung/smdkv310/lowlevel_init.S  |   60 ++-----------------------------
 include/configs/exynos5250-dt.h         |    2 --
 include/configs/origen.h                |    2 ++
 include/configs/smdkv310.h              |    2 ++
 spl/Makefile                            |    4 +++
 16 files changed, 98 insertions(+), 202 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/exynos/tzpc.c
 delete mode 100644 board/samsung/smdk5250/tzpc_init.c

Signature · 1 line

1.7.9.5

Inderpal Singh

author

2013-04-05 09:09 UTC #1 lore raw

PATCH v3 1/3 exynos: move tzpc_init to armv7/exynos

tzpc_init is common for all exynos5 boards, hence move it to armv7/exynos so that all other boards can use it.

Also update the smdk5250 Makefile and config file.

Signed-off-by Inderpal Singh <[email protected]>

Acked-by Chander Kashyap <[email protected]>

---
 arch/arm/cpu/armv7/exynos/Makefile      |    2 +-
 arch/arm/cpu/armv7/exynos/tzpc.c        |   48 +++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/tzpc.h |   28 ++++++++++++++++++
 board/samsung/smdk5250/Makefile         |    1 -
 board/samsung/smdk5250/setup.h          |   25 ----------------
 board/samsung/smdk5250/tzpc_init.c      |   48 -------------------------------
 include/configs/exynos5250-dt.h         |    2 --
 7 files changed, 77 insertions(+), 77 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/exynos/tzpc.c
 delete mode 100644 board/samsung/smdk5250/tzpc_init.c

arch/arm/cpu/armv7/exynos/Makefile +1 -1

index 9119961..b2f9152 100644
@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(SOC).o
 
-COBJS	+= clock.o power.o soc.o system.o pinmux.o
+COBJS	+= clock.o power.o soc.o system.o pinmux.o tzpc.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))

arch/arm/cpu/armv7/exynos/tzpc.c new file +48 -0

48 lines not on this page · raw message

arch/arm/include/asm/arch-exynos/tzpc.h +28 -0

index c5eb4b1..050ad70 100644
@@ -47,6 +47,34 @@ struct exynos_tzpc {
 	unsigned int pcellid2;
 	unsigned int pcellid3;
 };
+
+/* TZPC : Register Offsets */
+#define TZPC0_BASE		0x10100000
+#define TZPC1_BASE		0x10110000
+#define TZPC2_BASE		0x10120000
+#define TZPC3_BASE		0x10130000
+#define TZPC4_BASE		0x10140000
+#define TZPC5_BASE		0x10150000
+#define TZPC6_BASE		0x10160000
+#define TZPC7_BASE		0x10170000
+#define TZPC8_BASE		0x10180000
+#define TZPC9_BASE		0x10190000
+
+#define TZPC_BASE_OFFSET		0x10000
+
+/*
+ * TZPC Register Value :
+ * R0SIZE: 0x0 : Size of secured ram
+ */
+#define R0SIZE			0x0
+
+/*
+ * TZPC Decode Protection Register Value :
+ * DECPROTXSET: 0xFF : Set Decode region to non-secure
+ */
+#define DECPROTXSET		0xFF
+void tzpc_init(void);
+
 #endif
 
 #endif

board/samsung/smdk5250/Makefile +0 -1

index 47c6a5a..d079f4c 100644
@@ -28,7 +28,6 @@ SOBJS	:= lowlevel_init.o
 
 COBJS	:= clock_init.o
 COBJS	+= dmc_common.o dmc_init_ddr3.o
-COBJS	+= tzpc_init.o
 COBJS	+= smdk5250_spl.o
 
 ifndef CONFIG_SPL_BUILD

board/samsung/smdk5250/setup.h +0 ~~-25~~

index 34d8bc3..eb91d13 100644
@@ -28,18 +28,6 @@
 #include <config.h>
 #include <asm/arch/dmc.h>
 
-/* TZPC : Register Offsets */
-#define TZPC0_BASE		0x10100000
-#define TZPC1_BASE		0x10110000
-#define TZPC2_BASE		0x10120000
-#define TZPC3_BASE		0x10130000
-#define TZPC4_BASE		0x10140000
-#define TZPC5_BASE		0x10150000
-#define TZPC6_BASE		0x10160000
-#define TZPC7_BASE		0x10170000
-#define TZPC8_BASE		0x10180000
-#define TZPC9_BASE		0x10190000
-
 /* APLL_CON1	*/
 #define APLL_CON1_VAL	(0x00203800)

@@ -458,18 +446,6 @@
 /* CLK_GATE_IP_DISP1 */
 #define CLK_GATE_DP1_ALLOW	(1 << 4)
 
-/*
- * TZPC Register Value :
- * R0SIZE: 0x0 : Size of secured ram
- */
-#define R0SIZE			0x0
-
-/*
- * TZPC Decode Protection Register Value :
- * DECPROTXSET: 0xFF : Set Decode region to non-secure
- */
-#define DECPROTXSET		0xFF
-
 #define DDR3PHY_CTRL_PHY_RESET	(1 << 0)
 #define DDR3PHY_CTRL_PHY_RESET_OFF	(0 << 0)

@@ -590,5 +566,4 @@ void update_reset_dll(struct exynos5_dmc *, enum ddr_mode);
 void sdelay(unsigned long);
 void mem_ctrl_init(void);
 void system_clock_init(void);
-void tzpc_init(void);
 #endif

board/samsung/smdk5250/tzpc_init.c deleted +0 ~~-48~~

48 lines not on this page · raw message

include/configs/exynos5250-dt.h +0 -2

index 496a194..0b17d8f 100644
@@ -93,8 +93,6 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	EXYNOS_DEVICE_SETTINGS
 
-#define TZPC_BASE_OFFSET		0x10000
-
 /* SD/MMC configuration */
 #define CONFIG_GENERIC_MMC
 #define CONFIG_MMC

Signature · 1 line

1.7.9.5

Inderpal Singh

author

2013-04-05 09:09 UTC #2 lore raw

PATCH v3 2/3 exynos: update tzpc to make it common for exynos4 and exynos5

In reply to Inderpal Singh

This requires that cpu_is_exynos4/5 should be made available before tzpc_init. Hence this patch also makes necessary changes to have cpu_info in spl and invokes arch_cpu_init before tzpc_init in low_level_init.S for smdk5250.

Signed-off-by Inderpal Singh <[email protected]>

Acked-by Chander Kashyap <[email protected]>

---
 arch/arm/cpu/armv7/exynos/tzpc.c        |   23 ++++++++++++++++-------
 arch/arm/cpu/armv7/s5p-common/Makefile  |    2 ++
 arch/arm/include/asm/arch-exynos/cpu.h  |    4 ++++
 arch/arm/include/asm/arch-exynos/tzpc.h |   14 +++-----------
 board/samsung/smdk5250/lowlevel_init.S  |    2 ++
 spl/Makefile                            |    4 ++++
 6 files changed, 31 insertions(+), 18 deletions(-)

arch/arm/cpu/armv7/exynos/tzpc.c +16 -7

index 81adb4b..f5e8e9c 100644
@@ -22,6 +22,7 @@
  * MA 02111-1307 USA
  */
 
+#include <common.h>
 #include <asm/arch/tzpc.h>
 #include <asm/io.h>

@@ -29,20 +30,28 @@
 void tzpc_init(void)
 {
 	struct exynos_tzpc *tzpc;
-	unsigned int addr;
+	unsigned int addr, start = 0, end = 0;
 
-	for (addr = TZPC0_BASE; addr <= TZPC9_BASE; addr += TZPC_BASE_OFFSET) {
+	start = samsung_get_base_tzpc();
+
+	if (cpu_is_exynos5())
+		end = start + ((EXYNOS5_NR_TZPC_BANKS - 1) * TZPC_BASE_OFFSET);
+	else if (cpu_is_exynos4())
+		end = start + ((EXYNOS4_NR_TZPC_BANKS - 1) * TZPC_BASE_OFFSET);
+
+	for (addr = start; addr <= end; addr += TZPC_BASE_OFFSET) {
 		tzpc = (struct exynos_tzpc *)addr;
 
-		if (addr == TZPC0_BASE)
+		if (addr == start)
 			writel(R0SIZE, &tzpc->r0size);
 
 		writel(DECPROTXSET, &tzpc->decprot0set);
 		writel(DECPROTXSET, &tzpc->decprot1set);
 
-		if (addr != TZPC9_BASE) {
-			writel(DECPROTXSET, &tzpc->decprot2set);
-			writel(DECPROTXSET, &tzpc->decprot3set);
-		}
+		if (cpu_is_exynos5() && (addr == end))
+			break;
+
+		writel(DECPROTXSET, &tzpc->decprot2set);
+		writel(DECPROTXSET, &tzpc->decprot3set);
 	}
 }

arch/arm/cpu/armv7/s5p-common/Makefile +2 -0

index 1705399..0c38bd0 100644
@@ -26,9 +26,11 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)libs5p-common.o
 
 COBJS-y		+= cpu_info.o
+ifndef CONFIG_SPL_BUILD
 COBJS-y		+= timer.o
 COBJS-y		+= sromc.o
 COBJS-$(CONFIG_PWM)	+= pwm.o
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y) $(SOBJS))

arch/arm/include/asm/arch-exynos/cpu.h +4 -0

index f76e489..36b98c8 100644
@@ -38,6 +38,7 @@
 #define EXYNOS4_CLOCK_BASE		0x10030000
 #define EXYNOS4_SYSTIMER_BASE		0x10050000
 #define EXYNOS4_WATCHDOG_BASE		0x10060000
+#define EXYNOS4_TZPC_BASE		0x10110000
 #define EXYNOS4_MIU_BASE		0x10600000
 #define EXYNOS4_DMC0_BASE		0x10400000
 #define EXYNOS4_DMC1_BASE		0x10410000

@@ -74,6 +75,7 @@
 #define EXYNOS4X12_CLOCK_BASE		0x10030000
 #define EXYNOS4X12_SYSTIMER_BASE	0x10050000
 #define EXYNOS4X12_WATCHDOG_BASE	0x10060000
+#define EXYNOS4X12_TZPC_BASE		0x10110000
 #define EXYNOS4X12_DMC0_BASE		0x10600000
 #define EXYNOS4X12_DMC1_BASE		0x10610000
 #define EXYNOS4X12_GPIO_PART4_BASE	0x106E0000

@@ -107,6 +109,7 @@
 #define EXYNOS5_POWER_BASE		0x10040000
 #define EXYNOS5_SWRESET			0x10040400
 #define EXYNOS5_SYSREG_BASE		0x10050000
+#define EXYNOS5_TZPC_BASE		0x10100000
 #define EXYNOS5_WATCHDOG_BASE		0x101D0000
 #define EXYNOS5_ACE_SFR_BASE            0x10830000
 #define EXYNOS5_DMC_PHY0_BASE		0x10C00000

@@ -233,6 +236,7 @@ SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
 SAMSUNG_BASE(power, POWER_BASE)
 SAMSUNG_BASE(spi, SPI_BASE)
 SAMSUNG_BASE(spi_isp, SPI_ISP_BASE)
+SAMSUNG_BASE(tzpc, TZPC_BASE)
 #endif
 
 #endif	/* _EXYNOS4_CPU_H */

arch/arm/include/asm/arch-exynos/tzpc.h +3 ~~-11~~

index 050ad70..4d9c3a3 100644
@@ -48,18 +48,10 @@ struct exynos_tzpc {
 	unsigned int pcellid3;
 };
 
-/* TZPC : Register Offsets */
-#define TZPC0_BASE		0x10100000
-#define TZPC1_BASE		0x10110000
-#define TZPC2_BASE		0x10120000
-#define TZPC3_BASE		0x10130000
-#define TZPC4_BASE		0x10140000
-#define TZPC5_BASE		0x10150000
-#define TZPC6_BASE		0x10160000
-#define TZPC7_BASE		0x10170000
-#define TZPC8_BASE		0x10180000
-#define TZPC9_BASE		0x10190000
+#define EXYNOS4_NR_TZPC_BANKS		6
+#define EXYNOS5_NR_TZPC_BANKS		10
 
+/* TZPC : Register Offsets */
 #define TZPC_BASE_OFFSET		0x10000
 
 /*

board/samsung/smdk5250/lowlevel_init.S +2 -0

index bc6cb6f..edc565e 100644
@@ -75,12 +75,14 @@ lowlevel_init:
 	bl	mem_ctrl_init
 
 1:
+	bl	arch_cpu_init
 	bl	tzpc_init
 	ldmia	r13!, {ip,pc}
 
 wakeup_reset:
 	bl	system_clock_init
 	bl	mem_ctrl_init
+	bl	arch_cpu_init
 	bl	tzpc_init
 
 exit_wakeup:

spl/Makefile +4 -0

index b5a8de7..cdbaa7f 100644
@@ -94,6 +94,10 @@ LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o
 LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o
 endif
 
+ifeq ($(SOC),exynos)
+LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
+endif
+
 # Add GCC lib
 ifeq ("$(USE_PRIVATE_LIBGCC)", "yes")
 PLATFORM_LIBGCC = $(SPLTREE)/arch/$(ARCH)/lib/libgcc.o

Signature · 1 line

1.7.9.5

Inderpal Singh

author

2013-04-05 09:09 UTC #3 lore raw

PATCH v3 3/3 exynos: Update origen and smdkv310 to use common tzpc_init

In reply to Inderpal Singh

Signed-off-by Inderpal Singh <[email protected]>

Acked-by Chander Kashyap <[email protected]>

---
 board/samsung/origen/lowlevel_init.S   |   44 ++---------------------
 board/samsung/origen/origen_setup.h    |   25 -------------
 board/samsung/smdkv310/lowlevel_init.S |   60 ++------------------------------
 include/configs/origen.h               |    2 ++
 include/configs/smdkv310.h             |    2 ++
 5 files changed, 8 insertions(+), 125 deletions(-)

board/samsung/origen/lowlevel_init.S +2 ~~-42~~

index 9daa0da..be9d418 100644
@@ -87,12 +87,14 @@ lowlevel_init:
 1:
 	/* for UART */
 	bl uart_asm_init
+	bl arch_cpu_init
 	bl tzpc_init
 	pop	{pc}
 
 wakeup_reset:
 	bl system_clock_init
 	bl mem_ctrl_asm_init
+	bl arch_cpu_init
 	bl tzpc_init
 
 exit_wakeup:

@@ -353,45 +355,3 @@ uart_asm_init:
 	nop
 	nop
 
-/* Setting TZPC[TrustZone Protection Controller] */
-tzpc_init:
-	ldr	r0, =TZPC0_BASE
-	mov	r1, #R0SIZE
-	str	r1, [r0]
-	mov	r1, #DECPROTXSET
-	str	r1, [r0, #TZPC_DECPROT0SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT1SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT2SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT3SET_OFFSET]
-
-	ldr	r0, =TZPC1_BASE
-	str	r1, [r0, #TZPC_DECPROT0SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT1SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT2SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT3SET_OFFSET]
-
-	ldr	r0, =TZPC2_BASE
-	str	r1, [r0, #TZPC_DECPROT0SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT1SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT2SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT3SET_OFFSET]
-
-	ldr	r0, =TZPC3_BASE
-	str	r1, [r0, #TZPC_DECPROT0SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT1SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT2SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT3SET_OFFSET]
-
-	ldr	r0, =TZPC4_BASE
-	str	r1, [r0, #TZPC_DECPROT0SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT1SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT2SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT3SET_OFFSET]
-
-	ldr	r0, =TZPC5_BASE
-	str	r1, [r0, #TZPC_DECPROT0SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT1SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT2SET_OFFSET]
-	str	r1, [r0, #TZPC_DECPROT3SET_OFFSET]
-
-	mov	pc, lr

board/samsung/origen/origen_setup.h +0 ~~-25~~

index 930b948..926a4cc 100644
@@ -121,19 +121,6 @@
 #define UBRDIV_OFFSET		0x28
 #define UFRACVAL_OFFSET		0x2C
 
-/* TZPC : Register Offsets */
-#define TZPC0_BASE		0x10110000
-#define TZPC1_BASE		0x10120000
-#define TZPC2_BASE		0x10130000
-#define TZPC3_BASE		0x10140000
-#define TZPC4_BASE		0x10150000
-#define TZPC5_BASE		0x10160000
-
-#define TZPC_DECPROT0SET_OFFSET	0x804
-#define TZPC_DECPROT1SET_OFFSET	0x810
-#define TZPC_DECPROT2SET_OFFSET	0x81C
-#define TZPC_DECPROT3SET_OFFSET	0x828
-
 /* CLK_SRC_CPU */
 #define MUX_HPM_SEL_MOUTAPLL		0x0
 #define MUX_HPM_SEL_SCLKMPLL		0x1

@@ -617,16 +604,4 @@
  * UBRFRACVAL = ((((800MHz*10/(115200*16) -10))%10)*16/10)
  */
 #define UFRACVAL_VAL		0x4
-
-/*
- * TZPC Register Value :
- * R0SIZE: 0x0 : Size of secured ram
- */
-#define R0SIZE			0x0
-
-/*
- * TZPC Decode Protection Register Value :
- * DECPROTXSET: 0xFF : Set Decode region to non-secure
- */
-#define DECPROTXSET		0xFF
 #endif

board/samsung/smdkv310/lowlevel_init.S +2 ~~-58~~

75 lines not on this page · raw message

include/configs/origen.h +2 -0

index ff2b24d..e179911 100644
@@ -96,6 +96,8 @@
 #define CONFIG_SPL
 #define COPY_BL2_FNPTR_ADDR	0x02020030
 
+#define CONFIG_SPL_TEXT_BASE	0x02021410
+
 #define CONFIG_BOOTCOMMAND	"fatload mmc 0 40007000 uImage; bootm 40007000"
 
 /* Miscellaneous configurable options */

include/configs/smdkv310.h +2 -0

index b796b46..5e43066 100644
@@ -95,6 +95,8 @@
 #define CONFIG_SPL
 #define COPY_BL2_FNPTR_ADDR	0x00002488
 
+#define CONFIG_SPL_TEXT_BASE	0x02021410
+
 #define CONFIG_BOOTCOMMAND	"fatload mmc 0 40007000 uImage; bootm 40007000"
 
 /* Miscellaneous configurable options */

Signature · 1 line

1.7.9.5

Minkyu Kang

2013-06-04 06:54 UTC #4 lore raw

v3 cover Make tzpc initialization common for exynos4 and exynos5

In reply to Inderpal Singh

Quoted 34 lines · Inderpal Singh

The first patch moves the tzpc_init file from smdk5250 to armv7/exynos. The second makes tzpc common for exynos4 and exynos5. And the third makes necessary changes to exynos4 based origen and smdkv310 boards.
The patchset has been tested on exynos4 based origen and exynos5 based Arndale board.
Changes in v2:
- removed uninitialised warning for start and end variables
- corrected the SPL_TEXT_BASE for origen and smdkv310
- Added Chander's Acked-by
Changes in v3:
As per Minkyu:
- renamed the file as tzpc.c
- implemented the samsung_get_base_tzpc
- removed the TZPCx_BASE macros and used samsung_get_base_tzpc
Inderpal Singh (3):
exynos: move tzpc_init to armv7/exynos
exynos: update tzpc to make it common for exynos4 and exynos5
exynos: Update origen and smdkv310 to use common tzpc_init
 arch/arm/cpu/armv7/exynos/Makefile      |    2 +-
 arch/arm/cpu/armv7/exynos/tzpc.c        |   57 +++++++++++++++++++++++++++++
 arch/arm/cpu/armv7/s5p-common/Makefile  |    2 ++
 arch/arm/include/asm/arch-exynos/cpu.h  |    4 +++
 arch/arm/include/asm/arch-exynos/tzpc.h |   20 +++++++++++
 board/samsung/origen/lowlevel_init.S    |   44 ++---------------------
 board/samsung/origen/origen_setup.h     |   25 -------------
 board/samsung/smdk5250/Makefile         |    1 -
 board/samsung/smdk5250/lowlevel_init.S  |    2 ++
 board/samsung/smdk5250/setup.h          |   25 -------------
 board/samsung/smdk5250/tzpc_init.c      |   48 -------------------------

Quoted 9 lines

 board/samsung/smdkv310/lowlevel_init.S  |   60 ++-----------------------------
 include/configs/exynos5250-dt.h         |    2 --
 include/configs/origen.h                |    2 ++
 include/configs/smdkv310.h              |    2 ++
 spl/Makefile                            |    4 +++
 16 files changed, 98 insertions(+), 202 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/exynos/tzpc.c
 delete mode 100644 board/samsung/smdk5250/tzpc_init.c

applied to u-boot-samsung.

Thanks,
Minkyu Kang.