ARM: dts: omap5: Cleanup and updates for DT files

The uevm is the official board supported for the OMAP5 soc in mainline. The uevm has an OMAP5432 with a DDR3 memory. Renaming the board dts file and adding the following cleanups.

* There are no devices connected on I2C 2,3,4 buses. So remove the pinmux data for the same.

* DDR3 memory is used in the uevm. Neither DVFS or temperature polling is supported with DDR3. So remove the DDR3 device and emif nodes.

* Keypad is not supported on uevm. So remove the device node.

Signed-off-by Sricharan R <[email protected]>

---
 arch/arm/boot/dts/Makefile       |    2 +-
 arch/arm/boot/dts/omap5-evm.dts  |  261 --------------------------------------
 arch/arm/boot/dts/omap5-uevm.dts |  184 +++++++++++++++++++++++++++
 3 files changed, 185 insertions(+), 262 deletions(-)
 delete mode 100644 arch/arm/boot/dts/omap5-evm.dts
 create mode 100644 arch/arm/boot/dts/omap5-uevm.dts

arch/arm/boot/dts/Makefile +1 -1

index f0895c5..13b86bf 100644
@@ -149,7 +149,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
 	omap4-panda-es.dtb \
 	omap4-var-som.dtb \
 	omap4-sdp.dtb \
-	omap5-evm.dtb \
+	omap5-uevm.dtb \
 	am335x-evm.dtb \
 	am335x-evmsk.dtb \
 	am335x-bone.dtb

arch/arm/boot/dts/omap5-evm.dts deleted +0 -261

deleted file mode 100644
index 22e9ee8..0000000
@@ -1,261 +0,0 @@
-/*
- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-/dts-v1/;
-
-#include "omap5.dtsi"
-#include "samsung_k3pe0e000b.dtsi"
-
-/ {
-	model = "TI OMAP5 EVM board";
-	compatible = "ti,omap5-evm", "ti,omap5";
-
-	memory {
-		device_type = "memory";
-		reg = <0x80000000 0x7F000000>; /* 2032 MB */
-	};
-
-	vmmcsd_fixed: fixedregulator-mmcsd {
-		compatible = "regulator-fixed";
-		regulator-name = "vmmcsd_fixed";
-		regulator-min-microvolt = <3000000>;
-		regulator-max-microvolt = <3000000>;
-	};
-
-};
-
-&omap5_pmx_core {
-	pinctrl-names = "default";
-	pinctrl-0 = <
-			&twl6040_pins
-			&mcpdm_pins
-			&dmic_pins
-			&mcbsp1_pins
-			&mcbsp2_pins
-	>;
-
-	twl6040_pins: pinmux_twl6040_pins {
-		pinctrl-single,pins = <
-			0x18a (PIN_OUTPUT | MUX_MODE6)	/* perslimbus2_clock.gpio5_145 */
-		>;
-	};
-
-	mcpdm_pins: pinmux_mcpdm_pins {
-		pinctrl-single,pins = <
-			0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abe_clks.abe_clks */
-			0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_ul_data.abemcpdm_ul_data */
-			0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_dl_data.abemcpdm_dl_data */
-			0x160 (PIN_INPUT_PULLUP | MUX_MODE0)	/* abemcpdm_frame.abemcpdm_frame */
-			0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_lb_clk.abemcpdm_lb_clk */
-		>;
-	};
-
-	dmic_pins: pinmux_dmic_pins {
-		pinctrl-single,pins = <
-			0x144 (PIN_INPUT | MUX_MODE0)		/* abedmic_din1.abedmic_din1 */
-			0x146 (PIN_INPUT | MUX_MODE0)		/* abedmic_din2.abedmic_din2 */
-			0x148 (PIN_INPUT | MUX_MODE0)		/* abedmic_din3.abedmic_din3 */
-			0x14a (PIN_OUTPUT | MUX_MODE0)		/* abedmic_clk1.abedmic_clk1 */
-		>;
-	};
-
-	mcbsp1_pins: pinmux_mcbsp1_pins {
-		pinctrl-single,pins = <
-			0x14c (PIN_INPUT | MUX_MODE1)		/* abedmic_clk2.abemcbsp1_fsx */
-			0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* abedmic_clk3.abemcbsp1_dx */
-			0x150 (PIN_INPUT | MUX_MODE1)		/* abeslimbus1_clock.abemcbsp1_clkx */
-			0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* abeslimbus1_data.abemcbsp1_dr */
-		>;
-	};
-
-	mcbsp2_pins: pinmux_mcbsp2_pins {
-		pinctrl-single,pins = <
-			0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcbsp2_dr.abemcbsp2_dr */
-			0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* abemcbsp2_dx.abemcbsp2_dx */
-			0x158 (PIN_INPUT | MUX_MODE0)		/* abemcbsp2_fsx.abemcbsp2_fsx */
-			0x15a (PIN_INPUT | MUX_MODE0)		/* abemcbsp2_clkx.abemcbsp2_clkx */
-		>;
-	};
-
-	i2c1_pins: pinmux_i2c1_pins {
-		pinctrl-single,pins = <
-			0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */
-			0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_sda */
-		>;
-	};
-
-	i2c2_pins: pinmux_i2c2_pins {
-		pinctrl-single,pins = <
-			0x178 (PIN_INPUT | MUX_MODE0)		/* i2c2_scl */
-			0x17a (PIN_INPUT | MUX_MODE0)		/* i2c2_sda */
-		>;
-	};
-
-	i2c3_pins: pinmux_i2c3_pins {
-		pinctrl-single,pins = <
-			0x13a (PIN_INPUT | MUX_MODE0)		/* i2c3_scl */
-			0x13c (PIN_INPUT | MUX_MODE0)		/* i2c3_sda */
-		>;
-	};
-
-	i2c4_pins: pinmux_i2c4_pins {
-		pinctrl-single,pins = <
-			0xb8 (PIN_INPUT | MUX_MODE0)		/* i2c4_scl */
-			0xba (PIN_INPUT | MUX_MODE0)		/* i2c4_sda */
-		>;
-	};
-
-	i2c5_pins: pinmux_i2c5_pins {
-		pinctrl-single,pins = <
-			0x184 (PIN_INPUT | MUX_MODE0)		/* i2c5_scl */
-			0x186 (PIN_INPUT | MUX_MODE0)		/* i2c5_sda */
-		>;
-	};
-
-	mcspi2_pins: pinmux_mcspi2_pins {
-		pinctrl-single,pins = <
-			0xbc (PIN_INPUT | MUX_MODE0)		/*  mcspi2_clk */
-			0xbe (PIN_INPUT | MUX_MODE0)		/*  mcspi2_simo */
-			0xc0 (PIN_INPUT_PULLUP | MUX_MODE0)	/*  mcspi2_somi */
-			0xc2 (PIN_OUTPUT | MUX_MODE0)		/*  mcspi2_cs */
-		>;
-	};
-
-	mcspi3_pins: pinmux_mcspi3_pins {
-		pinctrl-single,pins = <
-			0x78 (PIN_INPUT | MUX_MODE1)		/*  mcspi2_somi */
-			0x7a (PIN_INPUT | MUX_MODE1)		/*  mcspi2_cs */
-			0x7c (PIN_INPUT | MUX_MODE1)		/*  mcspi2_simo */
-			0x7e (PIN_INPUT | MUX_MODE1)		/*  mcspi2_clk */
-		>;
-	};
-
-	mcspi4_pins: pinmux_mcspi4_pins {
-		pinctrl-single,pins = <
-			0x164 (PIN_INPUT | MUX_MODE1)		/*  mcspi2_clk */
-			0x168 (PIN_INPUT | MUX_MODE1)		/*  mcspi2_simo */
-			0x16a (PIN_INPUT | MUX_MODE1)		/*  mcspi2_somi */
-			0x16c (PIN_INPUT | MUX_MODE1)		/*  mcspi2_cs */
-		>;
-	};
-};
-
-&mmc1 {
-	vmmc-supply = <&vmmcsd_fixed>;
-	bus-width = <4>;
-};
-
-&mmc2 {
-	vmmc-supply = <&vmmcsd_fixed>;
-	bus-width = <8>;
-	ti,non-removable;
-};
-
-&mmc3 {
-	bus-width = <4>;
-	ti,non-removable;
-};
-
-&mmc4 {
-	status = "disabled";
-};
-
-&mmc5 {
-	status = "disabled";
-};
-
-&i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins>;
-
-	clock-frequency = <400000>;
-};
-
-&i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins>;
-
-	clock-frequency = <400000>;
-
-	/* Pressure Sensor */
-	bmp085 at 77 {
-		compatible = "bosch,bmp085";
-		reg = <0x77>;
-	};
-};
-
-&i2c3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c3_pins>;
-
-	clock-frequency = <400000>;
-};
-
-&i2c4 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c4_pins>;
-
-	clock-frequency = <400000>;
-
-	/* Temperature Sensor */
-	tmp102 at 48{
-		compatible = "ti,tmp102";
-		reg = <0x48>;
-	};
-};
-
-&i2c5 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c5_pins>;
-
-	clock-frequency = <400000>;
-};
-
-&keypad {
-	keypad,num-rows = <8>;
-	keypad,num-columns = <8>;
-	linux,keymap = <0x02020073	/* VOLUP */
-			0x02030072	/* VOLDOWM */
-			0x020400e7	/* SEND */
-			0x02050066	/* HOME */
-			0x0206006b	/* END */
-			0x020700d9>;	/* SEARCH */
-	linux,input-no-autorepeat;
-};
-
-&mcbsp3 {
-	status = "disabled";
-};
-
-&emif1 {
-	cs1-used;
-	device-handle = <&samsung_K3PE0E000B>;
-};
-
-&emif2 {
-	cs1-used;
-	device-handle = <&samsung_K3PE0E000B>;
-};
-
-&mcspi1 {
-
-};
-
-&mcspi2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mcspi2_pins>;
-};
-
-&mcspi3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mcspi3_pins>;
-};
-
-&mcspi4 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mcspi4_pins>;
-};

arch/arm/boot/dts/omap5-uevm.dts new file +174 -0

new file mode 100644
index 0000000..843a001
@@ -0,0 +1,184 @@
+/*
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "omap5.dtsi"
+
+/ {
+	model = "TI OMAP5 uEVM board";
+	compatible = "ti,omap5-uevm", "ti,omap5";
+
+	memory {
+		device_type = "memory";
+		reg = <0x80000000 0x7F000000>; /* 2032 MB */
+	};
+
+	vmmcsd_fixed: fixedregulator-mmcsd {
+		compatible = "regulator-fixed";
+		regulator-name = "vmmcsd_fixed";
+		regulator-min-microvolt = <3000000>;
+		regulator-max-microvolt = <3000000>;
+	};
+
+};
+
+&omap5_pmx_core {
+	pinctrl-names = "default";
+	pinctrl-0 = <
+			&twl6040_pins
+			&mcpdm_pins
+			&dmic_pins
+			&mcbsp1_pins
+			&mcbsp2_pins
+	>;
+
+	twl6040_pins: pinmux_twl6040_pins {
+		pinctrl-single,pins = <
+			0x18a (PIN_OUTPUT | MUX_MODE6)	/* perslimbus2_clock.gpio5_145 */
+		>;
+	};
+
+	mcpdm_pins: pinmux_mcpdm_pins {
+		pinctrl-single,pins = <
+			0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abe_clks.abe_clks */
+			0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_ul_data.abemcpdm_ul_data */
+			0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_dl_data.abemcpdm_dl_data */
+			0x160 (PIN_INPUT_PULLUP | MUX_MODE0)	/* abemcpdm_frame.abemcpdm_frame */
+			0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcpdm_lb_clk.abemcpdm_lb_clk */
+		>;
+	};
+
+	dmic_pins: pinmux_dmic_pins {
+		pinctrl-single,pins = <
+			0x144 (PIN_INPUT | MUX_MODE0)		/* abedmic_din1.abedmic_din1 */
+			0x146 (PIN_INPUT | MUX_MODE0)		/* abedmic_din2.abedmic_din2 */
+			0x148 (PIN_INPUT | MUX_MODE0)		/* abedmic_din3.abedmic_din3 */
+			0x14a (PIN_OUTPUT | MUX_MODE0)		/* abedmic_clk1.abedmic_clk1 */
+		>;
+	};
+
+	mcbsp1_pins: pinmux_mcbsp1_pins {
+		pinctrl-single,pins = <
+			0x14c (PIN_INPUT | MUX_MODE1)		/* abedmic_clk2.abemcbsp1_fsx */
+			0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* abedmic_clk3.abemcbsp1_dx */
+			0x150 (PIN_INPUT | MUX_MODE1)		/* abeslimbus1_clock.abemcbsp1_clkx */
+			0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* abeslimbus1_data.abemcbsp1_dr */
+		>;
+	};
+
+	mcbsp2_pins: pinmux_mcbsp2_pins {
+		pinctrl-single,pins = <
+			0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* abemcbsp2_dr.abemcbsp2_dr */
+			0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* abemcbsp2_dx.abemcbsp2_dx */
+			0x158 (PIN_INPUT | MUX_MODE0)		/* abemcbsp2_fsx.abemcbsp2_fsx */
+			0x15a (PIN_INPUT | MUX_MODE0)		/* abemcbsp2_clkx.abemcbsp2_clkx */
+		>;
+	};
+
+	i2c1_pins: pinmux_i2c1_pins {
+		pinctrl-single,pins = <
+			0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */
+			0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_sda */
+		>;
+	};
+
+	i2c5_pins: pinmux_i2c5_pins {
+		pinctrl-single,pins = <
+			0x184 (PIN_INPUT | MUX_MODE0)		/* i2c5_scl */
+			0x186 (PIN_INPUT | MUX_MODE0)		/* i2c5_sda */
+		>;
+	};
+
+	mcspi2_pins: pinmux_mcspi2_pins {
+		pinctrl-single,pins = <
+			0xbc (PIN_INPUT | MUX_MODE0)		/*  mcspi2_clk */
+			0xbe (PIN_INPUT | MUX_MODE0)		/*  mcspi2_simo */
+			0xc0 (PIN_INPUT_PULLUP | MUX_MODE0)	/*  mcspi2_somi */
+			0xc2 (PIN_OUTPUT | MUX_MODE0)		/*  mcspi2_cs */
+		>;
+	};
+
+	mcspi3_pins: pinmux_mcspi3_pins {
+		pinctrl-single,pins = <
+			0x78 (PIN_INPUT | MUX_MODE1)		/*  mcspi2_somi */
+			0x7a (PIN_INPUT | MUX_MODE1)		/*  mcspi2_cs */
+			0x7c (PIN_INPUT | MUX_MODE1)		/*  mcspi2_simo */
+			0x7e (PIN_INPUT | MUX_MODE1)		/*  mcspi2_clk */
+		>;
+	};
+
+	mcspi4_pins: pinmux_mcspi4_pins {
+		pinctrl-single,pins = <
+			0x164 (PIN_INPUT | MUX_MODE1)		/*  mcspi2_clk */
+			0x168 (PIN_INPUT | MUX_MODE1)		/*  mcspi2_simo */
+			0x16a (PIN_INPUT | MUX_MODE1)		/*  mcspi2_somi */
+			0x16c (PIN_INPUT | MUX_MODE1)		/*  mcspi2_cs */
+		>;
+	};
+};
+
+&mmc1 {
+	vmmc-supply = <&vmmcsd_fixed>;
+	bus-width = <4>;
+};
+
+&mmc2 {
+	vmmc-supply = <&vmmcsd_fixed>;
+	bus-width = <8>;
+	ti,non-removable;
+};
+
+&mmc3 {
+	bus-width = <4>;
+	ti,non-removable;
+};
+
+&mmc4 {
+	status = "disabled";
+};
+
+&mmc5 {
+	status = "disabled";
+};
+
+&i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_pins>;
+
+	clock-frequency = <400000>;
+};
+
+&i2c5 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c5_pins>;
+
+	clock-frequency = <400000>;
+};
+
+&mcbsp3 {
+	status = "disabled";
+};
+
+&mcspi1 {
+
+};
+
+&mcspi2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mcspi2_pins>;
+};

From: Roger Quadros <[email protected]>

Provide the RESET regulators for the USB PHYs, the USB Host port modes and the PHY devices.

Also provide pin multiplexer information for the USB host pins.

Cc Roger Quadros <[email protected]>

Signed-off-by Roger Quadros <[email protected]>

[Sricharan R <[email protected]>: Replaced constants with preprocessor macros]

Signed-off-by Sricharan R <[email protected]>

---
  arch/arm/boot/dts/omap5-uevm.dts |   77 ++++++++++++++++++++++++++++++++++++++
  arch/arm/boot/dts/omap5.dtsi     |   30 +++++++++++++++
  2 files changed, 107 insertions(+)

arch/arm/boot/dts/omap5-uevm.dts +42 -0

index 843a001..cf862df 100644
@@ -25,6 +25,47 @@
  		regulator-max-microvolt = <3000000>;
  	};
 
+	/* HS USB Port 2 RESET */
+	hsusb2_reset: hsusb2_reset_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "hsusb2_reset";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */
+		startup-delay-us = <70000>;
+		enable-active-high;
+	};
+
+	/* HS USB Host PHY on PORT 2 */
+	hsusb2_phy: hsusb2_phy {
+		compatible = "usb-nop-xceiv";
+		reset-supply = <&hsusb2_reset>;
+	};
+
+	/* HS USB Port 3 RESET */
+	hsusb3_reset: hsusb3_reset_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "hsusb3_reset";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */
+		startup-delay-us = <70000>;
+		enable-active-high;
+	};
+
+	/* HS USB Host PHY on PORT 3 */
+	hsusb3_phy: hsusb3_phy {
+		compatible = "usb-nop-xceiv";
+		reset-supply = <&hsusb3_reset>;
+	};
+
+	/* hsusb2_phy is clocked by FREF_CLK1 i.e. auxclk1 */
+	clock_alias {
+		clock-name = "auxclk1_ck";
+		clock-alias = "main_clk";
+		device = <&hsusb2_phy>;
+		clock-frequency = <19200000>; /* 19.2 MHz */
+	};
  };
 
  &omap5_pmx_core {

@@ -35,6 +76,7 @@
  			&dmic_pins
  			&mcbsp1_pins
  			&mcbsp2_pins
+			&usbhost_pins
  	>;
 
  	twl6040_pins: pinmux_twl6040_pins {

arch/arm/boot/dts/omap5-uevm.dts +9 -0

+
+			0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe INPUT | MODE 0 */
+			0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data INPUT | MODE 0 */
+
+			0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 OUTPUT | MODE 6 HUB_NRESET */
+			0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 OUTPUT | MODE 6 ETH_NRESET */
+		>;
+	};
+};

arch/arm/boot/dts/omap5-uevm.dts +11 -0

+		>;
+	};
  };
 
  &mmc1 {

@@ -164,6 +232,15 @@
  	status = "disabled";
  };
 
+&usbhshost {
+	port2-mode = "ehci-hsic";
+	port3-mode = "ehci-hsic";
+};
+
+&usbhsehci {
+	phys = <0 &hsusb2_phy &hsusb3_phy>;
+};
+
  &mcspi1 {
 
  };

arch/arm/boot/dts/omap5.dtsi +0 -0

index 1e84db8..67d6e1f 100644

arch/arm/boot/dts/omap5.dtsi +6 -0

+			ti,hwmods = "usb_tll_hs";
+		};
+
+		usbhshost: usbhshost at 4a064000 {
+			compatible = "ti,usbhs-host";
+			reg = <0x4a064000 0x800>;

Hello,

Some very minor comments.

Quoted 76 lines · Sricharan R

From: Roger Quadros <[email protected]>

Provide the RESET regulators for the USB PHYs, the USB Host port modes and the PHY devices.

Also provide pin multiplexer information for the USB host pins.

Cc Roger Quadros <[email protected]>

Signed-off-by Roger Quadros <[email protected]>

[Sricharan R <[email protected]>: Replaced constants with preprocessor macros]

Signed-off-by Sricharan R <[email protected]>

---
  arch/arm/boot/dts/omap5-uevm.dts |   77 ++++++++++++++++++++++++++++++++++++++
  arch/arm/boot/dts/omap5.dtsi     |   30 +++++++++++++++
  2 files changed, 107 insertions(+)

arch/arm/boot/dts/omap5-uevm.dts +42 -0

index 843a001..cf862df 100644
@@ -25,6 +25,47 @@
          regulator-max-microvolt = <3000000>;
      };
 
+    /* HS USB Port 2 RESET */
+    hsusb2_reset: hsusb2_reset_reg {
+        compatible = "regulator-fixed";
+        regulator-name = "hsusb2_reset";
+        regulator-min-microvolt = <3300000>;
+        regulator-max-microvolt = <3300000>;
+        gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */
+        startup-delay-us = <70000>;
+        enable-active-high;
+    };
+
+    /* HS USB Host PHY on PORT 2 */
+    hsusb2_phy: hsusb2_phy {
+        compatible = "usb-nop-xceiv";
+        reset-supply = <&hsusb2_reset>;
+    };
+
+    /* HS USB Port 3 RESET */
+    hsusb3_reset: hsusb3_reset_reg {
+        compatible = "regulator-fixed";
+        regulator-name = "hsusb3_reset";
+        regulator-min-microvolt = <3300000>;
+        regulator-max-microvolt = <3300000>;
+        gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */
+        startup-delay-us = <70000>;
+        enable-active-high;
+    };
+
+    /* HS USB Host PHY on PORT 3 */
+    hsusb3_phy: hsusb3_phy {
+        compatible = "usb-nop-xceiv";
+        reset-supply = <&hsusb3_reset>;
+    };
+
+    /* hsusb2_phy is clocked by FREF_CLK1 i.e. auxclk1 */
+    clock_alias {
+        clock-name = "auxclk1_ck";
+        clock-alias = "main_clk";
+        device = <&hsusb2_phy>;
+        clock-frequency = <19200000>; /* 19.2 MHz */
+    };
  };
 
  &omap5_pmx_core {

@@ -35,6 +76,7 @@
              &dmic_pins
              &mcbsp1_pins
              &mcbsp2_pins
+            &usbhost_pins
      >;
 

arch/arm/boot/dts/omap5-uevm.dts line 169

Quoted 10 lines

arch/arm/boot/dts/omap5-uevm.dts +5 -0

      twl6040_pins: pinmux_twl6040_pins {

@@ -120,6 +162,32 @@
              0x16c (PIN_INPUT | MUX_MODE1)        /*  mcspi2_cs */
          >;
      };
+
+    usbhost_pins: pinmux_usbhost_pins {
+        pinctrl-single,pins = <
+            0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe INPUT | MODE 0 */
+            0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data INPUT | MODE 0 */

Comments are redundant with the constants, so maybe you can leave this part out. Same for a few others below.

Quoted 13 lines

arch/arm/boot/dts/omap5-uevm.dts +13 -0

+
+            0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe INPUT | MODE 0 */
+            0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data INPUT | MODE 0 */
+
+            0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 OUTPUT | MODE 6 HUB_NRESET */
+            0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 OUTPUT | MODE 6 ETH_NRESET */
+        >;
+    };
+};
+
+&omap5_pmx_wkup {
+    pinctrl-names = "default";
+    pinctrl-0 = <

arch/arm/boot/dts/omap5-uevm.dts line 188

Quoted 6 lines

arch/arm/boot/dts/omap5-uevm.dts +6 -0

+            &usbhost_wkup_pins
+    >;
+
+    usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
+        pinctrl-single,pins = <
+            0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out OUTPUT | MODE 7 for USB hub clk */

Mismatch between constants and comments, which mode should it be?

Quoted 20 lines

arch/arm/boot/dts/omap5-uevm.dts +11 -0

+        >;
+    };
  };
 
  &mmc1 {

@@ -164,6 +232,15 @@
      status = "disabled";
  };
 
+&usbhshost {
+    port2-mode = "ehci-hsic";
+    port3-mode = "ehci-hsic";
+};
+
+&usbhsehci {
+    phys = <0 &hsusb2_phy &hsusb3_phy>;
+};
+
  &mcspi1 {
 

Quoted 6 lines

arch/arm/boot/dts/omap5-uevm.dts +0 -0

  };

arch/arm/boot/dts/omap5.dtsi +0 -0

index 1e84db8..67d6e1f 100644

arch/arm/boot/dts/omap5.dtsi line 673

Quoted 8 lines

arch/arm/boot/dts/omap5.dtsi +5 -0

@@ -666,5 +666,35 @@
                  ctrl-module = <&omap_control_usb>;
              };
          };
+
+        usbhstll: usbhstll at 4a062000 {
+            compatible = "ti,usbhs-tll";
+            reg = <0x4a062000 0x1000>;
+            interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;

I guess that here you can replace '0' with GIC_SPI.

Hi,

Quoted 81 lines · Florian Vaussard

Hello,

Some very minor comments.

Quoted 76 lines · Sricharan R

From: Roger Quadros <[email protected]>

Provide the RESET regulators for the USB PHYs, the USB Host port modes and the PHY devices.

Also provide pin multiplexer information for the USB host pins.

Cc Roger Quadros <[email protected]>

Signed-off-by Roger Quadros <[email protected]>

[Sricharan R <[email protected]>: Replaced constants with preprocessor macros]

Signed-off-by Sricharan R <[email protected]>

---
   arch/arm/boot/dts/omap5-uevm.dts |   77 ++++++++++++++++++++++++++++++++++++++
   arch/arm/boot/dts/omap5.dtsi     |   30 +++++++++++++++
   2 files changed, 107 insertions(+)

arch/arm/boot/dts/omap5-uevm.dts +42 -0

index 843a001..cf862df 100644
@@ -25,6 +25,47 @@
           regulator-max-microvolt = <3000000>;
       };
 
+    /* HS USB Port 2 RESET */
+    hsusb2_reset: hsusb2_reset_reg {
+        compatible = "regulator-fixed";
+        regulator-name = "hsusb2_reset";
+        regulator-min-microvolt = <3300000>;
+        regulator-max-microvolt = <3300000>;
+        gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */
+        startup-delay-us = <70000>;
+        enable-active-high;
+    };
+
+    /* HS USB Host PHY on PORT 2 */
+    hsusb2_phy: hsusb2_phy {
+        compatible = "usb-nop-xceiv";
+        reset-supply = <&hsusb2_reset>;
+    };
+
+    /* HS USB Port 3 RESET */
+    hsusb3_reset: hsusb3_reset_reg {
+        compatible = "regulator-fixed";
+        regulator-name = "hsusb3_reset";
+        regulator-min-microvolt = <3300000>;
+        regulator-max-microvolt = <3300000>;
+        gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */
+        startup-delay-us = <70000>;
+        enable-active-high;
+    };
+
+    /* HS USB Host PHY on PORT 3 */
+    hsusb3_phy: hsusb3_phy {
+        compatible = "usb-nop-xceiv";
+        reset-supply = <&hsusb3_reset>;
+    };
+
+    /* hsusb2_phy is clocked by FREF_CLK1 i.e. auxclk1 */
+    clock_alias {
+        clock-name = "auxclk1_ck";
+        clock-alias = "main_clk";
+        device = <&hsusb2_phy>;
+        clock-frequency = <19200000>; /* 19.2 MHz */
+    };
   };
 
   &omap5_pmx_core {

@@ -35,6 +76,7 @@
               &dmic_pins
               &mcbsp1_pins
               &mcbsp2_pins
+            &usbhost_pins
       >;
 

Quoted 14 lines

arch/arm/boot/dts/omap5-uevm.dts line 169

Quoted 10 lines

arch/arm/boot/dts/omap5-uevm.dts +5 -0

       twl6040_pins: pinmux_twl6040_pins {

@@ -120,6 +162,32 @@
               0x16c (PIN_INPUT | MUX_MODE1)        /*  mcspi2_cs */
           >;
       };
+
+    usbhost_pins: pinmux_usbhost_pins {
+        pinctrl-single,pins = <
+            0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe INPUT | MODE 0 */
+            0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data INPUT | MODE 0 */

Comments are redundant with the constants, so maybe you can leave this part out. Same for a few others below.

Ok, I agree here for attributes like pulls, i/o etc, comments are now not required. But comment is still good to describe just the mux mode functionality ? One module will use different pins, like data, clk, gpios, etc. Just MUX_MODEX does not complete it..

Quoted 13 lines

Quoted 13 lines

arch/arm/boot/dts/omap5-uevm.dts +13 -0

+
+            0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe INPUT | MODE 0 */
+            0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data INPUT | MODE 0 */
+
+            0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 OUTPUT | MODE 6 HUB_NRESET */
+            0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 OUTPUT | MODE 6 ETH_NRESET */
+        >;
+    };
+};
+
+&omap5_pmx_wkup {
+    pinctrl-names = "default";
+    pinctrl-0 = <

Quoted 9 lines

arch/arm/boot/dts/omap5-uevm.dts line 188

Quoted 6 lines

arch/arm/boot/dts/omap5-uevm.dts +6 -0

+            &usbhost_wkup_pins
+    >;
+
+    usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
+        pinctrl-single,pins = <
+            0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out OUTPUT | MODE 7 for USB hub clk */

Mismatch between constants and comments, which mode should it be?

MODE 0. I see safe mode for 7. Comment should be corrected.

From: Roger Quadros <[email protected]>

Provide the RESET regulators for the USB PHYs, the USB Host port modes and the PHY devices.

Also provide pin multiplexer information for the USB host pins.

Cc Roger Quadros <[email protected]>

Signed-off-by Roger Quadros <[email protected]>

[Sricharan R <[email protected]>: Replaced constants with preprocessor macros]

Signed-off-by Sricharan R <[email protected]>

---
 arch/arm/boot/dts/omap5-uevm.dts |   77 ++++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/omap5.dtsi     |   30 +++++++++++++++
 2 files changed, 107 insertions(+)

arch/arm/boot/dts/omap5-uevm.dts +31 -0

index 843a001..cf862df 100644
@@ -25,6 +25,47 @@
 		regulator-max-microvolt = <3000000>;
 	};
 
+	/* HS USB Port 2 RESET */
+	hsusb2_reset: hsusb2_reset_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "hsusb2_reset";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */
+		startup-delay-us = <70000>;
+		enable-active-high;
+	};
+
+	/* HS USB Host PHY on PORT 2 */
+	hsusb2_phy: hsusb2_phy {
+		compatible = "usb-nop-xceiv";
+		reset-supply = <&hsusb2_reset>;
+	};
+
+	/* HS USB Port 3 RESET */
+	hsusb3_reset: hsusb3_reset_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "hsusb3_reset";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */
+		startup-delay-us = <70000>;
+		enable-active-high;
+	};
+
+	/* HS USB Host PHY on PORT 3 */
+	hsusb3_phy: hsusb3_phy {
+		compatible = "usb-nop-xceiv";

Hi Sricharan,

Thanks for sending this, but some parts are outdated. See below.

Quoted 56 lines · Sricharan R

From: Roger Quadros <[email protected]>

Provide the RESET regulators for the USB PHYs, the USB Host port modes and the PHY devices.

Also provide pin multiplexer information for the USB host pins.

Cc Roger Quadros <[email protected]>

Signed-off-by Roger Quadros <[email protected]>

[Sricharan R <[email protected]>: Replaced constants with preprocessor macros]

Signed-off-by Sricharan R <[email protected]>

---
 arch/arm/boot/dts/omap5-uevm.dts |   77 ++++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/omap5.dtsi     |   30 +++++++++++++++
 2 files changed, 107 insertions(+)

arch/arm/boot/dts/omap5-uevm.dts +31 -0

index 843a001..cf862df 100644
@@ -25,6 +25,47 @@
 		regulator-max-microvolt = <3000000>;
 	};
 
+	/* HS USB Port 2 RESET */
+	hsusb2_reset: hsusb2_reset_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "hsusb2_reset";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */
+		startup-delay-us = <70000>;
+		enable-active-high;
+	};
+
+	/* HS USB Host PHY on PORT 2 */
+	hsusb2_phy: hsusb2_phy {
+		compatible = "usb-nop-xceiv";
+		reset-supply = <&hsusb2_reset>;
+	};
+
+	/* HS USB Port 3 RESET */
+	hsusb3_reset: hsusb3_reset_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "hsusb3_reset";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */
+		startup-delay-us = <70000>;
+		enable-active-high;
+	};
+
+	/* HS USB Host PHY on PORT 3 */
+	hsusb3_phy: hsusb3_phy {
+		compatible = "usb-nop-xceiv";

arch/arm/boot/dts/omap5-uevm.dts line 68

Quoted 10 lines

arch/arm/boot/dts/omap5-uevm.dts +10 -0

+		reset-supply = <&hsusb3_reset>;
+	};
+
+	/* hsusb2_phy is clocked by FREF_CLK1 i.e. auxclk1 */
+	clock_alias {
+		clock-name = "auxclk1_ck";
+		clock-alias = "main_clk";
+		device = <&hsusb2_phy>;
+		clock-frequency = <19200000>; /* 19.2 MHz */
+	};

clock_alias node is not required. Instead we need to rely on proper clock binding and provide reference to the clock phandle in the PHY node.

as an example please see here
https://lkml.org/lkml/2013/4/19/124

However this clock binding technique is still under discussion/transition.
https://patchwork.kernel.org/patch/2541331/

So, I suggest you leave the auxclk1 part out for now and we can get it in later once the clock binding stuff is sorted out. The side effect of this is that PORT 2 (i.e. USB Hub) will not work. USB Ethernet should still work IMO.

From: Roger Quadros <[email protected]>

arch/arm/boot/dts/omap5-uevm.dts +0 -0

index 843a001..cf862df 100644

arch/arm/boot/dts/omap5-uevm.dts +3 -0

+		device = <&hsusb2_phy>;
+		clock-frequency = <19200000>; /* 19.2 MHz */
+	};
 };

Quoted 1 line · Sricharan R

From: Roger Quadros <[email protected]>

[...]

Quoted 4 lines

arch/arm/boot/dts/omap5-uevm.dts +0 -0

index 843a001..cf862df 100644

<snip>

arch/arm/boot/dts/omap5-uevm.dts line 65

Quoted 4 lines

arch/arm/boot/dts/omap5-uevm.dts +4 -0

+	/* hsusb2_phy is clocked by FREF_CLK1 i.e. auxclk1 */
+	clock_alias {
+		clock-name = "auxclk1_ck";
+		clock-alias = "main_clk";

is'nt this better to use with clock node?

Hi,

Quoted 8 lines · Nishanth Menon

Quoted 1 line · Sricharan R

From: Roger Quadros <[email protected]>

[...]

Quoted 4 lines

arch/arm/boot/dts/omap5-uevm.dts +0 -0

index 843a001..cf862df 100644

<snip>

Quoted 5 lines

arch/arm/boot/dts/omap5-uevm.dts line 65

Quoted 4 lines

arch/arm/boot/dts/omap5-uevm.dts +4 -0

+	/* hsusb2_phy is clocked by FREF_CLK1 i.e. auxclk1 */
+	clock_alias {
+		clock-name = "auxclk1_ck";
+		clock-alias = "main_clk";

is'nt this better to use with clock node?

Roger was suggesting to remove this for now. Posted V2 following that.
Are you suggesting to go with your clock-binding patch ?

Quoted 10 lines · Sricharan R

Hi,

Quoted 8 lines · Nishanth Menon

Quoted 1 line · Sricharan R

From: Roger Quadros <[email protected]>

[...]

Quoted 4 lines

arch/arm/boot/dts/omap5-uevm.dts +0 -0

index 843a001..cf862df 100644

<snip>

Quoted 8 lines

Quoted 5 lines

arch/arm/boot/dts/omap5-uevm.dts line 65

Quoted 4 lines

arch/arm/boot/dts/omap5-uevm.dts +4 -0

+	/* hsusb2_phy is clocked by FREF_CLK1 i.e. auxclk1 */
+	clock_alias {
+		clock-name = "auxclk1_ck";
+		clock-alias = "main_clk";

is'nt this better to use with clock node?

Roger was suggesting to remove this for now. Postedhen V2 following that.
Are you suggesting to go with your clock-binding patch ?

you cannot. Mike has already rejected that approach and I have dropped that series and wont be following up.
See discussion https://patchwork.kernel.org/patch/2541331/

instead the new approach being discussed
https://patchwork.kernel.org/patch/2657351/ and related discussions is the way to go.

That said, it practically blocks introduction of all code that depend on dts nodes :(, no matter how I dont like being blocked and my many series delayed, I believe Mike, Tero, Rajendra are doing the right architecture and we should wait for it's upstream introduction.

That is just my 2 cents.

From: Dan Murphy <[email protected]>

Add support for blue LED 1 off of GPIO 153.
Make the LED a heartbeat LED
Configure the MUX for GPIO output.

Cc Dan Murphy <[email protected]>

Signed-off-by Dan Murphy <[email protected]>

[Sricharan R <[email protected]>: Replaced constants with preprocessor macros]

Signed-off-by Sricharan R <[email protected]>

---
 arch/arm/boot/dts/omap5-uevm.dts |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)

arch/arm/boot/dts/omap5-uevm.dts +11 -0

index cf862df..a2aed5b 100644
@@ -66,6 +66,16 @@
 		device = <&hsusb2_phy>;
 		clock-frequency = <19200000>; /* 19.2 MHz */
 	};
+
+	leds {
+		compatible = "gpio-leds";
+		led at 1 {
+			label = "omap5:blue:usr1";
+			gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
+			linux,default-trigger = "heartbeat";
+			default-state = "off";
+		};
+	};
 };
 
 &omap5_pmx_core {

@@ -77,6 +87,7 @@
 			&mcbsp1_pins
 			&mcbsp2_pins
 			&usbhost_pins
+			&led_gpio_pins
 	>;
 
 	twl6040_pins: pinmux_twl6040_pins {

arch/arm/boot/dts/omap5-uevm.dts +2 -0

+		>;
+	};
 };
 
 &omap5_pmx_wkup {

Sricharan

Thanks for sending this up in the series.

Quoted 42 lines · Sricharan R

From: Dan Murphy <[email protected]>

Add support for blue LED 1 off of GPIO 153.
Make the LED a heartbeat LED
Configure the MUX for GPIO output.

Cc Dan Murphy <[email protected]>

Signed-off-by Dan Murphy <[email protected]>

[Sricharan R <[email protected]>: Replaced constants with preprocessor macros]

Signed-off-by Sricharan R <[email protected]>

---
 arch/arm/boot/dts/omap5-uevm.dts |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)

arch/arm/boot/dts/omap5-uevm.dts +11 -0

index cf862df..a2aed5b 100644
@@ -66,6 +66,16 @@
 		device = <&hsusb2_phy>;
 		clock-frequency = <19200000>; /* 19.2 MHz */
 	};
+
+	leds {
+		compatible = "gpio-leds";
+		led at 1 {
+			label = "omap5:blue:usr1";
+			gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
+			linux,default-trigger = "heartbeat";
+			default-state = "off";
+		};
+	};
 };
 
 &omap5_pmx_core {

@@ -77,6 +87,7 @@
 			&mcbsp1_pins
 			&mcbsp2_pins
 			&usbhost_pins
+			&led_gpio_pins
 	>;
 

arch/arm/boot/dts/omap5-uevm.dts line 192

Quoted 9 lines

arch/arm/boot/dts/omap5-uevm.dts +4 -0

 	twl6040_pins: pinmux_twl6040_pins {

@@ -175,6 +186,12 @@
 			0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 OUTPUT | MODE 6 ETH_NRESET */
 		>;
 	};
+
+	led_gpio_pins: pinmux_led_gpio_pins {
+		pinctrl-single,pins = <
+			0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 OUTPUT | MODE6 */

Same comment from Florian. We can drop the OUTPUT | MODE6 in the comment.