powerpc/85xx: Add P1023RDB board support
PATCH v2 1/1 powerpc/85xx: Add P1023RDB board support
P1023RDB Specification:
-----------------------
Memory subsystem:
512MB DDR3 (Fixed DDR on board)
64MB NOR flash
128MB NAND flash
Ethernet:
eTSEC1: Connected to Atheros AR8035 GETH PHY
eTSEC2: Connected to Atheros AR8035 GETH PHY
PCIe:
Three mini-PCIe slots
USB: Two USB2.0 Type A ports
I2C:
AT24C08 8K Board EEPROM (8 bit address)
--- arch/powerpc/cpu/mpc85xx/Makefile | 1 + board/freescale/p1023rdb/Makefile | 33 +++ board/freescale/p1023rdb/ddr.c | 105 +++++++++ board/freescale/p1023rdb/law.c | 34 +++ board/freescale/p1023rdb/p1023rdb.c | 161 ++++++++++++++ board/freescale/p1023rdb/tlb.c | 115 ++++++++++ boards.cfg | 1 + include/configs/P1023RDB.h | 406 +++++++++++++++++++++++++++++++++++ 8 files changed, 856 insertions(+), 0 deletions(-) create mode 100644 board/freescale/p1023rdb/Makefile create mode 100644 board/freescale/p1023rdb/ddr.c create mode 100644 board/freescale/p1023rdb/law.c create mode 100644 board/freescale/p1023rdb/p1023rdb.c create mode 100644 board/freescale/p1023rdb/tlb.c create mode 100644 include/configs/P1023RDB.h
arch/powerpc/cpu/mpc85xx/Makefile +1 -0
@@ -73,6 +73,7 @@ COBJS-$(CONFIG_P1014) += ddr-gen3.o COBJS-$(CONFIG_P1020) += ddr-gen3.o COBJS-$(CONFIG_P1021) += ddr-gen3.o COBJS-$(CONFIG_P1022) += ddr-gen3.o +COBJS-$(CONFIG_P1023) += ddr-gen3.o COBJS-$(CONFIG_P1024) += ddr-gen3.o COBJS-$(CONFIG_P1025) += ddr-gen3.o COBJS-$(CONFIG_P2010) += ddr-gen3.o
board/freescale/p1023rdb/Makefile new file +33 -0
@@ -0,0 +1,33 @@ +# +# Copyright 2013 Freescale Semiconductor, Inc. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS-y += $(BOARD).o +COBJS-y += ddr.o +COBJS-y += law.o +COBJS-y += tlb.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +#########################################################################
board/freescale/p1023rdb/ddr.c new file +105 -0
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board/freescale/p1023rdb/law.c new file +34 -0
@@ -0,0 +1,34 @@ +/* +* Copyright 2013 Freescale Semiconductor, Inc. +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + +#include <common.h> +#include <asm/fsl_law.h> +#include <asm/mmu.h> + +struct law_entry law_table[] = { +SET_LAW (CONFIG_SYS_NAND_BASE_PHYS ,LAW_SIZE_1M ,LAW_TRGT_IF_LBC ), +SET_LAW (CONFIG_SYS_QMAN_MEM_PHYS ,LAW_SIZE_4M , +LAW_TRGT_IF_DPAA_SWP_SRAM ), +SET_LAW (CONFIG_SYS_FLASH_BASE_PHYS ,LAW_SIZE_256M ,LAW_TRGT_IF_LBC ), +}; + +int num_law_entries =ARRAY_SIZE (law_table);
board/freescale/p1023rdb/p1023rdb.c new file +161 -0
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board/freescale/p1023rdb/tlb.c new file +115 -0
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boards.cfg +1 -0
@@ -829,6 +829,7 @@ P1022DS_36BIT_SPIFLASH powerpc mpc85xx p1022ds freesca P1022DS_SDCARD powerpc mpc85xx p1022ds freescale - P1022DS:SDCARD P1022DS_36BIT_SDCARD powerpc mpc85xx p1022ds freescale - P1022DS:36BIT,SDCARD P1022DS_36BIT powerpc mpc85xx p1022ds freescale - P1022DS:36BIT +P1023RDB powerpc mpc85xx p1023rdb freescale - P1023RDB P1023RDS powerpc mpc85xx p1023rds freescale - P1023RDS P1023RDS_NAND powerpc mpc85xx p1023rds freescale - P1023RDS:NAND P1024RDB powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1024RDB
include/configs/P1023RDB.h new file +406 -0
406 lines not on this page · raw message
Signature · 1 line
1.7.6.5
PATCH v2 1/1 powerpc/85xx: Add P1023RDB board support
board/freescale/p1023rdb/tlb.c line 59
Quoted 6 lines · Chunhe Lan
board/freescale/p1023rdb/tlb.c new file +3
-0+/* W**G* - Flash, localbus */ +/* This will be changed to *I*G* after relocation to RAM. */ + SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE,
CONFIG_SYS_FLASH_BASE_PHYS,board/freescale/p1023rdb/tlb.c new file +2
-0+MAS3_SX |MAS3_SW |MAS3_SR ,MAS2_W |MAS2_G , + 0, 2, BOOKE_PAGESZ_256M, 1),
Do not set MAS3_SX on I/O regions.
Quoted 11 lines
(quoted diff) +2
-0+ /* Bman/Qman */ + SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE,
CONFIG_SYS_BMAN_MEM_PHYS,board/freescale/p1023rdb/tlb.c new file +7
-0+ MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 7, BOOKE_PAGESZ_1M, 1), +SET_TLB_ENTRY (1 ,CONFIG_SYS_BMAN_MEM_BASE +0x00100000 , +CONFIG_SYS_BMAN_MEM_PHYS +0x00100000 , +MAS3_SX |MAS3_SW |MAS3_SR ,MAS2_I |MAS2_G , +0 ,8 ,BOOKE_PAGESZ_1M ,1 ), + SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE,
CONFIG_SYS_QMAN_MEM_PHYS,
board/freescale/p1023rdb/tlb.c line 96
Quoted 6 lines
board/freescale/p1023rdb/tlb.c new file +6
-0+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M, + 0, 9, BOOKE_PAGESZ_1M, 1), +SET_TLB_ENTRY (1 ,CONFIG_SYS_QMAN_MEM_BASE +0x00100000 , +CONFIG_SYS_QMAN_MEM_PHYS +0x00100000 , +MAS3_SX |MAS3_SW |MAS3_SR ,MAS2_I |MAS2_G , + 0, 10, BOOKE_PAGESZ_1M, 1),
Likewise.
Quoted 5 lines
+/*
+ * Memory map
+ *
+ * 0x0000_0000 0x1fff_ffff DDR 500M
Cacheable
500M? Are you sure?
Quoted 11 lines
+ * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G
non-cacheable
+ * 0xc000_0000 0xdfff_ffff PCI 512M
non-cacheable
+ * 0xe100_0000 0xe3ff_ffff PCI IO range 4M
non-cacheable
+ * 0xff00_0000 0xff3f_ffffDPAA_QBMAN4M
+ *
+ * Localbus non-cacheable
+ *
+ * 0xec00_0000 0xefff_ffff NOR flash 64M NOR
Quoted 8 lines
flash
+ * 0xff60_0000 0xff7f_ffff CCSR 2M
non-cacheable
+ * 0xffa0_0000 0xffaf_ffff NAND 1M
non-cacheable
+ * 0xffd0_0000 0xffd0_3fff init ram 16K
Cacheable TLB0
+ */
The "init ram" is neither non-cacheable nor on the localbus. CCSR is also not on the localbus.
Quoted 9 lines
include/configs/P1023RDB.h new file +6
-0+/* +* For booting Linux, the board info and command line data +* have to be in the first 16 MB of memory, since this is +* the maximum mapped by the Linux kernel during initialization. +*/ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20)/* Initial Memory map for Linux*/
+#defineCONFIG_SYS_BOOTM_LEN(16 << 20) /* Increase max gunzip size
*/
It's 64 MiB on 85xx. Please watch the blind copy-and-paste. Especially, why are you blindly copying from a non-85xx config file?
Quoted 6 lines
(quoted diff) +2
-0+#if defined(CONFIG_CMD_KGDB) +#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serialport */
+#defineCONFIG_KGDB_SER_INDEX2 /* which serial port to
use */
+#endif
Get rid of this.
Quoted 1 line
+#define
CONFIG_BOOTDELAY10 /* -1 disables auto-boot */
The out-of-the-box environment is not going to work unmodified (I don't even see a CONFIG_BOOTCOMMAND), so let's just default this to -1 now that it no longer has the affect of disabling the code at compile-time.
-Scott
PATCH v2 1/1 powerpc/85xx: Add P1023RDB board support
Quoted 8 lines · Scott Wood
board/freescale/p1023rdb/tlb.c line 59
Quoted 5 lines · Chunhe Lan
board/freescale/p1023rdb/tlb.c new file +5
-0+/* W**G* - Flash, localbus */ +/* This will be changed to *I*G* after relocation to RAM. */ +SET_TLB_ENTRY (1 ,CONFIG_SYS_FLASH_BASE ,CONFIG_SYS_FLASH_BASE_PHYS , +MAS3_SX |MAS3_SW |MAS3_SR ,MAS2_W |MAS2_G , + 0, 2, BOOKE_PAGESZ_256M, 1),Do not set
MAS3_SXon I/O regions.
Here is need to use MAS3_SX, or u-boot does NOT work.
Quoted 6 lines
Quoted 4 lines
+/*
+ * Memory map
+ *
+ * 0x0000_0000 0x1fff_ffff DDR 500M Cacheable500M? Are you sure?
Yes, system has the 500MB size of ddr.
Thanks,
-Chunhe
Quoted 16 lines
Review
Quoted 5 lines
(quoted diff) +2
-0+#if defined(CONFIG_CMD_KGDB) +#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdbserial port */
(quoted diff) +2
-0+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ +#endifGet rid of this.
Quoted 1 line
+#define
CONFIG_BOOTDELAY10 /* -1 disables auto-boot */The out-of-the-box environment is not going to work unmodified (I don't even see a
CONFIG_BOOTCOMMAND), so let's just default this to -1 now that it no longer has the affect of disabling the code at compile-time.-Scott
PATCH v2 1/1 powerpc/85xx: Add P1023RDB board support
Quoted 9 lines · Chunhe Lan
Quoted 8 lines · Scott Wood
Quoted 6 lines · Chunhe Lan
board/freescale/p1023rdb/tlb.c new file +3
-0+/* W**G* - Flash, localbus */ +/* This will be changed to *I*G* after relocation to RAM. */ + SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE,
CONFIG_SYS_FLASH_BASE_PHYS,board/freescale/p1023rdb/tlb.c new file +2
-0+MAS3_SX |MAS3_SW |MAS3_SR ,MAS2_W |MAS2_G , + 0, 2, BOOKE_PAGESZ_256M, 1),
Quoted 3 lines
Quoted 1 line
Do not set
MAS3_SXon I/O regions.Here is need to use
MAS3_SX, or u-boot does NOT work.
Sorry, I misread the comment as saying that this was the after-relocation TLB entry, not that it was modified after relocation. When changing to *I*G* it should also have MAS3_SX removed.
Quoted 8 lines
Quoted 6 lines
Quoted 4 lines
+/*
+ * Memory map
+ *
+ * 0x0000_0000 0x1fff_ffff DDR 500M Cacheable500M? Are you sure?
Yes, system has the 500MB size of ddr.
Not 512 MiB?
-Scott