U-boot: Erase/read/write issue with S25fl256S flash device
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am trying to make use of the existing spi_flash.c framework available at u-boot for erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while using S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x50000
- erases only first 0x20000 bytes of flash device, anything above that
is not erase. I need to
issue separate commands after 0x20000 for every 0x10000 bytes.
Am i missing anything here?
2. read
sf read 81000000 0 0x10000
Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00: ffffffff ffffffff ffffffff ffffffff ................ 81000f10: ffffffff ffffffff ffffffff ffffffff ................ 81000f20: ffffffff ffffffff ffffffff ffffffff ................ 81000f30: ffffffff ffffffff ffffffff ffffffff ................ 81000f40: ffffffff ffffffff ffffffff ffffffff ................ 81000f50: ffffffff ffffffff ffffffff ffffffff ................ 81000f60: ffffffff ffffffff ffffffff ffffffff ................ 81000f70: ffffffff ffffffff ffffffff ffffffff ................ 81000f80: ffffffff ffffffff ffffffff ffffffff ................ 81000f90: ffffffff ffffffff ffffffff ffffffff ................ 81000fa0: ffffffff ffffffff ffffffff ffffffff ................ 81000fb0: ffffffff ffffffff ffffffff ffffffff ................ 81000fc0: ffffffff ffffffff ffffffff ffffffff ................ 81000fd0: ffffffff ffffffff ffffffff ffffffff ................ 81000fe0: ffffffff ffffffff ffffffff ffffffff ................ 81000ff0: ffffffff ffffffff 00ffffff 00000000 ................
In this dump, if you see 81000ff0 the last column shows 000000 which is not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with the below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
- u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash->memory_map)
memcpy(data, flash->memory_map + offset, len);
+ page_size = flash->page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual < len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size - byte_addr);
+
+ cmd[1] = page_addr >> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
data + actual, chunk_len);
+ if (ret < 0) {
+ debug("SF: read failed");
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a page is not getting
written.
Workaround:
I did a write disable latch@the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct spi_flash
*flash, u32 offset,
if (ret)
break;+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret < 0) {
+ printf("SF: disabling write failed\n");
+ break;
+ }
+
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any
configurations that I might be missing ?
Hi,
Quoted 132 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am trying to
make use of the existingspi_flash.cframework available at u-boot for erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while using S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above mentioned flash device is attached.1. Erase (
spi_flash_cmd_erase)Issuing a command something like this..
sf erase
0x00x50000
- erases only first0x20000bytes of flash device, anything above
that is not erase. I need to
issue separate commands after0x20000for every0x10000bytes.Am i missing anything here?
2. read
sf read 81000000 0
0x10000Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md81000f0081000f00: ffffffff ffffffff ffffffff ffffffff ................ 81000f10: ffffffff ffffffff ffffffff ffffffff ................ 81000f20: ffffffff ffffffff ffffffff ffffffff ................ 81000f30: ffffffff ffffffff ffffffff ffffffff ................ 81000f40: ffffffff ffffffff ffffffff ffffffff ................ 81000f50: ffffffff ffffffff ffffffff ffffffff ................ 81000f60: ffffffff ffffffff ffffffff ffffffff ................ 81000f70: ffffffff ffffffff ffffffff ffffffff ................ 81000f80: ffffffff ffffffff ffffffff ffffffff ................ 81000f90: ffffffff ffffffff ffffffff ffffffff ................ 81000fa0: ffffffff ffffffff ffffffff ffffffff ................ 81000fb0: ffffffff ffffffff ffffffff ffffffff ................ 81000fc0: ffffffff ffffffff ffffffff ffffffff ................ 81000fd0: ffffffff ffffffff ffffffff ffffffff ................ 81000fe0: ffffffff ffffffff ffffffff ffffffff ................ 81000ff0: ffffffff ffffffff 00ffffff 00000000 ................In this dump, if you see
81000ff0the last column shows 000000 which is not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with the below patch[1],
which is giving me the correct result.
[1]:(quoted diff) +28
-5@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4]; /* Handle memory-mapped SPI */ if (flash->memory_map) memcpy(data, flash->memory_map + offset, len); + page_size = flash->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = CMD_READ_ARRAY_SLOW; + for (actual = 0; actual < len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[1] = page_addr >> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), data + actual, chunk_len); + if (ret < 0) { + debug("SF: read failed"); + break; + } - cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } + } - return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len); + return ret; }Any idea about this?
3. write (
spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a page is not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,if (ret) break;(quoted diff) +6
-0+ ret = spi_flash_cmd_write_disable(flash); + if (ret < 0) { + printf("SF: disabling write failed\n"); + break; + } +
Quoted 4 lines
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any configurations that I might be missing ?
Any Input on this?
Quoted 136 lines · Sourav Poddar
Hi,
Quoted 132 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am trying to
make use of the existingspi_flash.cframework available at u-boot for erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while using S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above mentioned flash device is attached.1. Erase (
spi_flash_cmd_erase)Issuing a command something like this..
sf erase
0x00x50000
- erases only first0x20000bytes of flash device, anything above
that is not erase. I need to
issue separate commands after0x20000for every0x10000bytes.Am i missing anything here?
2. read
sf read 81000000 0
0x10000Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md81000f0081000f00: ffffffff ffffffff ffffffff ffffffff ................ 81000f10: ffffffff ffffffff ffffffff ffffffff ................ 81000f20: ffffffff ffffffff ffffffff ffffffff ................ 81000f30: ffffffff ffffffff ffffffff ffffffff ................ 81000f40: ffffffff ffffffff ffffffff ffffffff ................ 81000f50: ffffffff ffffffff ffffffff ffffffff ................ 81000f60: ffffffff ffffffff ffffffff ffffffff ................ 81000f70: ffffffff ffffffff ffffffff ffffffff ................ 81000f80: ffffffff ffffffff ffffffff ffffffff ................ 81000f90: ffffffff ffffffff ffffffff ffffffff ................ 81000fa0: ffffffff ffffffff ffffffff ffffffff ................ 81000fb0: ffffffff ffffffff ffffffff ffffffff ................ 81000fc0: ffffffff ffffffff ffffffff ffffffff ................ 81000fd0: ffffffff ffffffff ffffffff ffffffff ................ 81000fe0: ffffffff ffffffff ffffffff ffffffff ................ 81000ff0: ffffffff ffffffff 00ffffff 00000000 ................In this dump, if you see
81000ff0the last column shows 000000 which is not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with the below patch[1],
which is giving me the correct result.
[1]:(quoted diff) +28
-5@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4]; /* Handle memory-mapped SPI */ if (flash->memory_map) memcpy(data, flash->memory_map + offset, len); + page_size = flash->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = CMD_READ_ARRAY_SLOW; + for (actual = 0; actual < len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[1] = page_addr >> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), data + actual, chunk_len); + if (ret < 0) { + debug("SF: read failed"); + break; + } - cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } + } - return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len); + return ret; }Any idea about this?
3. write (
spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a page is not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,if (ret) break;(quoted diff) +6
-0+ ret = spi_flash_cmd_write_disable(flash); + if (ret < 0) { + printf("SF: disabling write failed\n"); + break; + } +
Quoted 5 lines
Quoted 4 lines
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new changes.
I will intimate you once the push done.
--
Thanks,
Jagan.
Hi Jagan,
Quoted 144 lines · Jagan Teki
Quoted 137 lines · Sourav Poddar
Hi,
Quoted 133 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am trying to
make use of the existingspi_flash.cframework available at u-boot for erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while using S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above mentioned flash device is attached.1. Erase (
spi_flash_cmd_erase)Issuing a command something like this..
sf erase
0x00x50000
- erases only first0x20000bytes of flash device, anything above
that is not erase. I need to
issue separate commands after0x20000for every0x10000bytes.Am i missing anything here?
2. read
sf read 81000000 0
0x10000Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md81000f0081000f00: ffffffff ffffffff ffffffff ffffffff ................ 81000f10: ffffffff ffffffff ffffffff ffffffff ................ 81000f20: ffffffff ffffffff ffffffff ffffffff ................ 81000f30: ffffffff ffffffff ffffffff ffffffff ................ 81000f40: ffffffff ffffffff ffffffff ffffffff ................ 81000f50: ffffffff ffffffff ffffffff ffffffff ................ 81000f60: ffffffff ffffffff ffffffff ffffffff ................ 81000f70: ffffffff ffffffff ffffffff ffffffff ................ 81000f80: ffffffff ffffffff ffffffff ffffffff ................ 81000f90: ffffffff ffffffff ffffffff ffffffff ................ 81000fa0: ffffffff ffffffff ffffffff ffffffff ................ 81000fb0: ffffffff ffffffff ffffffff ffffffff ................ 81000fc0: ffffffff ffffffff ffffffff ffffffff ................ 81000fd0: ffffffff ffffffff ffffffff ffffffff ................ 81000fe0: ffffffff ffffffff ffffffff ffffffff ................ 81000ff0: ffffffff ffffffff 00ffffff 00000000 ................In this dump, if you see
81000ff0the last column shows 000000 which is not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with the below patch[1],
which is giving me the correct result.
[1]:(quoted diff) +28
-5@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4]; /* Handle memory-mapped SPI */ if (flash->memory_map) memcpy(data, flash->memory_map + offset, len); + page_size = flash->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = CMD_READ_ARRAY_SLOW; + for (actual = 0; actual < len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[1] = page_addr >> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), data + actual, chunk_len); + if (ret < 0) { + debug("SF: read failed"); + break; + } - cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } + } - return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len); + return ret;}
Any idea about this?
3. write (
spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a page is not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,if (ret) break;(quoted diff) +6
-0+ ret = spi_flash_cmd_write_disable(flash); + if (ret < 0) { + printf("SF: disabling write failed\n"); + break; + } +Quoted 5 lines
Quoted 4 lines
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any configurations that I might be missing ?
Any Input on this?
Quoted 12 lines
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new changes.
I will intimate you once the push done.
Signature · 2 lines
Thanks, Jagan.
Thanks a lot for the reply.
Sure, will wait for your changes to go in.
Thanks,
Sourav
Quoted 153 lines · Sourav Poddar
Hi Jagan,
Quoted 151 lines · Jagan Teki
Quoted 137 lines · Sourav Poddar
Hi,
Quoted 133 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am trying to
make use of the existingspi_flash.cframework available at u-boot for erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while using S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above mentioned flash device is attached.1. Erase (
spi_flash_cmd_erase)Issuing a command something like this..
sf erase
0x00x50000
- erases only first0x20000bytes of flash device, anything above
that is not erase. I need to
issue separate commands after0x20000for every0x10000bytes.Am i missing anything here?
2. read
sf read 81000000 0
0x10000Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md81000f0081000f00: ffffffff ffffffff ffffffff ffffffff ................ 81000f10: ffffffff ffffffff ffffffff ffffffff ................ 81000f20: ffffffff ffffffff ffffffff ffffffff ................ 81000f30: ffffffff ffffffff ffffffff ffffffff ................ 81000f40: ffffffff ffffffff ffffffff ffffffff ................ 81000f50: ffffffff ffffffff ffffffff ffffffff ................ 81000f60: ffffffff ffffffff ffffffff ffffffff ................ 81000f70: ffffffff ffffffff ffffffff ffffffff ................ 81000f80: ffffffff ffffffff ffffffff ffffffff ................ 81000f90: ffffffff ffffffff ffffffff ffffffff ................ 81000fa0: ffffffff ffffffff ffffffff ffffffff ................ 81000fb0: ffffffff ffffffff ffffffff ffffffff ................ 81000fc0: ffffffff ffffffff ffffffff ffffffff ................ 81000fd0: ffffffff ffffffff ffffffff ffffffff ................ 81000fe0: ffffffff ffffffff ffffffff ffffffff ................ 81000ff0: ffffffff ffffffff 00ffffff 00000000 ................In this dump, if you see
81000ff0the last column shows 000000 which is not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with the below patch[1],
which is giving me the correct result.
[1]:(quoted diff) +28
-5@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4]; /* Handle memory-mapped SPI */ if (flash->memory_map) memcpy(data, flash->memory_map + offset, len); + page_size = flash->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = CMD_READ_ARRAY_SLOW; + for (actual = 0; actual < len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[1] = page_addr >> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), data + actual, chunk_len); + if (ret < 0) { + debug("SF: read failed"); + break; + } - cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } + } - return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len); + return ret;}
Any idea about this?
3. write (
spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a page is not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,if (ret) break;(quoted diff) +6
-0+ ret = spi_flash_cmd_write_disable(flash); + if (ret < 0) { + printf("SF: disabling write failed\n"); + break; + } +Quoted 5 lines
Quoted 4 lines
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new changes.
I will intimate you once the push done.
Quoted 7 lines
Quoted 5 lines
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repogit://git.denx.de/u-boot-spi.git
and try to test 256S parts, fyi: I tested the same part got the +ve result.
--
Thanks,
Jagan.
Hi Jagan,
Quoted 166 lines · Jagan Teki
Quoted 157 lines · Sourav Poddar
Hi Jagan,
Quoted 155 lines · Jagan Teki
Quoted 141 lines · Sourav Poddar
Hi,
Quoted 137 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am trying to
make use of the existingspi_flash.cframework available at u-boot for
erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while using S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above mentioned flash device is attached.1. Erase (
spi_flash_cmd_erase)Issuing a command something like this..
sf erase
0x00x50000
- erases only first0x20000bytes of flash device, anything above
that is not erase. I need to
issue separate commands after0x20000for every0x10000bytes.Am i missing anything here?
2. read
sf read 81000000 0
0x10000Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md81000f0081000f00: ffffffff ffffffff ffffffff ffffffff ................ 81000f10: ffffffff ffffffff ffffffff ffffffff ................ 81000f20: ffffffff ffffffff ffffffff ffffffff ................ 81000f30: ffffffff ffffffff ffffffff ffffffff ................ 81000f40: ffffffff ffffffff ffffffff ffffffff ................ 81000f50: ffffffff ffffffff ffffffff ffffffff ................ 81000f60: ffffffff ffffffff ffffffff ffffffff ................ 81000f70: ffffffff ffffffff ffffffff ffffffff ................ 81000f80: ffffffff ffffffff ffffffff ffffffff ................ 81000f90: ffffffff ffffffff ffffffff ffffffff ................ 81000fa0: ffffffff ffffffff ffffffff ffffffff ................ 81000fb0: ffffffff ffffffff ffffffff ffffffff ................ 81000fc0: ffffffff ffffffff ffffffff ffffffff ................ 81000fd0: ffffffff ffffffff ffffffff ffffffff ................ 81000fe0: ffffffff ffffffff ffffffff ffffffff ................ 81000ff0: ffffffff ffffffff 00ffffff 00000000 ................In this dump, if you see
81000ff0the last column shows 000000 which is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with the below patch[1],
which is giving me the correct result.
[1]:(quoted diff) +28
-5@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4]; /* Handle memory-mapped SPI */ if (flash->memory_map) memcpy(data, flash->memory_map + offset, len); + page_size = flash->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = CMD_READ_ARRAY_SLOW; + for (actual = 0; actual < len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[1] = page_addr >> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), data + actual, chunk_len); + if (ret < 0) { + debug("SF: read failed"); + break; + } - cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } + } - return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len); + return ret;}
Any idea about this?
3. write (
spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a page is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,if (ret) break;(quoted diff) +6
-0+ ret = spi_flash_cmd_write_disable(flash); + if (ret < 0) { + printf("SF: disabling write failed\n"); + break; + } +Quoted 5 lines
Quoted 4 lines
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new changes.
I will intimate you once the push done.
Quoted 7 lines
Quoted 5 lines
Signature · 2 lines
Thanks, Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.
Quoted 8 lines
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the +ve result.
Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).
Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: Detected S25FL256S_64K with page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #define CONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase 0x0 0x10000
SF: 65536 bytes @ 0x0 Erased: OK
DRA752 EVM # mw.b 0x81000100 0xff 0x10000
DRA752 EVM # sf read 0x81003000 0x0 0x10000
SF: 65536 bytes @ 0x0 Read: OK
DRA752 EVM # cmp.b 0x81003000 0x81000100 0x10000 byte at 0x81003ffb (0x0) != byte at 0x810010fb (0xff) Total of 4091 byte(s) were the same
Erase: not able to do with a single command, need to issue for every 0x10000 bytes.
Write: Need to disable latch after every write to make it properly work.
Is it possible for you to give me basic commands which you might have ran to confirm
the read/write and erase ??
Thanks,
Sourav
Quoted 3 lines
Signature · 2 lines
Thanks, Jagan.
Hi Sourav,
Quoted 201 lines · Sourav Poddar
Hi Jagan,
Quoted 171 lines · Jagan Teki
Quoted 160 lines · Sourav Poddar
Hi Jagan,
Quoted 157 lines · Jagan Teki
Quoted 141 lines · Sourav Poddar
Hi,
Quoted 136 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am trying to
make use of the existingspi_flash.cframework available at u-boot for erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while using S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above mentioned flash device is attached.1. Erase (
spi_flash_cmd_erase)Issuing a command something like this..
sf erase
0x00x50000
- erases only first0x20000bytes of flash device, anything above
that is not erase. I need to
issue separate commands after0x20000for every0x10000bytes.Am i missing anything here?
2. read
sf read 81000000 0
0x10000Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md81000f0081000f00: ffffffff ffffffff ffffffff ffffffff ................ 81000f10: ffffffff ffffffff ffffffff ffffffff ................ 81000f20: ffffffff ffffffff ffffffff ffffffff ................ 81000f30: ffffffff ffffffff ffffffff ffffffff ................ 81000f40: ffffffff ffffffff ffffffff ffffffff ................ 81000f50: ffffffff ffffffff ffffffff ffffffff ................ 81000f60: ffffffff ffffffff ffffffff ffffffff ................ 81000f70: ffffffff ffffffff ffffffff ffffffff ................ 81000f80: ffffffff ffffffff ffffffff ffffffff ................ 81000f90: ffffffff ffffffff ffffffff ffffffff ................ 81000fa0: ffffffff ffffffff ffffffff ffffffff ................ 81000fb0: ffffffff ffffffff ffffffff ffffffff ................ 81000fc0: ffffffff ffffffff ffffffff ffffffff ................ 81000fd0: ffffffff ffffffff ffffffff ffffffff ................ 81000fe0: ffffffff ffffffff ffffffff ffffffff ................ 81000ff0: ffffffff ffffffff 00ffffff 00000000 ................In this dump, if you see
81000ff0the last column shows 000000 which is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with the below patch[1],
which is giving me the correct result.
[1]:(quoted diff) +28
-5@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4]; /* Handle memory-mapped SPI */ if (flash->memory_map) memcpy(data, flash->memory_map + offset, len); + page_size = flash->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = CMD_READ_ARRAY_SLOW; + for (actual = 0; actual < len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[1] = page_addr >> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), data + actual, chunk_len); + if (ret < 0) { + debug("SF: read failed"); + break; + } - cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } + } - return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len); + return ret;}
Any idea about this?
3. write (
spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a page is not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,if (ret) break;(quoted diff) +6
-0+ ret = spi_flash_cmd_write_disable(flash); + if (ret < 0) { + printf("SF: disabling write failed\n"); + break; + } +Quoted 5 lines
Quoted 4 lines
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new changes.
I will intimate you once the push done.
Quoted 7 lines
Quoted 5 lines
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.Quoted 8 lines
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the +ve result.
Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #defineCONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the same
Quoted 8 lines
Erase: not able to do with a single command, need to issue for every
0x10000bytes.Write: Need to disable latch after every write to make it properly work.
Is it possible for you to give me basic commands which you might have ran to confirm
the read/write and erase ??
I tested the same part - for me i couldn't see the issues with SL256S
OK! can enable the log on poll function, spi_flash_cmd_wait_ready() make debug -> printf.
Do the same test.! and send the log file.
--
Thanks,
Jagan.
HI Jagan,
Quoted 207 lines · Jagan Teki
Hi Sourav,
Quoted 194 lines · Sourav Poddar
Hi Jagan,
Quoted 164 lines · Jagan Teki
Quoted 155 lines · Sourav Poddar
Hi Jagan,
Quoted 153 lines · Jagan Teki
Quoted 139 lines · Sourav Poddar
Hi,
Quoted 135 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am trying to
make use of the existingspi_flash.cframework available at u-boot for erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while using S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above mentioned flash device is attached.1. Erase (
spi_flash_cmd_erase)Issuing a command something like this..
sf erase
0x00x50000
- erases only first0x20000bytes of flash device, anything above
that is not erase. I need toissue separate commands after 0x20000 for every 0x10000 bytes.Am i missing anything here?
2. read
sf read 81000000 0
0x10000Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md81000f0081000f00: ffffffff ffffffff ffffffff ffffffff ................ 81000f10: ffffffff ffffffff ffffffff ffffffff ................ 81000f20: ffffffff ffffffff ffffffff ffffffff ................ 81000f30: ffffffff ffffffff ffffffff ffffffff ................ 81000f40: ffffffff ffffffff ffffffff ffffffff ................ 81000f50: ffffffff ffffffff ffffffff ffffffff ................ 81000f60: ffffffff ffffffff ffffffff ffffffff ................ 81000f70: ffffffff ffffffff ffffffff ffffffff ................ 81000f80: ffffffff ffffffff ffffffff ffffffff ................ 81000f90: ffffffff ffffffff ffffffff ffffffff ................ 81000fa0: ffffffff ffffffff ffffffff ffffffff ................ 81000fb0: ffffffff ffffffff ffffffff ffffffff ................ 81000fc0: ffffffff ffffffff ffffffff ffffffff ................ 81000fd0: ffffffff ffffffff ffffffff ffffffff ................ 81000fe0: ffffffff ffffffff ffffffff ffffffff ................ 81000ff0: ffffffff ffffffff 00ffffff 00000000 ................In this dump, if you see
81000ff0the last column shows 000000 which is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with the below patch[1],
which is giving me the correct result.
[1]:(quoted diff) +28
-5@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4]; /* Handle memory-mapped SPI */ if (flash->memory_map) memcpy(data, flash->memory_map + offset, len); + page_size = flash->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = CMD_READ_ARRAY_SLOW; + for (actual = 0; actual< len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[1] = page_addr>> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), data + actual, chunk_len); + if (ret< 0) { + debug("SF: read failed"); + break; + } - cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } + } - return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len); + return ret;}Any idea about this?
3. write (
spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a page is not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,if (ret) break;(quoted diff) +6
-0+ ret = spi_flash_cmd_write_disable(flash); + if (ret< 0) { + printf("SF: disabling write failed\n"); + break; + } +Quoted 5 lines
Quoted 4 lines
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new changes.
I will intimate you once the push done.
Quoted 7 lines
Quoted 5 lines
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.Quoted 8 lines
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the +ve result.
Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #defineCONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the sameQuoted 8 lines
Erase: not able to do with a single command, need to issue for every
0x10000bytes.Write: Need to disable latch after every write to make it properly work.
Is it possible for you to give me basic commands which you might have ran to confirm
the read/write and erase ??I tested the same part - for me i couldn't see the issues with SL256S
Quoted 7 lines
OK! can enable the log on poll function,
spi_flash_cmd_wait_ready()make debug -> printf.
Do the same test.! and send the log file.--
Thanks,
Jagan.
Here is the output log, no change..
DRA752 EVM # sf probe 0
SF: Detected S25FL256S_64K with page size 64 KiB, total 32 MiB DRA752 EVM # sf erase 0x0 0x10000
SF: 65536 bytes @ 0x0 Erased: OK
DRA752 EVM # mw.b 0x81000100 0xff 0x10000
DRA752 EVM # sf read 0x81003000 0x0 0x10000
SF: 65536 bytes @ 0x0 Read: OK
DRA752 EVM # cmp.b 0x81003000 0x81000100 0x10000 byte at 0x81003ffb (0x0) != byte at 0x810010fb (0xff) Total of 4091 byte(s) were the same
DRA752 EVM #
Code change: for above output.
drivers/mtd/spi/spi_flash.c +0 -0
@@ -85,7 +85,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash,
unsigned long timeout)
ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
if (ret) {
- debug("SF: fail to read %s status register\n",
+ printf("SF: fail to read %s status register\n",
cmd == CMD_READ_STATUS ? "read" : "flag");
return ret;
}
@@ -109,7 +109,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash
*flash, unsigned long timeout)
return 0;
/* Timed out */
- debug("SF: time out!\n");
+ printf("SF: time out!\n");
return -1;}
~Sourav
Quoted 266 lines · Sourav Poddar
HI Jagan,
Quoted 224 lines · Jagan Teki
Hi Sourav,
Quoted 210 lines · Sourav Poddar
Hi Jagan,
Quoted 175 lines · Jagan Teki
Quoted 164 lines · Sourav Poddar
Hi Jagan,
Quoted 161 lines · Jagan Teki
Quoted 145 lines · Sourav Poddar
Hi,
Quoted 140 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am trying to
make use of the existingspi_flash.cframework available at u-boot for
erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while using S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above mentioned flash device is attached.1. Erase (
spi_flash_cmd_erase)Issuing a command something like this..
sf erase
0x00x50000
- erases only first0x20000bytes of flash device, anything above
that is not erase. I need toissue separate commands after 0x20000 for every 0x10000 bytes.Am i missing anything here?
2. read
sf read 81000000 0
0x10000Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md81000f0081000f00: ffffffff ffffffff ffffffff ffffffff ................ 81000f10: ffffffff ffffffff ffffffff ffffffff ................ 81000f20: ffffffff ffffffff ffffffff ffffffff ................ 81000f30: ffffffff ffffffff ffffffff ffffffff ................ 81000f40: ffffffff ffffffff ffffffff ffffffff ................ 81000f50: ffffffff ffffffff ffffffff ffffffff ................ 81000f60: ffffffff ffffffff ffffffff ffffffff ................ 81000f70: ffffffff ffffffff ffffffff ffffffff ................ 81000f80: ffffffff ffffffff ffffffff ffffffff ................ 81000f90: ffffffff ffffffff ffffffff ffffffff ................ 81000fa0: ffffffff ffffffff ffffffff ffffffff ................ 81000fb0: ffffffff ffffffff ffffffff ffffffff ................ 81000fc0: ffffffff ffffffff ffffffff ffffffff ................ 81000fd0: ffffffff ffffffff ffffffff ffffffff ................ 81000fe0: ffffffff ffffffff ffffffff ffffffff ................ 81000ff0: ffffffff ffffffff 00ffffff 00000000 ................In this dump, if you see
81000ff0the last column shows 000000 which is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with the below patch[1],
which is giving me the correct result.
[1]:(quoted diff) +27
-5@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4]; /* Handle memory-mapped SPI */ if (flash->memory_map) memcpy(data, flash->memory_map + offset, len); + page_size = flash->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = CMD_READ_ARRAY_SLOW; + for (actual = 0; actual< len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[1] = page_addr>> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), data + actual, chunk_len); + if (ret< 0) { + debug("SF: read failed"); + break; + } - cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } + } - return spi_flash_read_common(flash, cmd, sizeof(cmd), data,len);
+ return ret;
}Any idea about this?
3. write (
spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a page is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,if (ret) break;(quoted diff) +6
-0+ ret = spi_flash_cmd_write_disable(flash); + if (ret< 0) { + printf("SF: disabling write failed\n"); + break; + } +Quoted 5 lines
Quoted 4 lines
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new changes.
I will intimate you once the push done.
Quoted 7 lines
Quoted 5 lines
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.Quoted 8 lines
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the +ve result.
Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #defineCONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the sameErase: not able to do with a single command, need to issue for every
0x10000
bytes.Quoted 6 lines
Write: Need to disable latch after every write to make it properly work.
Is it possible for you to give me basic commands which you might have ran
to confirm
the read/write and erase ??I tested the same part - for me i couldn't see the issues with SL256S
Quoted 7 lines
OK! can enable the log on poll function,
spi_flash_cmd_wait_ready()make debug -> printf.
Do the same test.! and send the log file.--
Thanks,
Jagan.Here is the output log, no change..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the same
DRA752 EVM #Code change: for above output.
drivers/mtd/spi/spi_flash.c +1
-1@@ -85,7 +85,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) ret =spi_xfer (spi,8 , &cmd,NULL ,SPI_XFER_BEGIN );if (ret) { -debug ("SF: fail to read %s status register\n" , +printf ("SF: fail to read %s status register\n" , cmd ==CMD_READ_STATUS ?"read" :"flag" );return ret;}
drivers/mtd/spi/spi_flash.c int spi_flash_cmd_wait_ready(struct spi_flash *flash, · line 115
Quoted 8 lines
drivers/mtd/spi/spi_flash.c +1
-1@@ -109,7 +109,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)return 0 ;/* Timed out */ -debug ("SF: time out!\n" ); +printf ("SF: time out!\n" );return -1 ; }
Ohh..
- What if you erase the entire flash and read back, same result is it?
- please send the paths for config file for this board?
--
Thanks,
Jagan.
Quoted 266 lines · Jagan Teki
Quoted 255 lines · Sourav Poddar
HI Jagan,
Quoted 214 lines · Jagan Teki
Hi Sourav,
Quoted 202 lines · Sourav Poddar
Hi Jagan,
Quoted 168 lines · Jagan Teki
Quoted 159 lines · Sourav Poddar
Hi Jagan,
Quoted 157 lines · Jagan Teki
Quoted 143 lines · Sourav Poddar
Hi,
Quoted 139 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am trying to
make use of the existingspi_flash.cframework available at u-boot for
erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while using S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above mentioned flash device is attached.1. Erase (
spi_flash_cmd_erase)Issuing a command something like this..
sf erase
0x00x50000
- erases only first0x20000bytes of flash device, anything above
that is not erase. I need toissue separate commands after 0x20000 for every 0x10000 bytes.Am i missing anything here?
2. read
sf read 81000000 0
0x10000Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md 81000f00 81000f00: ffffffff ffffffff ffffffff ffffffff ................ 81000f10: ffffffff ffffffff ffffffff ffffffff ................ 81000f20: ffffffff ffffffff ffffffff ffffffff ................ 81000f30: ffffffff ffffffff ffffffff ffffffff ................ 81000f40: ffffffff ffffffff ffffffff ffffffff ................ 81000f50: ffffffff ffffffff ffffffff ffffffff ................ 81000f60: ffffffff ffffffff ffffffff ffffffff ................ 81000f70: ffffffff ffffffff ffffffff ffffffff ................ 81000f80: ffffffff ffffffff ffffffff ffffffff ................ 81000f90: ffffffff ffffffff ffffffff ffffffff ................ 81000fa0: ffffffff ffffffff ffffffff ffffffff ................ 81000fb0: ffffffff ffffffff ffffffff ffffffff ................ 81000fc0: ffffffff ffffffff ffffffff ffffffff ................ 81000fd0: ffffffff ffffffff ffffffff ffffffff ................ 81000fe0: ffffffff ffffffff ffffffff ffffffff ................ 81000ff0: ffffffff ffffffff 00ffffff 00000000 ................In this dump, if you see
81000ff0the last column shows 000000 which is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with the below patch[1],
which is giving me the correct result.
[1]:(quoted diff) +27
-5@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4]; /* Handle memory-mapped SPI */ if (flash->memory_map) memcpy(data, flash->memory_map + offset, len); + page_size = flash->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = CMD_READ_ARRAY_SLOW; + for (actual = 0; actual< len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[1] = page_addr>> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), data + actual, chunk_len); + if (ret< 0) { + debug("SF: read failed"); + break; + } - cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } + } - return spi_flash_read_common(flash, cmd, sizeof(cmd), data,len);
+ return ret; }Any idea about this?
3. write (
spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a page is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, if (ret) break;(quoted diff) +6
-0+ ret = spi_flash_cmd_write_disable(flash); + if (ret< 0) { + printf("SF: disabling write failed\n"); + break; + } +Quoted 5 lines
Quoted 4 lines
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new changes.
I will intimate you once the push done.
Quoted 7 lines
Quoted 5 lines
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.Quoted 8 lines
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the +ve result.
Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #defineCONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the sameErase: not able to do with a single command, need to issue for every
0x10000
bytes.Quoted 6 lines
Write: Need to disable latch after every write to make it properly work.
Is it possible for you to give me basic commands which you might have ran
to confirm
the read/write and erase ??I tested the same part - for me i couldn't see the issues with SL256S
Quoted 7 lines
OK! can enable the log on poll function,
spi_flash_cmd_wait_ready()
make debug -> printf.
Do the same test.! and send the log file.--
Thanks,
Jagan.Here is the output log, no change..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the same
DRA752 EVM #Code change: for above output.
drivers/mtd/spi/spi_flash.c +1
-1@@ -85,7 +85,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) ret =spi_xfer (spi,8 ,&cmd,NULL ,SPI_XFER_BEGIN );if (ret) { -debug ("SF: fail to read %s status register\n" , +printf ("SF: fail to read %s status register\n" , cmd ==CMD_READ_STATUS ?"read" :"flag" );return ret;}drivers/mtd/spi/spi_flash.c int spi_flash_cmd_wait_ready(struct spi_flash *flash, · line 115
Quoted 8 lines
drivers/mtd/spi/spi_flash.c +1
-1@@ -109,7 +109,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)return 0 ;/* Timed out */ -debug ("SF: time out!\n" ); +printf ("SF: time out!\n" );return -1 ; }Ohh..
Quoted 1 line
- What if you erase the entire flash and read back, same result is it?
Yes.
Quoted 1 line
- please send the paths for config file for this board?
include/configs/dra7xx_evm.h
Quoted 3 lines
--
Thanks,
Jagan.
Quoted 293 lines · Sourav Poddar
Quoted 292 lines · Jagan Teki
Quoted 279 lines · Sourav Poddar
HI Jagan,
Quoted 235 lines · Jagan Teki
Hi Sourav,
Quoted 220 lines · Sourav Poddar
Hi Jagan,
Quoted 185 lines · Jagan Teki
Quoted 174 lines · Sourav Poddar
Hi Jagan,
Quoted 171 lines · Jagan Teki
Quoted 155 lines · Sourav Poddar
Hi,
Quoted 150 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am trying to
make use of the existingspi_flash.cframework available at u-boot for
erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above
mentioned flash device is attached.1. Erase (
spi_flash_cmd_erase)Issuing a command something like this..
sf erase
0x00x50000
- erases only first0x20000bytes of flash device, anything
above
that is not erase. I need toissue separate commands after 0x20000 for every 0x10000bytes.
Am i missing anything here?
2. read
sf read 81000000 0
0x10000Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md 81000f00 81000f00: ffffffff ffffffff ffffffff ffffffff ................ 81000f10: ffffffff ffffffff ffffffff ffffffff ................ 81000f20: ffffffff ffffffff ffffffff ffffffff ................ 81000f30: ffffffff ffffffff ffffffff ffffffff ................ 81000f40: ffffffff ffffffff ffffffff ffffffff ................ 81000f50: ffffffff ffffffff ffffffff ffffffff ................ 81000f60: ffffffff ffffffff ffffffff ffffffff ................ 81000f70: ffffffff ffffffff ffffffff ffffffff ................ 81000f80: ffffffff ffffffff ffffffff ffffffff ................ 81000f90: ffffffff ffffffff ffffffff ffffffff ................ 81000fa0: ffffffff ffffffff ffffffff ffffffff ................ 81000fb0: ffffffff ffffffff ffffffff ffffffff ................ 81000fc0: ffffffff ffffffff ffffffff ffffffff ................ 81000fd0: ffffffff ffffffff ffffffff ffffffff ................ 81000fe0: ffffffff ffffffff ffffffff ffffffff ................ 81000ff0: ffffffff ffffffff 00ffffff 00000000 ................In this dump, if you see
81000ff0the last column shows 000000 which
is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with the
below patch[1],
which is giving me the correct result.
[1]:(quoted diff) +27
-5@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4]; /* Handle memory-mapped SPI */ if (flash->memory_map) memcpy(data, flash->memory_map + offset, len); + page_size = flash->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = CMD_READ_ARRAY_SLOW; + for (actual = 0; actual< len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[1] = page_addr>> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), data + actual, chunk_len); + if (ret< 0) { + debug("SF: read failed"); + break; + } - cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } + } - return spi_flash_read_common(flash, cmd, sizeof(cmd),data,
len);+ return ret; }Any idea about this?
3. write (
spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, if (ret) break;(quoted diff) +6
-0+ ret = spi_flash_cmd_write_disable(flash); + if (ret< 0) { + printf("SF: disabling write failed\n"); + break; + } +Quoted 5 lines
Quoted 4 lines
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new changes.
I will intimate you once the push done.
Quoted 7 lines
Quoted 5 lines
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.Quoted 8 lines
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the +ve result.
Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #defineCONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the sameErase: not able to do with a single command, need to issue for every
0x10000
bytes.Quoted 7 lines
Write: Need to disable latch after every write to make it properly work.
Is it possible for you to give me basic commands which you might have ran
to confirm
the read/write and erase ??I tested the same part - for me i couldn't see the issues with SL256S
Quoted 7 lines
OK! can enable the log on poll function,
spi_flash_cmd_wait_ready()
make debug -> printf.
Do the same test.! and send the log file.--
Thanks,
Jagan.Here is the output log, no change..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the same
DRA752 EVM #Code change: for above output.
drivers/mtd/spi/spi_flash.c +1
-1@@ -85,7 +85,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) ret =spi_xfer (spi,8 ,&cmd,NULL ,SPI_XFER_BEGIN );if (ret) { -debug ("SF: fail to read %s status register\n" , +printf ("SF: fail to read %s status register\n" , cmd ==CMD_READ_STATUS ?"read" :"flag" );return ret; }drivers/mtd/spi/spi_flash.c int spi_flash_cmd_wait_ready(struct spi_flash *flash, · line 115
Quoted 8 lines
drivers/mtd/spi/spi_flash.c +1
-1@@ -109,7 +109,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)return 0 ;/* Timed out */ -debug ("SF: time out!\n" ); +printf ("SF: time out!\n" );return -1 ; }Ohh..
Quoted 7 lines
Quoted 1 line
- What if you erase the entire flash and read back, same result is it?
Yes.
Quoted 1 line
- please send the paths for config file for this board?
include/configs/dra7xx_evm.h
I couldn't find any SPI flash configs on above config file, Can you point me the relevant configurations.
--
Thanks,
Jagan.
Quoted 281 lines · Jagan Teki
Quoted 280 lines · Sourav Poddar
Quoted 279 lines · Jagan Teki
Quoted 267 lines · Sourav Poddar
HI Jagan,
Quoted 225 lines · Jagan Teki
Hi Sourav,
Quoted 212 lines · Sourav Poddar
Hi Jagan,
Quoted 178 lines · Jagan Teki
Quoted 169 lines · Sourav Poddar
Hi Jagan,
Quoted 167 lines · Jagan Teki
Quoted 153 lines · Sourav Poddar
Hi,
Quoted 149 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am trying to
make use of the existingspi_flash.cframework available at u-boot for
erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above
mentioned flash device is attached.1. Erase (
spi_flash_cmd_erase)Issuing a command something like this..
sf erase
0x00x50000
- erases only first0x20000bytes of flash device, anything
above
that is not erase. I need toissue separate commands after 0x20000 for every 0x10000bytes.
Am i missing anything here?
2. read
sf read 81000000 0
0x10000Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md 81000f00 81000f00: ffffffff ffffffff ffffffff ffffffff ................ 81000f10: ffffffff ffffffff ffffffff ffffffff ................ 81000f20: ffffffff ffffffff ffffffff ffffffff ................ 81000f30: ffffffff ffffffff ffffffff ffffffff ................ 81000f40: ffffffff ffffffff ffffffff ffffffff ................ 81000f50: ffffffff ffffffff ffffffff ffffffff ................ 81000f60: ffffffff ffffffff ffffffff ffffffff ................ 81000f70: ffffffff ffffffff ffffffff ffffffff ................ 81000f80: ffffffff ffffffff ffffffff ffffffff ................ 81000f90: ffffffff ffffffff ffffffff ffffffff ................ 81000fa0: ffffffff ffffffff ffffffff ffffffff ................ 81000fb0: ffffffff ffffffff ffffffff ffffffff ................ 81000fc0: ffffffff ffffffff ffffffff ffffffff ................ 81000fd0: ffffffff ffffffff ffffffff ffffffff ................ 81000fe0: ffffffff ffffffff ffffffff ffffffff ................ 81000ff0: ffffffff ffffffff 00ffffff 00000000 ................In this dump, if you see
81000ff0the last column shows 000000 which
is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with the
below patch[1],
which is giving me the correct result.
[1]:(quoted diff) +27
-5@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4]; /* Handle memory-mapped SPI */ if (flash->memory_map) memcpy(data, flash->memory_map + offset, len); + page_size = flash->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = CMD_READ_ARRAY_SLOW; + for (actual = 0; actual< len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[1] = page_addr>> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), data + actual, chunk_len); + if (ret< 0) { + debug("SF: read failed"); + break; + } - cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } + } - return spi_flash_read_common(flash, cmd, sizeof(cmd),data,
len);+ return ret; }Any idea about this?
3. write (
spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, if (ret) break;(quoted diff) +6
-0+ ret = spi_flash_cmd_write_disable(flash); + if (ret< 0) { + printf("SF: disabling write failed\n"); + break; + } +Quoted 5 lines
Quoted 4 lines
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new changes.
I will intimate you once the push done.
Quoted 7 lines
Quoted 5 lines
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.Quoted 8 lines
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the +ve result.
Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #defineCONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the sameErase: not able to do with a single command, need to issue for every
0x10000
bytes.Quoted 7 lines
Write: Need to disable latch after every write to make it properly work.
Is it possible for you to give me basic commands which you might have ran
to confirm
the read/write and erase ??I tested the same part - for me i couldn't see the issues with SL256S
Quoted 7 lines
OK! can enable the log on poll function,
spi_flash_cmd_wait_ready()
make debug -> printf.
Do the same test.! and send the log file.--
Thanks,
Jagan.Here is the output log, no change..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the same
DRA752 EVM #Code change: for above output.
drivers/mtd/spi/spi_flash.c +1
-1@@ -85,7 +85,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) ret =spi_xfer (spi,8 ,&cmd,NULL ,SPI_XFER_BEGIN );if (ret) { -debug ("SF: fail to read %s status register\n" , +printf ("SF: fail to read %s status register\n" , cmd ==CMD_READ_STATUS ?"read" :"flag" );return ret; }drivers/mtd/spi/spi_flash.c int spi_flash_cmd_wait_ready(struct spi_flash *flash, · line 115
Quoted 8 lines
drivers/mtd/spi/spi_flash.c +1
-1@@ -109,7 +109,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)return 0 ;/* Timed out */ -debug ("SF: time out!\n" ); +printf ("SF: time out!\n" );return -1 ; }Ohh..
Quoted 8 lines
Quoted 5 lines
Quoted 1 line
- What if you erase the entire flash and read back, same result is it?
Yes.
Quoted 1 line
- please send the paths for config file for this board?
include/configs/dra7xx_evm.hI couldn't find any SPI flash configs on above config file, Can you point me the relevant configurations.
Following are the configuration details for spi..
#define CONFIG_SPI_FLASH_BAR
#define CONFIG_TI_QSPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_SPANSION
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
#define CONFIG_SF_DEFAULT_SPEED 12000000
#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
/* SPI SPL */
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
Quoted 3 lines
--
Thanks,
Jagan.
Quoted 326 lines · Sourav Poddar
Quoted 325 lines · Jagan Teki
Quoted 322 lines · Sourav Poddar
Quoted 314 lines · Jagan Teki
Quoted 307 lines · Sourav Poddar
HI Jagan,
Quoted 256 lines · Jagan Teki
Hi Sourav,
Quoted 240 lines · Sourav Poddar
Hi Jagan,
Quoted 205 lines · Jagan Teki
Quoted 194 lines · Sourav Poddar
Hi Jagan,
Quoted 191 lines · Jagan Teki
Quoted 174 lines · Sourav Poddar
Hi,
Quoted 169 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am
trying to
make use of the existingspi_flash.cframework available at u-boot
for
erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above
mentioned flash device is attached.1. Erase (
spi_flash_cmd_erase)Issuing a command something like this..
sf erase
0x00x50000
- erases only first0x20000bytes of flash device, anything
above
that is not erase. I need toissue separate commands after 0x20000 for every 0x10000bytes.
Am i missing anything here?
2. read
sf read 81000000 0
0x10000Read is not happening properly. The last few byte along the 4k boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md 81000f00
81000f00: ffffffff ffffffff ffffffff ffffffff
................81000f10: ffffffff ffffffff ffffffff ffffffff
................81000f20: ffffffff ffffffff ffffffff ffffffff
................81000f30: ffffffff ffffffff ffffffff ffffffff
................81000f40: ffffffff ffffffff ffffffff ffffffff
................81000f50: ffffffff ffffffff ffffffff ffffffff
................81000f60: ffffffff ffffffff ffffffff ffffffff
................81000f70: ffffffff ffffffff ffffffff ffffffff
................81000f80: ffffffff ffffffff ffffffff ffffffff
................81000f90: ffffffff ffffffff ffffffff ffffffff
................81000fa0: ffffffff ffffffff ffffffff ffffffff
................81000fb0: ffffffff ffffffff ffffffff ffffffff
................81000fc0: ffffffff ffffffff ffffffff ffffffff
................81000fd0: ffffffff ffffffff ffffffff ffffffff
................81000fe0: ffffffff ffffffff ffffffff ffffffff
................81000ff0: ffffffff ffffffff00ffffff00000000
................In this dump, if you see
81000ff0the last column shows 000000 which
is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with the
below patch[1],
which is giving me the correct result.
[1]:(quoted diff) +27
-5@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + unsigned long page_addr, byte_addr, page_size; + size_t chunk_len, actual; + int ret = 0; + u8 cmd[4]; /* Handle memory-mapped SPI */ if (flash->memory_map) memcpy(data, flash->memory_map + offset, len); + page_size = flash->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = CMD_READ_ARRAY_SLOW; + for (actual = 0; actual< len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[1] = page_addr>> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), data + actual, chunk_len); + if (ret< 0) { + debug("SF: read failed"); + break; + } - cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); - cmd[4] = 0x00; + byte_addr += chunk_len; + if (byte_addr == page_size) { + page_addr++; + byte_addr = 0; + } + } - return spi_flash_read_common(flash, cmd, sizeof(cmd),data,
len);+ return ret; }Any idea about this?
3. write (
spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page program) and enable it
again for the next loop. With this, I see I get rid of the above issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, if (ret) break;(quoted diff) +6
-0+ ret = spi_flash_cmd_write_disable(flash); + if (ret< 0) { + printf("SF: disabling write failed\n"); + break; + } +Quoted 5 lines
Quoted 4 lines
Have anyone seen the above mentioned issues regarding read/write/erase? OR is there any configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new
changes.I will intimate you once the push done.
Quoted 7 lines
Quoted 5 lines
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.Quoted 8 lines
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the +ve result.
Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #defineCONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the sameErase: not able to do with a single command, need to issue for every
0x10000
bytes.Quoted 8 lines
Write: Need to disable latch after every write to make it properly work.
Is it possible for you to give me basic commands which you might have
ran
to confirm
the read/write and erase ??I tested the same part - for me i couldn't see the issues with SL256S
Quoted 7 lines
OK! can enable the log on poll function,
spi_flash_cmd_wait_ready()
make debug -> printf.
Do the same test.! and send the log file.--
Thanks,
Jagan.Here is the output log, no change..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the same
DRA752 EVM #Code change: for above output.
drivers/mtd/spi/spi_flash.c +1
-1@@ -85,7 +85,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) ret =spi_xfer (spi,8 ,&cmd,NULL ,SPI_XFER_BEGIN );if (ret) { -debug ("SF: fail to read %s status register\n" , +printf ("SF: fail to read %s status register\n" , cmd ==CMD_READ_STATUS ?"read" :"flag" );return ret; }drivers/mtd/spi/spi_flash.c +1
-1@@ -109,7 +109,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)return 0 ;/* Timed out */ -debug ("SF: time out!\n" ); +printf ("SF: time out!\n" );return -1 ;Quoted 2 lines
}Ohh..
Quoted 1 line
- What if you erase the entire flash and read back, same result is it?
Yes.
Quoted 1 line
- please send the paths for config file for this board?
Quoted 8 lines
Quoted 5 lines
Quoted 1 line
include/configs/dra7xx_evm.hI couldn't find any SPI flash configs on above config file, Can you point me the relevant configurations.
Following are the configuration details for spi..
#defineCONFIG_SPI_FLASH_BAR
#defineCONFIG_TI_QSPI
Where can i find this?
Quoted 7 lines
#define
CONFIG_SPI_FLASH
#defineCONFIG_SPI_FLASH_SPANSION
#defineCONFIG_CMD_SF
#defineCONFIG_CMD_SPI
#defineCONFIG_SF_DEFAULT_SPEED12000000
#defineCONFIG_DEFAULT_SPI_MODESPI_MODE_3
Quoted 7 lines
/* SPI SPL */
#defineCONFIG_SPL_SPI_SUPPORT
#defineCONFIG_SPL_SPI_LOAD
#defineCONFIG_SPL_SPI_FLASH_SUPPORT#define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
--
Thanks,
Jagan.
Hi Jagan,
Quoted 310 lines · Jagan Teki
Quoted 309 lines · Sourav Poddar
Quoted 308 lines · Jagan Teki
Quoted 306 lines · Sourav Poddar
Quoted 301 lines · Jagan Teki
Quoted 295 lines · Sourav Poddar
HI Jagan,
Quoted 246 lines · Jagan Teki
Hi Sourav,
Quoted 232 lines · Sourav Poddar
Hi Jagan,
Quoted 198 lines · Jagan Teki
Quoted 189 lines · Sourav Poddar
Hi Jagan,
Quoted 187 lines · Jagan Teki
Quoted 172 lines · Sourav Poddar
Hi,
Quoted 168 lines · Sourav Poddar
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I
am
trying to
make use of the existing spi_flash.c framework available at
u-boot
for
erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the
above
mentioned flash device is attached.1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x50000
- erases only first 0x20000 bytes of flash device, anything
above
that is not erase. I need to
issue separate commands after 0x20000 for every 0x10000
bytes.Am i missing anything here?
2. read
sf read 81000000 0 0x10000
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md 81000f00
81000f00: ffffffff ffffffff ffffffff ffffffff
................
81000f10: ffffffff ffffffff ffffffff ffffffff
................
81000f20: ffffffff ffffffff ffffffff ffffffff
................
81000f30: ffffffff ffffffff ffffffff ffffffff
................
81000f40: ffffffff ffffffff ffffffff ffffffff
................
81000f50: ffffffff ffffffff ffffffff ffffffff
................
81000f60: ffffffff ffffffff ffffffff ffffffff
................
81000f70: ffffffff ffffffff ffffffff ffffffff
................
81000f80: ffffffff ffffffff ffffffff ffffffff
................
81000f90: ffffffff ffffffff ffffffff ffffffff
................
81000fa0: ffffffff ffffffff ffffffff ffffffff
................
81000fb0: ffffffff ffffffff ffffffff ffffffff
................
81000fc0: ffffffff ffffffff ffffffff ffffffff
................
81000fd0: ffffffff ffffffff ffffffff ffffffff
................
81000fe0: ffffffff ffffffff ffffffff ffffffff
................
81000ff0: ffffffff ffffffff 00ffffff 00000000
................In this dump, if you see 81000ff0 the last column shows 000000
which
is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];/* Handle memory-mapped SPI */
if (flash->memory_map)
memcpy(data, flash->memory_map + offset,
len);
+ page_size = flash->page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual< len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr>> 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret< 0) {
+ debug("SF: read failed");
+ break;
+ }- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }- return spi_flash_read_common(flash, cmd, sizeof(cmd),
data,
len);
+ return ret;
}Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a
page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above
issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,
if (ret)
break;+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret< 0) {
+ printf("SF: disabling write failed\n");
+ break;
+ }
+Quoted 5 lines
Quoted 4 lines
Have anyone seen the above mentioned issues regarding
read/write/erase? OR is there any
configurations that I might be missing ?Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new
changes.I will intimate you once the push done.
Quoted 7 lines
Quoted 5 lines
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.Quoted 8 lines
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the +ve result.
Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #defineCONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the sameErase: not able to do with a single command, need to issue for every
0x10000
bytes.Quoted 8 lines
Write: Need to disable latch after every write to make it properly work.
Is it possible for you to give me basic commands which you might have
ran
to confirm
the read/write and erase ??I tested the same part - for me i couldn't see the issues with SL256S
Quoted 7 lines
OK! can enable the log on poll function,
spi_flash_cmd_wait_ready()
make debug -> printf.
Do the same test.! and send the log file.--
Thanks,
Jagan.Here is the output log, no change..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the same
DRA752 EVM #Code change: for above output.
drivers/mtd/spi/spi_flash.c +1
-1@@ -85,7 +85,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) ret =spi_xfer (spi,8 ,&cmd,NULL ,SPI_XFER_BEGIN ); if (ret) {This is still not sent out for review. I can send you the patch - debug("SF: fail to read %s status register\n", + printf("SF: fail to read %s status register\n", cmd == CMD_READ_STATUS ? "read" : "flag");return ret; }drivers/mtd/spi/spi_flash.c +1
-1@@ -109,7 +109,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)return 0 ;/* Timed out */ -debug ("SF: time out!\n" ); +printf ("SF: time out!\n" );return -1 ;Quoted 2 lines
}Ohh..
Quoted 1 line
- What if you erase the entire flash and read back, same result is it?
Yes.
Quoted 1 line
- please send the paths for config file for this board?
Quoted 9 lines
Quoted 7 lines
Quoted 4 lines
Quoted 1 line
include/configs/dra7xx_evm.hI couldn't find any SPI flash configs on above config file, Can you point me the relevant configurations.
Following are the configuration details for spi..
#defineCONFIG_SPI_FLASH_BAR
#defineCONFIG_TI_QSPIWhere can i find this?
I have attached the required patches in the thread. Patch 0002 is my ti qspi controller.
Patch 0004 is my workarounds done for the all the issues mentioned in the $subject patch.
Patch 0001 and 0002 are other configs.
Quoted 17 lines
Quoted 7 lines
#define
CONFIG_SPI_FLASH
#defineCONFIG_SPI_FLASH_SPANSION
#defineCONFIG_CMD_SF
#defineCONFIG_CMD_SPI
#defineCONFIG_SF_DEFAULT_SPEED12000000
#defineCONFIG_DEFAULT_SPI_MODESPI_MODE_3Quoted 7 lines
/* SPI SPL */
#defineCONFIG_SPL_SPI_SUPPORT
#defineCONFIG_SPL_SPI_LOAD
#defineCONFIG_SPL_SPI_FLASH_SUPPORT#define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000--
Thanks,
Jagan.
Quoted 355 lines · Sourav Poddar
Hi Jagan,
Quoted 352 lines · Jagan Teki
Quoted 348 lines · Sourav Poddar
Quoted 334 lines · Jagan Teki
Quoted 331 lines · Sourav Poddar
Quoted 328 lines · Jagan Teki
Quoted 320 lines · Sourav Poddar
HI Jagan,
Quoted 266 lines · Jagan Teki
Hi Sourav,
Quoted 248 lines · Sourav Poddar
Hi Jagan,
Quoted 212 lines · Jagan Teki
Quoted 201 lines · Sourav Poddar
Hi Jagan,
Quoted 198 lines · Jagan Teki
Quoted 186 lines · Sourav Poddar
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I
am
trying to
make use of the existing spi_flash.c framework available at
u-boot
for
erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the
above
mentioned flash device is attached.1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x50000
- erases only first 0x20000 bytes of flash device,
anything
above
that is not erase. I need to
issue separate commands after 0x20000 for every 0x10000
bytes.Am i missing anything here?
2. read
sf read 81000000 0 0x10000
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md 81000f00
81000f00: ffffffff ffffffff ffffffff ffffffff
................
81000f10: ffffffff ffffffff ffffffff ffffffff
................
81000f20: ffffffff ffffffff ffffffff ffffffff
................
81000f30: ffffffff ffffffff ffffffff ffffffff
................
81000f40: ffffffff ffffffff ffffffff ffffffff
................
81000f50: ffffffff ffffffff ffffffff ffffffff
................
81000f60: ffffffff ffffffff ffffffff ffffffff
................
81000f70: ffffffff ffffffff ffffffff ffffffff
................
81000f80: ffffffff ffffffff ffffffff ffffffff
................
81000f90: ffffffff ffffffff ffffffff ffffffff
................
81000fa0: ffffffff ffffffff ffffffff ffffffff
................
81000fb0: ffffffff ffffffff ffffffff ffffffff
................
81000fc0: ffffffff ffffffff ffffffff ffffffff
................
81000fd0: ffffffff ffffffff ffffffff ffffffff
................
81000fe0: ffffffff ffffffff ffffffff ffffffff
................
81000ff0: ffffffff ffffffff 00ffffff 00000000
................In this dump, if you see 81000ff0 the last column shows 000000
which
is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read
with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct
spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];/* Handle memory-mapped SPI */
if (flash->memory_map)
memcpy(data, flash->memory_map + offset,
len);
+ page_size = flash->page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual< len; actual += chunk_len)
{
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr>> 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret< 0) {
+ debug("SF: read failed");
+ break;
+ }- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }- return spi_flash_read_common(flash, cmd, sizeof(cmd),
data,
len);
+ return ret;
}Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a
page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write
cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the
above
issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,
if (ret)
break;+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret< 0) {
+ printf("SF: disabling write
failed\n");
+ break;
+ }
+Have anyone seen the above mentioned issues regarding
read/write/erase? OR is there any
configurations that I might be missing ?Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new
changes.I will intimate you once the push done.
Quoted 7 lines
Quoted 5 lines
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.Quoted 8 lines
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the +ve result.
Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #defineCONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the sameErase: not able to do with a single command, need to issue for every
0x10000
bytes.Quoted 8 lines
Write: Need to disable latch after every write to make it properly work.
Is it possible for you to give me basic commands which you might have
ran
to confirm
the read/write and erase ??I tested the same part - for me i couldn't see the issues with SL256S
Quoted 7 lines
OK! can enable the log on poll function,
spi_flash_cmd_wait_ready()
make debug -> printf.
Do the same test.! and send the log file.--
Thanks,
Jagan.Here is the output log, no change..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the same
DRA752 EVM #Code change: for above output.
drivers/mtd/spi/spi_flash.c +0
-0@@ -85,7 +85,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) ret =spi_xfer (spi,8 ,&cmd,NULL ,SPI_XFER_BEGIN ); if (ret) {This is still not sent out for review. I cansend you the patch - debug("SF: fail to read %s status
register\n",drivers/mtd/spi/spi_flash.c +2
-1+printf ("SF: fail to read %s status register\n" , cmd ==CMD_READ_STATUS ?"read" :"flag" );return ret; }@@ -109,7 +109,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)return 0 ;/* Timed out */ -debug ("SF: time out!\n" ); +printf ("SF: time out!\n" );return -1 ;Quoted 2 lines
}Ohh..
- What if you erase the entire flash and read back, same result is it?
Quoted 9 lines
Quoted 5 lines
Yes.
Quoted 1 line
- please send the paths for config file for this board?
include/configs/dra7xx_evm.hI couldn't find any SPI flash configs on above config file, Can you point me the relevant configurations.
Following are the configuration details for spi..
#defineCONFIG_SPI_FLASH_BAR
#defineCONFIG_TI_QSPI
Quoted 23 lines
Quoted 2 lines
Where can i find this?
I have attached the required patches in the thread. Patch 0002 is my ti qspi controller.
Patch 0004 is my workarounds done for the all the issues mentioned in the $subject patch.
Patch 0001 and 0002 are other configs.Quoted 14 lines
Quoted 14 lines
#define
CONFIG_SPI_FLASH
#defineCONFIG_SPI_FLASH_SPANSION
#defineCONFIG_CMD_SF
#defineCONFIG_CMD_SPI
#defineCONFIG_SF_DEFAULT_SPEED12000000
#defineCONFIG_DEFAULT_SPI_MODESPI_MODE_3/* SPI SPL */
#defineCONFIG_SPL_SPI_SUPPORT
#defineCONFIG_SPL_SPI_LOAD
#defineCONFIG_SPL_SPI_FLASH_SUPPORT#define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
Ohh... these drivers not yet in mainline.Ok?
Did you ever tested any of other flash parts (other 256S) with these drivers. Let me give some time to go through these drivers code.
Do you confident that ti_qspi.c doesn't have any issues while processing SPI transactions.?
--
Thanks,
Jagan.
Quoted 350 lines · Jagan Teki
Quoted 349 lines · Sourav Poddar
Hi Jagan,
Quoted 324 lines · Jagan Teki
Quoted 322 lines · Sourav Poddar
Quoted 321 lines · Jagan Teki
Quoted 319 lines · Sourav Poddar
Quoted 314 lines · Jagan Teki
Quoted 308 lines · Sourav Poddar
HI Jagan,
Quoted 256 lines · Jagan Teki
Hi Sourav,
Quoted 240 lines · Sourav Poddar
Hi Jagan,
Quoted 205 lines · Jagan Teki
Quoted 196 lines · Sourav Poddar
Hi Jagan,
Quoted 194 lines · Jagan Teki
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,I am working on qspi flash device S25FL256S at u-boot level. I
am
trying to
make use of the existing spi_flash.c framework available at
u-boot
for
erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the
above
mentioned flash device is attached.1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x50000
- erases only first 0x20000 bytes of flash device,
anything
above
that is not erase. I need to
issue separate commands after 0x20000 for every 0x10000
bytes.Am i missing anything here?
2. read
sf read 81000000 0 0x10000
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md 81000f00
81000f00: ffffffff ffffffff ffffffff ffffffff
................
81000f10: ffffffff ffffffff ffffffff ffffffff
................
81000f20: ffffffff ffffffff ffffffff ffffffff
................
81000f30: ffffffff ffffffff ffffffff ffffffff
................
81000f40: ffffffff ffffffff ffffffff ffffffff
................
81000f50: ffffffff ffffffff ffffffff ffffffff
................
81000f60: ffffffff ffffffff ffffffff ffffffff
................
81000f70: ffffffff ffffffff ffffffff ffffffff
................
81000f80: ffffffff ffffffff ffffffff ffffffff
................
81000f90: ffffffff ffffffff ffffffff ffffffff
................
81000fa0: ffffffff ffffffff ffffffff ffffffff
................
81000fb0: ffffffff ffffffff ffffffff ffffffff
................
81000fc0: ffffffff ffffffff ffffffff ffffffff
................
81000fd0: ffffffff ffffffff ffffffff ffffffff
................
81000fe0: ffffffff ffffffff ffffffff ffffffff
................
81000ff0: ffffffff ffffffff 00ffffff 00000000
................In this dump, if you see 81000ff0 the last column shows 000000
which
is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read
with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct
spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];/* Handle memory-mapped SPI */
if (flash->memory_map)
memcpy(data, flash->memory_map + offset,
len);
+ page_size = flash->page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual< len; actual += chunk_len)
{
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr>> 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret< 0) {
+ debug("SF: read failed");
+ break;
+ }- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }- return spi_flash_read_common(flash, cmd, sizeof(cmd),
data,
len);
+ return ret;
}Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after a
page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write
cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the
above
issue.@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,
if (ret)
break;+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret< 0) {
+ printf("SF: disabling write
failed\n");
+ break;
+ }
+Have anyone seen the above mentioned issues regarding
read/write/erase? OR is there any
configurations that I might be missing ?Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these
new
changes.I will intimate you once the push done.
Quoted 7 lines
Quoted 5 lines
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.Quoted 8 lines
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the +ve result.
Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #defineCONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the sameErase: not able to do with a single command, need to issue for every
0x10000
bytes.Quoted 8 lines
Write: Need to disable latch after every write to make it properly work.
Is it possible for you to give me basic commands which you might have
ran
to confirm
the read/write and erase ??I tested the same part - for me i couldn't see the issues with SL256S
Quoted 7 lines
OK! can enable the log on poll function,
spi_flash_cmd_wait_ready()
make debug -> printf.
Do the same test.! and send the log file.--
Thanks,
Jagan.Here is the output log, no change..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the same
DRA752 EVM #Code change: for above output.
drivers/mtd/spi/spi_flash.c +0
-0@@ -85,7 +85,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) ret =spi_xfer (spi,8 ,&cmd,NULL ,SPI_XFER_BEGIN ); if (ret) {This is still not sent out for review. I cansend you the patch - debug("SF: fail to read %s status
register\n",drivers/mtd/spi/spi_flash.c +2
-1+printf ("SF: fail to read %s status register\n" , cmd ==CMD_READ_STATUS ?"read" :"flag" );return ret; }@@ -109,7 +109,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)return 0 ;/* Timed out */ -debug ("SF: time out!\n" ); +printf ("SF: time out!\n" );return -1 ;Quoted 2 lines
}Ohh..
Quoted 1 line
- What if you erase the entire flash and read back, same result is it?
Yes.
Quoted 1 line
- please send the paths for config file for this board?
Quoted 9 lines
Quoted 7 lines
Quoted 4 lines
Quoted 1 line
include/configs/dra7xx_evm.hI couldn't find any SPI flash configs on above config file, Can you point me the relevant configurations.
Following are the configuration details for spi..
#defineCONFIG_SPI_FLASH_BAR
#defineCONFIG_TI_QSPIWhere can i find this?
I have attached the required patches in the thread. Patch 0002 is my ti qspi controller.
Patch 0004 is my workarounds done for the all the issues mentioned in the $subject patch.
Patch 0001 and 0002 are other configs.Quoted 7 lines
Quoted 7 lines
#define
CONFIG_SPI_FLASH
#defineCONFIG_SPI_FLASH_SPANSION
#defineCONFIG_CMD_SF
#defineCONFIG_CMD_SPI
#defineCONFIG_SF_DEFAULT_SPEED12000000
#defineCONFIG_DEFAULT_SPI_MODESPI_MODE_3
Quoted 9 lines
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
/* SPI SPL */
#defineCONFIG_SPL_SPI_SUPPORT
#defineCONFIG_SPL_SPI_LOAD
#defineCONFIG_SPL_SPI_FLASH_SUPPORT#define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000Ohh... these drivers not yet in mainline.Ok?
They are not in mainline, yet. Due to above mentioned issue, I have not
posted it yet.
Quoted 3 lines
Did you ever tested any of other flash parts (other 256S) with these drivers. Let me give some time to go through these drivers code.
No, I don,t have any other board which has any other flash device.
Quoted 3 lines
Do you confident that
ti_qspi.cdoesn't have any issues while processing SPI transactions.?
I tried putting a lot of prints, which does not show any obvious error.
Moreover, with the workaround mentioned before, things work fine.
Quoted 3 lines
--
Thanks,
Jagan.
Quoted 405 lines · Sourav Poddar
Quoted 402 lines · Jagan Teki
Quoted 376 lines · Sourav Poddar
Hi Jagan,
Quoted 372 lines · Jagan Teki
Quoted 368 lines · Sourav Poddar
Quoted 354 lines · Jagan Teki
Quoted 351 lines · Sourav Poddar
Quoted 348 lines · Jagan Teki
Quoted 338 lines · Sourav Poddar
HI Jagan,
Quoted 281 lines · Jagan Teki
Hi Sourav,
Quoted 265 lines · Sourav Poddar
Hi Jagan,
Quoted 225 lines · Jagan Teki
Quoted 221 lines · Sourav Poddar
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level.
I
am
trying to
make use of the existing spi_flash.c framework available at
u-boot
for
erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced
while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which
the
above
mentioned flash device is attached.1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x50000
- erases only first 0x20000 bytes of flash device,
anything
above
that is not erase. I need to
issue separate commands after 0x20000 for every
0x10000
bytes.Am i missing anything here?
2. read
sf read 81000000 0 0x10000
Read is not happening properly. The last few byte along the
4k
boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md 81000f00
81000f00: ffffffff ffffffff ffffffff ffffffff
................
81000f10: ffffffff ffffffff ffffffff ffffffff
................
81000f20: ffffffff ffffffff ffffffff ffffffff
................
81000f30: ffffffff ffffffff ffffffff ffffffff
................
81000f40: ffffffff ffffffff ffffffff ffffffff
................
81000f50: ffffffff ffffffff ffffffff ffffffff
................
81000f60: ffffffff ffffffff ffffffff ffffffff
................
81000f70: ffffffff ffffffff ffffffff ffffffff
................
81000f80: ffffffff ffffffff ffffffff ffffffff
................
81000f90: ffffffff ffffffff ffffffff ffffffff
................
81000fa0: ffffffff ffffffff ffffffff ffffffff
................
81000fb0: ffffffff ffffffff ffffffff ffffffff
................
81000fc0: ffffffff ffffffff ffffffff ffffffff
................
81000fd0: ffffffff ffffffff ffffffff ffffffff
................
81000fe0: ffffffff ffffffff ffffffff ffffffff
................
81000ff0: ffffffff ffffffff 00ffffff 00000000
................In this dump, if you see 81000ff0 the last column shows
000000
which
is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read
with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct
spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash,
u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];/* Handle memory-mapped SPI */
if (flash->memory_map)
memcpy(data, flash->memory_map +
offset,
len);
+ page_size = flash->page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual< len; actual +=
chunk_len)
{
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr>> 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret< 0) {
+ debug("SF: read failed");
+ break;
+ }- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }- return spi_flash_read_common(flash, cmd,
sizeof(cmd),
data,
len);
+ return ret;
}Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after
a
page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write
cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the
above
issue.@@ -117,6 +117,12 @@ int
spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,
if (ret)
break;+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret< 0) {
+ printf("SF: disabling write
failed\n");
+ break;
+ }
+Have anyone seen the above mentioned issues regarding
read/write/erase? OR is there any
configurations that I might be missing ?Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with
these
new
changes.I will intimate you once the push done.
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.Quoted 8 lines
Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the +ve result.
Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #defineCONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the sameErase: not able to do with a single command, need to issue for every
0x10000
bytes.Write: Need to disable latch after every write to make it properly
work.Quoted 6 lines
Is it possible for you to give me basic commands which you might
have
ran
to confirm
the read/write and erase ??I tested the same part - for me i couldn't see the issues with SL256S
Quoted 8 lines
OK! can enable the log on poll function,
spi_flash_cmd_wait_ready()
make debug -> printf.
Do the same test.! and send the log file.--
Thanks,
Jagan.Here is the output log, no change..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the same
DRA752 EVM #Code change: for above output.
drivers/mtd/spi/spi_flash.c +0
-0@@ -85,7 +85,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) ret =spi_xfer (spi,8 ,&cmd,NULL ,SPI_XFER_BEGIN ); if (ret) {This is still not sent out for review. I cansend you the patch - debug("SF: fail to read %s
status
register\n",+ printf("SF: fail to read %s status register\n",
cmd == CMD_READ_STATUS ? "read" : "flag"); return ret; }drivers/mtd/spi/spi_flash.c +1
-1@@ -109,7 +109,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)return 0 ;/* Timed out */ -debug ("SF: time out!\n" ); +printf ("SF: time out!\n" );return -1 ;Quoted 2 lines
}Ohh..
- What if you erase the entire flash and read back, same result is it?
Quoted 9 lines
Quoted 5 lines
Yes.
Quoted 1 line
- please send the paths for config file for this board?
include/configs/dra7xx_evm.hI couldn't find any SPI flash configs on above config file, Can you point me the relevant configurations.
Following are the configuration details for spi..
#defineCONFIG_SPI_FLASH_BAR
#defineCONFIG_TI_QSPIQuoted 22 lines
Quoted 2 lines
Where can i find this?
I have attached the required patches in the thread. Patch 0002 is my ti qspi controller.
Patch 0004 is my workarounds done for the all the issues mentioned in the $subject patch.
Patch 0001 and 0002 are other configs.Quoted 14 lines
Quoted 14 lines
#define
CONFIG_SPI_FLASH
#defineCONFIG_SPI_FLASH_SPANSION
#defineCONFIG_CMD_SF
#defineCONFIG_CMD_SPI
#defineCONFIG_SF_DEFAULT_SPEED12000000
#defineCONFIG_DEFAULT_SPI_MODESPI_MODE_3/* SPI SPL */
#defineCONFIG_SPL_SPI_SUPPORT
#defineCONFIG_SPL_SPI_LOAD
#defineCONFIG_SPL_SPI_FLASH_SUPPORT#define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000Quoted 2 lines
Ohh... these drivers not yet in mainline.Ok?
Quoted 8 lines
They are not in mainline, yet. Due to above mentioned issue, I have not
posted it yet.Quoted 4 lines
Did you ever tested any of other flash parts (other 256S) with these drivers.
Let me give some time to go through these drivers code.No, I don,t have any other board which has any other flash device.
Did you confirm, there is no hw/board issues with this flash. because I have tested the same part on xilinx zynq soc, zed board, i couldn't see any issues.
Quoted 5 lines
Quoted 4 lines
Do you confident that
ti_qspi.cdoesn't have any issues while processing SPI transactions.?I tried putting a lot of prints, which does not show any obvious error.
I am not sure, the logic behind ti_omap.c
but might be some SPI transaction handling on controller for ever 0x1000 bytes. Need to see.
Quoted 2 lines
Moreover, with the workaround mentioned before, things work fine.
No, that work around is against the flash read concept, generally flash read not in-terms of page sizes but your workaround does.
Need to digging more on 0x1000bytes - I am come back with any clue means while I am also start looking your controller driver. Can you send your trm link, does it available on web.
--
Thanks,
Jagan.
Quoted 385 lines · Jagan Teki
Quoted 384 lines · Sourav Poddar
Quoted 371 lines · Jagan Teki
Quoted 369 lines · Sourav Poddar
Hi Jagan,
Quoted 344 lines · Jagan Teki
Quoted 342 lines · Sourav Poddar
Quoted 341 lines · Jagan Teki
Quoted 339 lines · Sourav Poddar
Quoted 333 lines · Jagan Teki
Quoted 326 lines · Sourav Poddar
HI Jagan,
Quoted 271 lines · Jagan Teki
Hi Sourav,
Quoted 257 lines · Sourav Poddar
Hi Jagan,
Quoted 226 lines · Jagan Teki
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,I am working on qspi flash device S25FL256S at u-boot level.
I
am
trying to
make use of the existing spi_flash.c framework available at
u-boot
for
erasing/reading/writing
into the flash device.There are several issues(mentioned below), which I faced
while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which
the
above
mentioned flash device is attached.1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x50000
- erases only first 0x20000 bytes of flash device,
anything
above
that is not erase. I need to
issue separate commands after 0x20000 for every
0x10000
bytes.Am i missing anything here?
2. read
sf read 81000000 0 0x10000
Read is not happening properly. The last few byte along the
4k
boundary always shows zero.
Above 4k bytes, read is not happening.For ex:
DRA752 EVM # md 81000f00
81000f00: ffffffff ffffffff ffffffff ffffffff
................
81000f10: ffffffff ffffffff ffffffff ffffffff
................
81000f20: ffffffff ffffffff ffffffff ffffffff
................
81000f30: ffffffff ffffffff ffffffff ffffffff
................
81000f40: ffffffff ffffffff ffffffff ffffffff
................
81000f50: ffffffff ffffffff ffffffff ffffffff
................
81000f60: ffffffff ffffffff ffffffff ffffffff
................
81000f70: ffffffff ffffffff ffffffff ffffffff
................
81000f80: ffffffff ffffffff ffffffff ffffffff
................
81000f90: ffffffff ffffffff ffffffff ffffffff
................
81000fa0: ffffffff ffffffff ffffffff ffffffff
................
81000fb0: ffffffff ffffffff ffffffff ffffffff
................
81000fc0: ffffffff ffffffff ffffffff ffffffff
................
81000fd0: ffffffff ffffffff ffffffff ffffffff
................
81000fe0: ffffffff ffffffff ffffffff ffffffff
................
81000ff0: ffffffff ffffffff 00ffffff 00000000
................In this dump, if you see 81000ff0 the last column shows
000000
which
is
not expected. and it happens along every 4k bytes.So, to get rid of the above issue, I switched to page read
with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct
spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash,
u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];/* Handle memory-mapped SPI */
if (flash->memory_map)
memcpy(data, flash->memory_map +
offset,
len);
+ page_size = flash->page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual< len; actual +=
chunk_len)
{
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr>> 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret< 0) {
+ debug("SF: read failed");
+ break;
+ }- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }- return spi_flash_read_common(flash, cmd,
sizeof(cmd),
data,
len);
+ return ret;
}Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.observations: only able to write single page, anything after
a
page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write
cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the
above
issue.@@ -117,6 +117,12 @@ int
spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,
if (ret)
break;+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret< 0) {
+ printf("SF: disabling write
failed\n");
+ break;
+ }
+Have anyone seen the above mentioned issues regarding
read/write/erase? OR is there any
configurations that I might be missing ?Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with
these
new
changes.I will intimate you once the push done.
--
Thanks,
Jagan.Thanks a lot for the reply.
Sure, will wait for your changes to go in.Will take some time go these changes on master.
Please checkout master-work branch in u-boot-spi repo
git://git.denx.de/u-boot-spi.gitand try to test 256S parts, fyi: I tested the same part got the
+ve result.Tested the above tree on my board.
But, still the issues remain the same for me in all the three cases(erase/read/write).Here is the short log of the read command..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB
SF: Warning - Only lower 16MiB accessible, Full access #defineCONFIG_SPI_FLASH_BAR
DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the sameErase: not able to do with a single command, need to issue for every
0x10000
bytes.Write: Need to disable latch after every write to make it properly
work.Quoted 6 lines
Is it possible for you to give me basic commands which you might
have
ran
to confirm
the read/write and erase ??I tested the same part - for me i couldn't see the issues with SL256S
Quoted 8 lines
OK! can enable the log on poll function,
spi_flash_cmd_wait_ready()
make debug -> printf.
Do the same test.! and send the log file.--
Thanks,
Jagan.Here is the output log, no change..
DRA752 EVM # sf probe 0
SF: DetectedS25FL256S_64Kwith page size 64 KiB, total 32 MiB DRA752 EVM # sf erase0x00x10000
SF: 65536 bytes @0x0Erased: OK
DRA752 EVM # mw.b0x810001000xff0x10000
DRA752 EVM # sf read0x810030000x00x10000
SF: 65536 bytes @0x0Read: OK
DRA752 EVM # cmp.b0x810030000x810001000x10000byte at0x81003ffb(0x0) != byte at0x810010fb(0xff) Total of 4091 byte(s) were the same
DRA752 EVM #Code change: for above output.
drivers/mtd/spi/spi_flash.c +0
-0@@ -85,7 +85,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) ret =spi_xfer (spi,8 ,&cmd,NULL ,SPI_XFER_BEGIN ); if (ret) {This is still not sent out for review. I cansend you the patch - debug("SF: fail to read %s
status
register\n",+ printf("SF: fail to read %s status register\n",
cmd == CMD_READ_STATUS ? "read" : "flag"); return ret; }drivers/mtd/spi/spi_flash.c +1
-1@@ -109,7 +109,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)return 0 ;/* Timed out */ -debug ("SF: time out!\n" ); +printf ("SF: time out!\n" );return -1 ;Quoted 2 lines
}Ohh..
Quoted 2 lines
- What if you erase the entire flash and read back, same result is it?
Yes.
Quoted 1 line
- please send the paths for config file for this board?
Quoted 9 lines
Quoted 7 lines
Quoted 4 lines
Quoted 1 line
include/configs/dra7xx_evm.hI couldn't find any SPI flash configs on above config file, Can you point me the relevant configurations.
Following are the configuration details for spi..
#defineCONFIG_SPI_FLASH_BAR
#defineCONFIG_TI_QSPIWhere can i find this?
I have attached the required patches in the thread. Patch 0002 is my ti qspi controller.
Patch 0004 is my workarounds done for the all the issues mentioned in the $subject patch.
Patch 0001 and 0002 are other configs.Quoted 7 lines
Quoted 7 lines
#define
CONFIG_SPI_FLASH
#defineCONFIG_SPI_FLASH_SPANSION
#defineCONFIG_CMD_SF
#defineCONFIG_CMD_SPI
#defineCONFIG_SF_DEFAULT_SPEED12000000
#defineCONFIG_DEFAULT_SPI_MODESPI_MODE_3Quoted 9 lines
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
/* SPI SPL */
#defineCONFIG_SPL_SPI_SUPPORT
#defineCONFIG_SPL_SPI_LOAD
#defineCONFIG_SPL_SPI_FLASH_SUPPORT#define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000Ohh... these drivers not yet in mainline.Ok?
They are not in mainline, yet. Due to above mentioned issue, I have not
posted it yet.
Quoted 9 lines
Quoted 5 lines
Quoted 4 lines
Did you ever tested any of other flash parts (other 256S) with these drivers.
Let me give some time to go through these drivers code.No, I don,t have any other board which has any other flash device.
Did you confirm, there is no hw/board issues with this flash. because I have tested the same part on xilinx zynq soc, zed board, i couldn't see any issues.
Yes, since the same board is used by BIOS/QNX people to validate the flash using their driver.
Quoted 12 lines
Quoted 4 lines
Quoted 3 lines
Do you confident that
ti_qspi.cdoesn't have any issues while processing SPI transactions.?I tried putting a lot of prints, which does not show any obvious error.
I am not sure, the logic behind
ti_omap.c
but might be some SPI transaction handling on controller for ever0x1000bytes. Need to see.Quoted 1 line
Moreover, with the workaround mentioned before, things work fine.
No, that work around is against the flash read concept, generally flash read not in-terms of page sizes but your workaround does.
Yes, I know, thats the whoile reason I have not posted my patches still.
Quoted 4 lines
Need to digging more on 0x1000bytes - I am come back with any clue means while I am also start looking your controller driver. Can you send your trm link, does it available on web.
Its public version is not available yet, so I cant.
Is it possible for you to send me the output of following commands on your board?
sf erase 0 80000
sf read 81000000 0 80000
md 81000000
md 81030000
mw 84000000 aaaaaaaa 10000
sf write 84000000 0 10000
sf read 81000000 0 10000
md 81000000
md 81002000
~Sourav
Quoted 3 lines
--
Thanks,
Jagan.