Skip to contentSkip to conversation

intel_pstate: Add Haswell CPU models

PATCH Superseded Nell Hardcastle 4 participants 4 messages Jun 28, 2013 – Aug 17, 2013

Subsystems (2)
CPU frequency scaling framework Intel pstate driver

v1 of 2 Superseded Latest is v2 →

lore
Share & tools
lore

Nell Hardcastle

author
#0 lore raw

PATCH 1/1 intel_pstate: Add Haswell CPU models

Enable the intel_pstate driver for Haswell CPUs and one Ivy Bridge model not already included (0x3E). I've been testing this change on the Core i5-4200u (model 0x45) and I referenced the list of models in tools/power/x86/turbostat/turbostat.c:has_nehalem_turbo_ratio_limit to determine the others.

Fixes https://bugzilla.kernel.org/show_bug.cgi?id=60211

Signed-off-by Nell Hardcastle <[email protected]>
---
 drivers/cpufreq/intel_pstate.c | 5 +++++
 1 file changed, 5 insertions(+)
drivers/cpufreq/intel_pstate.c +5 -0
index 07f2840..dbd1032 100644
@@ -522,6 +522,11 @@ static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
 	ICPU(0x2a, default_policy),
 	ICPU(0x2d, default_policy),
 	ICPU(0x3a, default_policy),
+	ICPU(0x3c, default_policy),
+	ICPU(0x3e, default_policy),
+	ICPU(0x3f, default_policy),
+	ICPU(0x45, default_policy),
+	ICPU(0x46, default_policy),
 	{}
 };
 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
Signature · 1 line
1.8.3.1
maintainer Acked-by on v1 1/1
#1 lore raw

You need to cc linux-pm list too, so that Rafael can pick this one.

Quoted 1 line · Nell Hardcastle

Enable the intel_pstate driver for Haswell CPUs and one Ivy Bridge model not already included (0x3E). I've been testing this change on the Core i5-4200u (model 0x45) and I referenced the list of models in tools/power/x86/turbostat/turbostat.c:has_nehalem_turbo_ratio_limit to determine the others.

Please respect the 80 column rule for writing patches.

Quoted 12 lines

Fixes https://bugzilla.kernel.org/show_bug.cgi?id=60211

Signed-off-by Nell Hardcastle <[email protected]>
---
 drivers/cpufreq/intel_pstate.c | 5 +++++
 1 file changed, 5 insertions(+)
drivers/cpufreq/intel_pstate.c +0 -0
index 07f2840..dbd1032 100644

drivers/cpufreq/intel_pstate.c static const struct x86_cpu_id intel_pstate_cpu_ids[] = { · line 529

Quoted 8 lines
drivers/cpufreq/intel_pstate.c +5 -0
@@ -522,6 +522,11 @@ static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
        ICPU(0x2a, default_policy),
        ICPU(0x2d, default_policy),
        ICPU(0x3a, default_policy),
+       ICPU(0x3c, default_policy),
+       ICPU(0x3e, default_policy),
+       ICPU(0x3f, default_policy),
+       ICPU(0x45, default_policy),
+       ICPU(0x46, default_policy),

Looks fine otherwise. Please add my

Acked-by Viresh Kumar <[email protected]> and resend V2 with

fixed commit log.

#2 lore raw
In reply to Nell Hardcastle
Quoted 14 lines · Nell Hardcastle

Enable the intel_pstate driver for Haswell CPUs and one Ivy Bridge model not already included (0x3E). I've been testing this change on the Core i5-4200u (model 0x45) and I referenced the list of models in tools/power/x86/turbostat/turbostat.c:has_nehalem_turbo_ratio_limit to determine the others.

Fixes https://bugzilla.kernel.org/show_bug.cgi?id=60211

Signed-off-by Nell Hardcastle <[email protected]>
---
  drivers/cpufreq/intel_pstate.c | 5 +++++
  1 file changed, 5 insertions(+)
drivers/cpufreq/intel_pstate.c +0 -0
index 07f2840..dbd1032 100644

drivers/cpufreq/intel_pstate.c static const struct x86_cpu_id intel_pstate_cpu_ids[] = { · line 529

Quoted 8 lines
drivers/cpufreq/intel_pstate.c +5 -0
@@ -522,6 +522,11 @@ static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
  	ICPU(0x2a, default_policy),
  	ICPU(0x2d, default_policy),
  	ICPU(0x3a, default_policy),
+	ICPU(0x3c, default_policy),
+	ICPU(0x3e, default_policy),
+	ICPU(0x3f, default_policy),
+	ICPU(0x45, default_policy),
+	ICPU(0x46, default_policy),

Nak for now.

We have not completed our testing on these CPUs. I would like to get my testing done before I start seeing issues from the field come in.

If this patch were to hangout in testing for a while it would not hurt my feelings there it could only hurt those that knew what they were getting into :-)

--Dirk

Quoted 4 lines
drivers/cpufreq/intel_pstate.c +0 -0
  	{}
  };
  MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
Tested-by
#3 lore raw
Quoted 32 lines · Dirk Brandewie
Quoted 19 lines · Nell Hardcastle

Enable the intel_pstate driver for Haswell CPUs and one Ivy Bridge model not already included (0x3E). I've been testing this change on the Core i5-4200u (model 0x45) and I referenced the list of models in tools/power/x86/turbostat/turbostat.c:has_nehalem_turbo_ratio_limit to determine the others.

Fixes https://bugzilla.kernel.org/show_bug.cgi?id=60211

Signed-off-by Nell Hardcastle <[email protected]>
---
  drivers/cpufreq/intel_pstate.c | 5 +++++
  1 file changed, 5 insertions(+)
drivers/cpufreq/intel_pstate.c +0 -0
index 07f2840..dbd1032 100644

drivers/cpufreq/intel_pstate.c static const struct x86_cpu_id · line 530

Quoted 9 lines
drivers/cpufreq/intel_pstate.c +5 -0
@@ -522,6 +522,11 @@ static const struct x86_cpu_id
 intel_pstate_cpu_ids[] = {
      ICPU(0x2a, default_policy),
      ICPU(0x2d, default_policy),
      ICPU(0x3a, default_policy),
+    ICPU(0x3c, default_policy),
+    ICPU(0x3e, default_policy),
+    ICPU(0x3f, default_policy),
+    ICPU(0x45, default_policy),
+    ICPU(0x46, default_policy),

Nak for now.

Quoted 8 lines

We have not completed our testing on these CPUs. I would like to get my testing done before I start seeing issues from the field come in.

If this patch were to hangout in testing for a while it would not hurt my feelings there it could only hurt those that knew what they were getting into :-)

Hi,

I want to let you know that I've tested intel_pstate with Xeon E3-1265Lv3 (model 0x3c) successfully. For this CPU model the patch seems to be fine.

Turbo mode works as intended. Core frequencies scale according to number of active cores.

Tested-by Ilari Stenroth <[email protected]>

Regards,
Ilari Stenroth