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Origen: Correct equation to calculate PLL output frequency

PATCH New Rajeshwari Shinde 3 participants 4 messages Jul 1, 2013 – Jul 2, 2013

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Arm (32-bit) Arm Samsung Exynos
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Rajeshwari Shinde

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#0 lore raw

PATCH 1/1 Origen: Correct equation to calculate PLL output frequency

EXYNOS4 user manual equation for calculating PLL output is FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1))
hence updating accordingly.

Signed-off-by Rajeshwari Shinde <[email protected]>
---
 arch/arm/cpu/armv7/exynos/clock.c |   11 +++++++++--
 1 files changed, 9 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/exynos/clock.c +9 -2
index e1c4246..af0fa5b 100644
@@ -116,8 +116,15 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
 		/* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */
 		fout = (m + k / 1024) * (freq / (p * (1 << s)));
 	} else {
-		/* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
-		fout = m * (freq / (p * (1 << s)));
+		if (cpu_is_exynos4()) {
+			if (s < 1)
+				s = 1;
+			/* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
+			fout = m * (freq / (p * (1 << (s - 1))));
+		} else {
+			/* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
+			fout = m * (freq / (p * (1 << s)));
+		}
 	}
 
 	return fout;
Signature · 1 line
1.7.4.4
#1 lore raw

PATCH 1/1 Origen: Correct equation to calculate PLL output frequency

Quoted 22 lines · Rajeshwari Shinde

EXYNOS4 user manual equation for calculating PLL output is FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1))
hence updating accordingly.

Signed-off-by Rajeshwari Shinde <[email protected]>
---
 arch/arm/cpu/armv7/exynos/clock.c |   11 +++++++++--
 1 files changed, 9 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/exynos/clock.c +2 -2
index e1c4246..af0fa5b 100644
@@ -116,8 +116,15 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
 		/* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */
 		fout = (m + k / 1024) * (freq / (p * (1 << s)));
 	} else {
-		/* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
-		fout = m * (freq / (p * (1 << s)));
+		if (cpu_is_exynos4()) {
+			if (s < 1)

arch/arm/cpu/armv7/exynos/clock.c static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) · line 130

Quoted 10 lines
arch/arm/cpu/armv7/exynos/clock.c +7 -0
+				s = 1;
+			/* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
+			fout = m * (freq / (p * (1 << (s - 1))));
+		} else {
+			/* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
+			fout = m * (freq / (p * (1 << s)));
+		}
 	}
 
 	return fout;

I checked about it.
It was wrong, but your patch doesn't fit too.

exynos4210
FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))

exynos4412
FOUT = MDIV * FIN / (PDIV * 2^SDIV)

exynos5250
FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))

At past, our code was,
FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))
It was changed by Akshay's patch.

commit 234370cab4b2f096e095fe8f3284fd39740a4023

Author: Akshay Saraswat <[email protected]>
Date:   Fri Mar 22 02:26:36 2013 +0000

Exynos5: clock: Update the equation to calculate PLL output frequency

According to the latest exynos5 user manual, the equation for calculating PLL output was changed to
FOUT= MDIV x FIN/(PDIV x 2^SDIV)
earlier it was
FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1))
So updating the clock code accordingly.

Signed-off-by Hatim Ali <[email protected]>
Signed-off-by Akshay Saraswat <[email protected]>
Acked-by Simon Glass <[email protected]>

According to Akshay's patch.
exynos5250 should be
FOUT = MDIV * FIN / (PDIV * 2^SDIV)
but my manual (I'm not sure that is latest version) shows FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))

Akshay,
please check this.

Rajeshwari,
Thank you for raise this issue,
I'll check it and resend the patch.

Thanks,
Minkyu Kang.

#2 lore raw

PATCH 1/1 Origen: Correct equation to calculate PLL output frequency

Hi Minkyu Kang,

As per the user manual I have for EXYNOS5 it is
FOUT = MDIV * FIN / (PDIV * 2^SDIV)

Regards,
Rajeshwari Shinde.

Quoted 88 lines · Minkyu Kang
Quoted 22 lines · Rajeshwari Shinde

EXYNOS4 user manual equation for calculating PLL output is FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1))
hence updating accordingly.

Signed-off-by Rajeshwari Shinde <[email protected]>
---
 arch/arm/cpu/armv7/exynos/clock.c |   11 +++++++++--
 1 files changed, 9 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/exynos/clock.c +2 -2
index e1c4246..af0fa5b 100644
@@ -116,8 +116,15 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
              /* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */
              fout = (m + k / 1024) * (freq / (p * (1 << s)));
      } else {
-             /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
-             fout = m * (freq / (p * (1 << s)));
+             if (cpu_is_exynos4()) {
+                     if (s < 1)

arch/arm/cpu/armv7/exynos/clock.c static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) · line 130

Quoted 10 lines
arch/arm/cpu/armv7/exynos/clock.c +7 -0
+                             s = 1;
+                     /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
+                     fout = m * (freq / (p * (1 << (s - 1))));
+             } else {
+                     /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
+                     fout = m * (freq / (p * (1 << s)));
+             }
      }
 
      return fout;

I checked about it.
It was wrong, but your patch doesn't fit too.

exynos4210
FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))

exynos4412
FOUT = MDIV * FIN / (PDIV * 2^SDIV)

exynos5250
FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))

At past, our code was,
FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))
It was changed by Akshay's patch.

commit 234370cab4b2f096e095fe8f3284fd39740a4023

Author: Akshay Saraswat <[email protected]>
Date:   Fri Mar 22 02:26:36 2013 +0000

Exynos5: clock: Update the equation to calculate PLL output frequency

According to the latest exynos5 user manual, the equation for calculating PLL output was changed to
FOUT= MDIV x FIN/(PDIV x 2^SDIV)
earlier it was
FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1))
So updating the clock code accordingly.

Signed-off-by Hatim Ali <[email protected]>
Signed-off-by Akshay Saraswat <[email protected]>
Acked-by Simon Glass <[email protected]>

According to Akshay's patch.
exynos5250 should be
FOUT = MDIV * FIN / (PDIV * 2^SDIV)
but my manual (I'm not sure that is latest version) shows FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))

Akshay,
please check this.

Rajeshwari,
Thank you for raise this issue,
I'll check it and resend the patch.

Thanks,
Minkyu Kang.
_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Signature · 2 lines
Regards,
Rajeshwari Shinde
#3 lore raw

PATCH 1/1 Origen: Correct equation to calculate PLL output frequency

Quoted 4 lines · Rajeshwari Birje

Hi Minkyu Kang,

As per the user manual I have for EXYNOS5 it is
FOUT = MDIV * FIN / (PDIV * 2^SDIV)

What is your version of manual?
If possible, could you please send it to me?

Quoted 96 lines

Regards,
Rajeshwari Shinde.

Quoted 88 lines · Minkyu Kang
Quoted 22 lines · Rajeshwari Shinde

EXYNOS4 user manual equation for calculating PLL output is FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1))
hence updating accordingly.

Signed-off-by Rajeshwari Shinde <[email protected]>
---
 arch/arm/cpu/armv7/exynos/clock.c |   11 +++++++++--
 1 files changed, 9 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/exynos/clock.c +2 -2
index e1c4246..af0fa5b 100644
@@ -116,8 +116,15 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
              /* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */
              fout = (m + k / 1024) * (freq / (p * (1 << s)));
      } else {
-             /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
-             fout = m * (freq / (p * (1 << s)));
+             if (cpu_is_exynos4()) {
+                     if (s < 1)

arch/arm/cpu/armv7/exynos/clock.c static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) · line 130

Quoted 10 lines
arch/arm/cpu/armv7/exynos/clock.c +7 -0
+                             s = 1;
+                     /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
+                     fout = m * (freq / (p * (1 << (s - 1))));
+             } else {
+                     /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
+                     fout = m * (freq / (p * (1 << s)));
+             }
      }
 
      return fout;

I checked about it.
It was wrong, but your patch doesn't fit too.

exynos4210
FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))

exynos4412
FOUT = MDIV * FIN / (PDIV * 2^SDIV)

exynos5250
FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))

At past, our code was,
FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))
It was changed by Akshay's patch.

commit 234370cab4b2f096e095fe8f3284fd39740a4023

Author: Akshay Saraswat <[email protected]>
Date:   Fri Mar 22 02:26:36 2013 +0000

Exynos5: clock: Update the equation to calculate PLL output frequency

According to the latest exynos5 user manual, the equation for calculating PLL output was changed to
FOUT= MDIV x FIN/(PDIV x 2^SDIV)
earlier it was
FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1))
So updating the clock code accordingly.

Signed-off-by Hatim Ali <[email protected]>
Signed-off-by Akshay Saraswat <[email protected]>
Acked-by Simon Glass <[email protected]>

According to Akshay's patch.
exynos5250 should be
FOUT = MDIV * FIN / (PDIV * 2^SDIV)
but my manual (I'm not sure that is latest version) shows FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))

Akshay,
please check this.

Rajeshwari,
Thank you for raise this issue,
I'll check it and resend the patch.

Thanks,
Minkyu Kang.
_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Thanks,
Minkyu Kang.