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mx6: Fix calculation of emi_slow clock rate

PATCH New Andrew Gabbasov 3 participants 3 messages Jul 4, 2013 – Sep 10, 2013 Arm (32-bit)

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Andrew Gabbasov

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#0 lore raw

PATCH 1/1 mx6: Fix calculation of emi_slow clock rate

This is porting of Freescale's patch from version imx_v2009.08_3.0.35_4.0.0, that fixes the obvious mistype of bits offset macro name (ACLK_EMI_PODF_OFFSET was used instead of ACLK_EMI_SLOW_PODF_OFFSET).

Using the occasion, change the variable name 'emi_slow_pof' to more consistent 'emi_slow_podf'.

Signed-off-by Jason Liu <[email protected]>
Signed-off-by Andrew Gabbasov <[email protected]>
---
 arch/arm/cpu/armv7/mx6/clock.c |    8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +4 -4
index 3c0d908..064f8c8 100644
@@ -244,13 +244,13 @@ static u32 get_axi_clk(void)
 
 static u32 get_emi_slow_clk(void)
 {
-	u32 emi_clk_sel, emi_slow_pof, cscmr1, root_freq = 0;
+	u32 emi_clk_sel, emi_slow_podf, cscmr1, root_freq = 0;
 
 	cscmr1 =  __raw_readl(&imx_ccm->cscmr1);
 	emi_clk_sel = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_MASK;
 	emi_clk_sel >>= MXC_CCM_CSCMR1_ACLK_EMI_SLOW_OFFSET;
-	emi_slow_pof = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK;
-	emi_slow_pof >>= MXC_CCM_CSCMR1_ACLK_EMI_PODF_OFFSET;
+	emi_slow_podf = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK;
+	emi_slow_podf >>= MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_OFFSET;
 
 	switch (emi_clk_sel) {
 	case 0:

@@ -267,7 +267,7 @@ static u32 get_emi_slow_clk(void)
 		break;
 	}
 
-	return root_freq / (emi_slow_pof + 1);
+	return root_freq / (emi_slow_podf + 1);
 }
 
 #ifdef CONFIG_MX6SL
Signature · 1 line
1.7.10.4
#1 lore raw

PATCH 1/1 mx6: Fix calculation of emi_slow clock rate

Quoted 9 lines · Andrew Gabbasov

This is porting of Freescale's patch from version imx_v2009.08_3.0.35_4.0.0, that fixes the obvious mistype of bits offset macro name (ACLK_EMI_PODF_OFFSET was used instead of ACLK_EMI_SLOW_PODF_OFFSET).

Using the occasion, change the variable name 'emi_slow_pof' to more consistent 'emi_slow_podf'.

Signed-off-by Jason Liu <[email protected]>
Signed-off-by Andrew Gabbasov <[email protected]>
Acked-by Dirk Behme <[email protected]>

Thanks

Dirk

Quoted 35 lines
---
  arch/arm/cpu/armv7/mx6/clock.c |    8 ++++----
  1 file changed, 4 insertions(+), 4 deletions(-)
arch/arm/cpu/armv7/mx6/clock.c +4 -4
index 3c0d908..064f8c8 100644
@@ -244,13 +244,13 @@ static u32 get_axi_clk(void)
 
  static u32 get_emi_slow_clk(void)
  {
-	u32 emi_clk_sel, emi_slow_pof, cscmr1, root_freq = 0;
+	u32 emi_clk_sel, emi_slow_podf, cscmr1, root_freq = 0;
 
  	cscmr1 =  __raw_readl(&imx_ccm->cscmr1);
  	emi_clk_sel = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_MASK;
  	emi_clk_sel >>= MXC_CCM_CSCMR1_ACLK_EMI_SLOW_OFFSET;
-	emi_slow_pof = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK;
-	emi_slow_pof >>= MXC_CCM_CSCMR1_ACLK_EMI_PODF_OFFSET;
+	emi_slow_podf = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK;
+	emi_slow_podf >>= MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_OFFSET;
 
  	switch (emi_clk_sel) {
  	case 0:

@@ -267,7 +267,7 @@ static u32 get_emi_slow_clk(void)
  		break;
  	}
 
-	return root_freq / (emi_slow_pof + 1);
+	return root_freq / (emi_slow_podf + 1);
  }
 
  #ifdef CONFIG_MX6SL
#2 lore raw

PATCH 1/1 mx6: Fix calculation of emi_slow clock rate

In reply to Andrew Gabbasov
Quoted 10 lines · Andrew Gabbasov

This is porting of Freescale's patch from version imx_v2009.08_3.0.35_4.0.0, that fixes the obvious mistype of bits offset macro name (ACLK_EMI_PODF_OFFSET was used instead of ACLK_EMI_SLOW_PODF_OFFSET).

Using the occasion, change the variable name 'emi_slow_pof' to more consistent 'emi_slow_podf'.

Signed-off-by Jason Liu <[email protected]>
Signed-off-by Andrew Gabbasov <[email protected]>

---

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

Signature · 5 lines
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