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OMAP5: USB_EHCI: Enable ehci support for omap5

PATCH New Dan Murphy 4 participants 12 messages Jul 8, 2013 – Jul 10, 2013

Subsystems (4)
Arm (32-bit) USB USB ehci driver OMAP USB support
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Dan Murphy

author
#0 lore raw

PATCH 1/1 OMAP5: USB_EHCI: Enable ehci support for omap5

From: "Govindraj.R" <[email protected]>

* Enable all usb ehci related clocks.
* Add ehci support to omap5 board file and arch specific sysc reg mask values.
* Enable config options for usb support and ethernet support

Signed-off-by Govindraj.R <[email protected]>
---
 arch/arm/cpu/armv7/omap5/clocks.c        |   20 +++++++++++---
 arch/arm/include/asm/arch-omap5/clocks.h |    6 ++++
 arch/arm/include/asm/arch-omap5/ehci.h   |   44 ++++++++++++++++++++++++++++++
 board/ti/omap5_evm/evm.c                 |   33 ++++++++++++++++++++++
 include/configs/omap5_evm5430.h          |   23 ++++++++++++++--
 5 files changed, 120 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h
arch/arm/cpu/armv7/omap5/clocks.c +16 -4
index 7e69d2b..f914b60 100644
@@ -375,6 +375,8 @@ void enable_basic_clocks(void)
 		&prcm->cm_l4per_gpio4_clkctrl,
 		&prcm->cm_l4per_gpio5_clkctrl,
 		&prcm->cm_l4per_gpio6_clkctrl,
+		&prcm->cm_clksel_usb_60mhz,
+		&prcm->cm_l3init_hsusbtll_clkctrl,
 		0
 	};
 

@@ -385,6 +387,7 @@ void enable_basic_clocks(void)
 		&prcm->cm_wkup_wdtimer2_clkctrl,
 		&prcm->cm_l4per_uart3_clkctrl,
 		&prcm->cm_l4per_i2c1_clkctrl,
+		&prcm->cm_l3init_hsusbhost_clkctrl,
 		0
 	};
 

@@ -408,10 +411,13 @@ void enable_basic_clocks(void)
 	setbits_le32(&prcm->cm_wkup_gptimer1_clkctrl,
 			GPTIMER1_CLKCTRL_CLKSEL_MASK);
 
-	do_enable_clocks(clk_domains_essential,
-			 clk_modules_hw_auto_essential,
-			 clk_modules_explicit_en_essential,
-			 1);
+	/* Enbale all 3 usb ports enable uhh, utmi and hsic clocks*/
+	setbits_le32(&prcm->cm_l3init_hsusbhost_clkctrl,
+			USB_HOST_HS_CLKCTRL_MASK);
+
+	/* Enbale all 3 usb host ports tll clocks*/
+	setbits_le32(&prcm->cm_l3init_hsusbtll_clkctrl,
+			USB_TLL_HS_CLKCTRL_MASK);
 
 	/* Select 384Mhz for GPU as its the POR for ES1.0 */
 	setbits_le32(&prcm->cm_sgx_sgx_clkctrl,

@@ -429,6 +435,12 @@ void enable_basic_clocks(void)
 	setbits_le32(&prcm->cm_coreaon_bandgap_clkctrl,
 		((OMAP_TS_CLK_ENABLE_MASK | OMAP_19M_TS_CLK_DIVIDER_MASK)
 			& ~OMAP_38M_TS_CLK_DIVIDER_MASK));
+
+	do_enable_clocks(clk_domains_essential,
+			 clk_modules_hw_auto_essential,
+			 clk_modules_explicit_en_essential,
+			 1);
+
 }
 
 void enable_basic_uboot_clocks(void)
arch/arm/include/asm/arch-omap5/clocks.h +6 -0
index c944f35..43fc5b8 100644
@@ -613,6 +613,12 @@ struct omap5_prcm_regs {
 /* CM_L3INIT_USBPHY_CLKCTRL */
 #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK	8
 
+/* CM_L3INIT_USB_HOST_HS_CLKCTRL */
+#define USB_HOST_HS_CLKCTRL_MASK		0xFFC0
+
+/* CM_L3INIT_USB_TLL_HS_CLKCTRL */
+#define USB_TLL_HS_CLKCTRL_MASK			0x700
+
 /* CM_MPU_MPU_CLKCTRL */
 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT	24
 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK	(1 << 24)
arch/arm/include/asm/arch-omap5/ehci.h new file +44 -0

44 lines not on this page · raw message

board/ti/omap5_evm/evm.c +33 -0
index 7b426d9..30fcd95 100644
@@ -29,6 +29,12 @@
 
 #include "mux_data.h"
 
+#ifdef CONFIG_USB_EHCI
+#include <usb.h>
+#include <asm/arch/ehci.h>
+#include <asm/ehci-omap.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 const struct omap_sysinfo sysinfo = {

@@ -107,3 +113,30 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 #endif
+
+#ifdef CONFIG_USB_EHCI
+static struct omap_usbhs_board_data usbhs_bdata = {
+	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+	.port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
+	.port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
+};
+
+int ehci_hcd_init(void)
+{
+	int ret;
+
+	ret = omap_ehci_hcd_init(&usbhs_bdata);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	int ret;
+
+	ret = omap_ehci_hcd_stop();
+	return ret;
+}
+#endif
include/configs/omap5_evm5430.h +21 -2
index 3145e53..e81c560 100644
@@ -128,6 +128,27 @@
 /* Flash */
 #define CONFIG_SYS_NO_FLASH	1
 
+/* USB UHH support options */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 172
+#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 173
+
+/* Enabled commands */
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_DHCP		/* DHCP Support			*/
+#define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
+#define CONFIG_CMD_NFS		/* NFS support			*/
+
+/* USB Networking options */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+
 /* commands to include */
 #include <config_cmd_default.h>
 

@@ -139,8 +160,6 @@
 #define CONFIG_CMD_SAVEENV
 
 /* Disabled commands */
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
 #undef CONFIG_CMD_IMLS		/* List all found images        */
Signature · 1 line
1.7.9.5
author
#1 lore raw

PATCH 1/3 omap5: uevm: Change the board name to correct name

Change the board name for the sys info to
5432 uEVM

Signed-off-by Dan Murphy <[email protected]>
---
 board/ti/omap5_uevm/evm.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
board/ti/omap5_uevm/evm.c +1 -1
index 90046e8..00bd72d 100644
@@ -32,7 +32,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 const struct omap_sysinfo sysinfo = {
-	"Board: OMAP5430 EVM\n"
+	"Board: OMAP5432 uEVM\n"
 };
 
 /**
Signature · 1 line
1.7.9.5
author
#2 lore raw

PATCH 2/3 usb: omap5-evm: Add ethernet support to the uevm

In reply to Dan Murphy

Add code to configure the USB EHCI host controller. This enumerates an ethernet controller through USB3 using the HSIC lines.

Signed-off-by Dan Murphy <[email protected]>
---
 arch/arm/cpu/armv7/omap5/hw_data.c      |   15 +++++++++++
 arch/arm/include/asm/arch-omap5/clock.h |    6 +++++
 arch/arm/include/asm/arch-omap5/ehci.h  |   44 +++++++++++++++++++++++++++++++
 arch/arm/include/asm/ehci-omap.h        |    1 +
 board/ti/omap5_uevm/evm.c               |   35 ++++++++++++++++++++++++
 board/ti/omap5_uevm/mux_data.h          |    4 ++-
 drivers/usb/host/ehci-omap.c            |    2 +-
 include/configs/omap5_common.h          |    2 --
 include/configs/omap5_uevm.h            |   23 ++++++++++++++++
 9 files changed, 128 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h
arch/arm/cpu/armv7/omap5/hw_data.c +15 -0
index 56cf1f8..f3973ee 100644
@@ -412,6 +412,8 @@ void enable_basic_clocks(void)
 		(*prcm)->cm_l4per_gpio4_clkctrl,
 		(*prcm)->cm_l4per_gpio5_clkctrl,
 		(*prcm)->cm_l4per_gpio6_clkctrl,
+		(*prcm)->cm_clksel_usb_60mhz,
+		(*prcm)->cm_l3init_hsusbtll_clkctrl,
 		0
 	};
 

@@ -423,6 +425,7 @@ void enable_basic_clocks(void)
 		(*prcm)->cm_wkup_wdtimer2_clkctrl,
 		(*prcm)->cm_l4per_uart3_clkctrl,
 		(*prcm)->cm_l4per_i2c1_clkctrl,
+		(*prcm)->cm_l3init_hsusbhost_clkctrl,
 		0
 	};
 

@@ -446,6 +449,14 @@ void enable_basic_clocks(void)
 	setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl,
 			GPTIMER1_CLKCTRL_CLKSEL_MASK);
 
+	/* Enbale all 3 usb ports enable uhh, utmi and hsic clocks*/
+	setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,
+			USB_HOST_HS_CLKCTRL_MASK);
+
+	/* Enbale all 3 usb host ports tll clocks*/
+	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
+			USB_TLL_HS_CLKCTRL_MASK);
+
 	do_enable_clocks(clk_domains_essential,
 			 clk_modules_hw_auto_essential,
 			 clk_modules_explicit_en_essential,

@@ -480,6 +491,10 @@ void enable_basic_uboot_clocks(void)
 		0
 	};
 
+	/* Enbale all 3 usb host ports tll clocks*/
+	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
+			USB_TLL_HS_CLKCTRL_MASK);
+
 	do_enable_clocks(clk_domains_essential,
 			 clk_modules_hw_auto_essential,
 			 clk_modules_explicit_en_essential,
arch/arm/include/asm/arch-omap5/clock.h +6 -0
index 4d2765d..f98fe74 100644
@@ -165,6 +165,12 @@
 /* CM_L3INIT_USBPHY_CLKCTRL */
 #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK	8
 
+/* CM_L3INIT_USB_HOST_HS_CLKCTRL */
+#define USB_HOST_HS_CLKCTRL_MASK		0x7FC0
+
+/* CM_L3INIT_USB_TLL_HS_CLKCTRL */
+#define USB_TLL_HS_CLKCTRL_MASK			0x700
+
 /* CM_MPU_MPU_CLKCTRL */
 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT	24
 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK	(3 << 24)
arch/arm/include/asm/arch-omap5/ehci.h new file +44 -0

44 lines not on this page · raw message

arch/arm/include/asm/ehci-omap.h +1 -0
index 77e8170..0b09e9d 100644
@@ -42,6 +42,7 @@ enum usbhs_omap_port_mode {
 /* Values of UHH_REVISION - Note: these are not given in the TRM */
 #define OMAP_USBHS_REV1					0x00000010 /* OMAP3 */
 #define OMAP_USBHS_REV2					0x50700100 /* OMAP4 */
+#define OMAP_USBHS_REV2_1				0x50700101 /* OMAP5 */
 
 /* UHH Register Set */
 #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN		(1 << 2)
board/ti/omap5_uevm/evm.c +35 -0
index 00bd72d..21d4704 100644
@@ -29,6 +29,12 @@
 
 #include "mux_data.h"
 
+#ifdef CONFIG_USB_EHCI
+#include <usb.h>
+#include <asm/arch/ehci.h>
+#include <asm/ehci-omap.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 const struct omap_sysinfo sysinfo = {

@@ -103,3 +109,32 @@ int board_mmc_init(bd_t *bis)
 	return 0;
 }
 #endif
+
+#ifdef CONFIG_USB_EHCI
+static struct omap_usbhs_board_data usbhs_bdata = {
+	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+	.port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
+	.port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
+};
+
+int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+	int ret;
+
+	ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+	if (ret < 0) {
+		printf("Failed to initialize ehci\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	int ret;
+
+	ret = omap_ehci_hcd_stop();
+	return ret;
+}
+#endif
board/ti/omap5_uevm/mux_data.h +3 -1
index a82795d..dc3a8b1 100644
@@ -56,7 +56,9 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
 	{USBD0_HS_DP, (IEN | M0)},	/*  USBD0_HS_DP */
 	{USBD0_HS_DM, (IEN | M0)},	/*  USBD0_HS_DM */
 	{USBD0_SS_RX, (IEN | M0)},	/*  USBD0_SS_RX */
-
+	{HSI2_ACWAKE, (M6)},    /*  HSI2_ACWAKE */
+	{HSI2_CAFLAG, (M6)},    /*  HSI2_CAFLAG */
+	{FREF_CLK1_OUT, (M0)},    /*  FREF_CLK1_OUT  */
 };
 
 const struct pad_conf_entry wkup_padconf_array_essential[] = {
drivers/usb/host/ehci-omap.c +1 -1
index 086c697..17f2214 100644
@@ -208,7 +208,7 @@ int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
 			clrbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
 		else
 			setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
-	} else if (rev == OMAP_USBHS_REV2) {
+	} else if ((rev == OMAP_USBHS_REV2) || (rev == OMAP_USBHS_REV2_1)) {
 		clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR),
 					OMAP4_UHH_HOSTCONFIG_APP_START_CLK);
include/configs/omap5_common.h +0 -2
index b87ee42..32f053d 100644
@@ -113,8 +113,6 @@
 #define CONFIG_CMD_MMC		/* MMC support                  */
 
 /* Disabled commands */
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
 #undef CONFIG_CMD_IMLS		/* List all found images        */
include/configs/omap5_uevm.h +23 -0
index 46dacc2..86f4238 100644
@@ -53,6 +53,29 @@
 #define CONFIG_PARTITION_UUIDS
 #define CONFIG_CMD_PART
 
+/* USB UHH support options */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT_OMAP
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 79
+#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
+
+/* Enabled commands */
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_DHCP		/* DHCP Support			*/
+#define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
+#define CONFIG_CMD_NFS		/* NFS support			*/
+
+/* USB Networking options */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+
 #define CONFIG_SYS_PROMPT		"OMAP5432 uEVM # "
 
 #define CONSOLEDEV		"ttyO2"
Signature · 1 line
1.7.9.5
#3 lore raw

PATCH 2/3 usb: omap5-evm: Add ethernet support to the uevm

Quoted 3 lines · Dan Murphy

Add code to configure the USB EHCI host controller. This enumerates an ethernet controller through USB3 using the HSIC lines.

Code says:

Quoted 3 lines

+ * OMAP EHCI port support
+ * Based on LINUX KERNEL
+ * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c

which kernel?

Quoted 12 lines
Signed-off-by Dan Murphy <[email protected]>
---
  arch/arm/cpu/armv7/omap5/hw_data.c      |   15 +++++++++++
  arch/arm/include/asm/arch-omap5/clock.h |    6 +++++
  arch/arm/include/asm/arch-omap5/ehci.h  |   44 +++++++++++++++++++++++++++++++
  arch/arm/include/asm/ehci-omap.h        |    1 +
  board/ti/omap5_uevm/evm.c               |   35 ++++++++++++++++++++++++
  board/ti/omap5_uevm/mux_data.h          |    4 ++-
  drivers/usb/host/ehci-omap.c            |    2 +-
  include/configs/omap5_common.h          |    2 --
  include/configs/omap5_uevm.h            |   23 ++++++++++++++++

Is it possible to split this into stuff that is OMAP5 specific and stuff that is uEVM specific?

Quoted 25 lines
  9 files changed, 128 insertions(+), 4 deletions(-)

create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h

arch/arm/cpu/armv7/omap5/hw_data.c +3 -0
index 56cf1f8..f3973ee 100644
@@ -412,6 +412,8 @@ void enable_basic_clocks(void)
  		(*prcm)->cm_l4per_gpio4_clkctrl,
  		(*prcm)->cm_l4per_gpio5_clkctrl,
  		(*prcm)->cm_l4per_gpio6_clkctrl,
+		(*prcm)->cm_clksel_usb_60mhz,
+		(*prcm)->cm_l3init_hsusbtll_clkctrl,
  		0
  	};
 

@@ -423,6 +425,7 @@ void enable_basic_clocks(void)
  		(*prcm)->cm_wkup_wdtimer2_clkctrl,
  		(*prcm)->cm_l4per_uart3_clkctrl,
  		(*prcm)->cm_l4per_i2c1_clkctrl,
+		(*prcm)->cm_l3init_hsusbhost_clkctrl,
  		0
  	};

arch/arm/cpu/armv7/omap5/hw_data.c void enable_basic_clocks(void) · line 452

Quoted 4 lines
arch/arm/cpu/armv7/omap5/hw_data.c +1 -0
@@ -446,6 +449,14 @@ void enable_basic_clocks(void)
  	setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl,
  			GPTIMER1_CLKCTRL_CLKSEL_MASK);
 
+	/* Enbale all 3 usb ports enable uhh, utmi and hsic clocks*/

here

arch/arm/cpu/armv7/omap5/hw_data.c void enable_basic_clocks(void) · line 456

Quoted 4 lines
arch/arm/cpu/armv7/omap5/hw_data.c +4 -0
+	setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,
+			USB_HOST_HS_CLKCTRL_MASK);
+
+	/* Enbale all 3 usb host ports tll clocks*/

here

arch/arm/cpu/armv7/omap5/hw_data.c void enable_basic_clocks(void) · line 459

Quoted 3 lines
arch/arm/cpu/armv7/omap5/hw_data.c +3 -0
+	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
+			USB_TLL_HS_CLKCTRL_MASK);
+

Who disables these when control is given to kernel?

arch/arm/cpu/armv7/omap5/hw_data.c void enable_basic_uboot_clocks(void) · line 494

Quoted 8 lines
arch/arm/cpu/armv7/omap5/hw_data.c +1 -0
  	do_enable_clocks(clk_domains_essential,
  			 clk_modules_hw_auto_essential,
  			 clk_modules_explicit_en_essential,

@@ -480,6 +491,10 @@ void enable_basic_uboot_clocks(void)
  		0
  	};
 
+	/* Enbale all 3 usb host ports tll clocks*/

Enbale <- spell check. and a space after clocks

Quoted 29 lines
arch/arm/cpu/armv7/omap5/hw_data.c +3 -0
+	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
+			USB_TLL_HS_CLKCTRL_MASK);
+
  	do_enable_clocks(clk_domains_essential,
  			 clk_modules_hw_auto_essential,
  			 clk_modules_explicit_en_essential,
arch/arm/include/asm/arch-omap5/clock.h +6 -0
index 4d2765d..f98fe74 100644
@@ -165,6 +165,12 @@
  /* CM_L3INIT_USBPHY_CLKCTRL */
  #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK	8
 
+/* CM_L3INIT_USB_HOST_HS_CLKCTRL */
+#define USB_HOST_HS_CLKCTRL_MASK		0x7FC0
+
+/* CM_L3INIT_USB_TLL_HS_CLKCTRL */
+#define USB_TLL_HS_CLKCTRL_MASK			0x700
+
  /* CM_MPU_MPU_CLKCTRL */
  #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT	24
  #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK	(3 << 24)
arch/arm/include/asm/arch-omap5/ehci.h new file +0 -0
new file mode 100644
index 0000000..49197f2

arch/arm/include/asm/arch-omap5/ehci.h line 7

Quoted 7 lines
arch/arm/include/asm/arch-omap5/ehci.h new file +7 -0
@@ -0,0 +1,44 @@
+/*
+ * OMAP EHCI port support
+ * Based on LINUX KERNEL
+ * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com*
+ * Author: Govindraj R <[email protected]>

2013?

Quoted 104 lines
arch/arm/include/asm/arch-omap5/ehci.h new file +37 -0
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _EHCI_H
+#define _EHCI_H
+
+#define OMAP_EHCI_BASE				(OMAP54XX_L4_CORE_BASE + 0x64C00)
+#define OMAP_UHH_BASE				(OMAP54XX_L4_CORE_BASE + 0x64000)
+#define OMAP_USBTLL_BASE			(OMAP54XX_L4_CORE_BASE + 0x62000)
+
+/* TLL Register Set */
+#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE		(1 << 3)
+#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP		(1 << 2)
+#define OMAP_USBTLL_SYSCONFIG_SOFTRESET		(1 << 1)
+#define OMAP_USBTLL_SYSCONFIG_CACTIVITY		(1 << 8)
+#define OMAP_USBTLL_SYSSTATUS_RESETDONE		1
+
+#define OMAP_UHH_SYSCONFIG_SOFTRESET		1
+#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE	(1 << 2)
+#define OMAP_UHH_SYSCONFIG_NOIDLE		(1 << 2)
+#define OMAP_UHH_SYSCONFIG_NOSTDBY		(1 << 4)
+
+#define OMAP_UHH_SYSCONFIG_VAL	(OMAP_UHH_SYSCONFIG_NOIDLE | \
+					OMAP_UHH_SYSCONFIG_NOSTDBY)
+
+#endif /* _EHCI_H */
arch/arm/include/asm/ehci-omap.h +1 -0
index 77e8170..0b09e9d 100644
@@ -42,6 +42,7 @@ enum usbhs_omap_port_mode {
  /* Values of UHH_REVISION - Note: these are not given in the TRM */
  #define OMAP_USBHS_REV1					0x00000010 /* OMAP3 */
  #define OMAP_USBHS_REV2					0x50700100 /* OMAP4 */
+#define OMAP_USBHS_REV2_1				0x50700101 /* OMAP5 */
 
  /* UHH Register Set */
  #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN		(1 << 2)
board/ti/omap5_uevm/evm.c +35 -0
index 00bd72d..21d4704 100644
@@ -29,6 +29,12 @@
 
  #include "mux_data.h"
 
+#ifdef CONFIG_USB_EHCI
+#include <usb.h>
+#include <asm/arch/ehci.h>
+#include <asm/ehci-omap.h>
+#endif
+
  DECLARE_GLOBAL_DATA_PTR;
 
  const struct omap_sysinfo sysinfo = {

@@ -103,3 +109,32 @@ int board_mmc_init(bd_t *bis)
  	return 0;
  }
  #endif
+
+#ifdef CONFIG_USB_EHCI
+static struct omap_usbhs_board_data usbhs_bdata = {
+	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+	.port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
+	.port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
+};
+
+int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+	int ret;
+
+	ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+	if (ret < 0) {
+		printf("Failed to initialize ehci\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	int ret;
+
+	ret = omap_ehci_hcd_stop();
+	return ret;
+}
+#endif
board/ti/omap5_uevm/mux_data.h +0 -0
index a82795d..dc3a8b1 100644

board/ti/omap5_uevm/mux_data.h const struct pad_conf_entry core_padconf_array_essential[] = { · line 60

Quoted 6 lines
board/ti/omap5_uevm/mux_data.h +2 -1
@@ -56,7 +56,9 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
  	{USBD0_HS_DP, (IEN | M0)},	/*  USBD0_HS_DP */
  	{USBD0_HS_DM, (IEN | M0)},	/*  USBD0_HS_DM */
  	{USBD0_SS_RX, (IEN | M0)},	/*  USBD0_SS_RX */
-
+	{HSI2_ACWAKE, (M6)},    /*  HSI2_ACWAKE */
+	{HSI2_CAFLAG, (M6)},    /*  HSI2_CAFLAG */

both are output pins?

Quoted 22 lines
board/ti/omap5_uevm/mux_data.h +1 -0
+	{FREF_CLK1_OUT, (M0)},    /*  FREF_CLK1_OUT  */
  };
 
  const struct pad_conf_entry wkup_padconf_array_essential[] = {
drivers/usb/host/ehci-omap.c +1 -1
index 086c697..17f2214 100644
@@ -208,7 +208,7 @@ int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
  			clrbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
  		else
  			setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
-	} else if (rev == OMAP_USBHS_REV2) {
+	} else if ((rev == OMAP_USBHS_REV2) || (rev == OMAP_USBHS_REV2_1)) {
  		clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR),
  					OMAP4_UHH_HOSTCONFIG_APP_START_CLK);
include/configs/omap5_common.h +0 -0
index b87ee42..32f053d 100644

include/configs/omap5_common.h line 117

Quoted 5 lines
include/configs/omap5_common.h +0 -2
@@ -113,8 +113,6 @@
  #define CONFIG_CMD_MMC		/* MMC support                  */
 
  /* Disabled commands */
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS

why? I think your intent is to move changes to being board specific, but lets make it separate?

Quoted 38 lines
include/configs/omap5_common.h +0 -0
  #undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
  #undef CONFIG_CMD_IMLS		/* List all found images        */
include/configs/omap5_uevm.h +23 -0
index 46dacc2..86f4238 100644
@@ -53,6 +53,29 @@
  #define CONFIG_PARTITION_UUIDS
  #define CONFIG_CMD_PART
 
+/* USB UHH support options */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT_OMAP
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 79
+#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
+
+/* Enabled commands */
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_DHCP		/* DHCP Support			*/
+#define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
+#define CONFIG_CMD_NFS		/* NFS support			*/
+
+/* USB Networking options */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+
  #define CONFIG_SYS_PROMPT		"OMAP5432 uEVM # "
 
  #define CONSOLEDEV		"ttyO2"
Signature · 2 lines
Regards,
Nishanth Menon
#4 lore raw

PATCH 2/3 usb: omap5-evm: Add ethernet support to the uevm

In reply to Dan Murphy

Hi Dan,

Quoted 5 lines · Dan Murphy

Add code to configure the USB EHCI host controller. This enumerates an ethernet controller through USB3 using the HSIC lines.

Signed-off-by Dan Murphy <[email protected]>
Quoted 12 lines
---
 arch/arm/cpu/armv7/omap5/hw_data.c      |   15 +++++++++++
 arch/arm/include/asm/arch-omap5/clock.h |    6 +++++
 arch/arm/include/asm/arch-omap5/ehci.h  |   44 +++++++++++++++++++++++++++++++
 arch/arm/include/asm/ehci-omap.h        |    1 +
 board/ti/omap5_uevm/evm.c               |   35 ++++++++++++++++++++++++
 board/ti/omap5_uevm/mux_data.h          |    4 ++-
 drivers/usb/host/ehci-omap.c            |    2 +-
 include/configs/omap5_common.h          |    2 --
 include/configs/omap5_uevm.h            |   23 ++++++++++++++++
 9 files changed, 128 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h

I see a other patch from you which adds the same file. Is the previous patch sent by mistake?

Quoted 23 lines
arch/arm/cpu/armv7/omap5/hw_data.c +3 -0
index 56cf1f8..f3973ee 100644
@@ -412,6 +412,8 @@ void enable_basic_clocks(void)
 		(*prcm)->cm_l4per_gpio4_clkctrl,
 		(*prcm)->cm_l4per_gpio5_clkctrl,
 		(*prcm)->cm_l4per_gpio6_clkctrl,
+		(*prcm)->cm_clksel_usb_60mhz,
+		(*prcm)->cm_l3init_hsusbtll_clkctrl,
 		0
 	};
 

@@ -423,6 +425,7 @@ void enable_basic_clocks(void)
 		(*prcm)->cm_wkup_wdtimer2_clkctrl,
 		(*prcm)->cm_l4per_uart3_clkctrl,
 		(*prcm)->cm_l4per_i2c1_clkctrl,
+		(*prcm)->cm_l3init_hsusbhost_clkctrl,
 		0
 	};

arch/arm/cpu/armv7/omap5/hw_data.c void enable_basic_clocks(void) · line 458

Quoted 10 lines
arch/arm/cpu/armv7/omap5/hw_data.c +7 -0
@@ -446,6 +449,14 @@ void enable_basic_clocks(void)
 	setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl,
 			GPTIMER1_CLKCTRL_CLKSEL_MASK);
 
+	/* Enbale all 3 usb ports enable uhh, utmi and hsic clocks*/
+	setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,
+			USB_HOST_HS_CLKCTRL_MASK);
+
+	/* Enbale all 3 usb host ports tll clocks*/
+	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
+			USB_TLL_HS_CLKCTRL_MASK);

Please keep this under a macro.

Quoted 38 lines
arch/arm/cpu/armv7/omap5/hw_data.c +5 -0
+
 	do_enable_clocks(clk_domains_essential,
 			 clk_modules_hw_auto_essential,
 			 clk_modules_explicit_en_essential,

@@ -480,6 +491,10 @@ void enable_basic_uboot_clocks(void)
 		0
 	};
 
+	/* Enbale all 3 usb host ports tll clocks*/
+	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
+			USB_TLL_HS_CLKCTRL_MASK);
+
 	do_enable_clocks(clk_domains_essential,
 			 clk_modules_hw_auto_essential,
 			 clk_modules_explicit_en_essential,
arch/arm/include/asm/arch-omap5/clock.h +6 -0
index 4d2765d..f98fe74 100644
@@ -165,6 +165,12 @@
 /* CM_L3INIT_USBPHY_CLKCTRL */
 #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK	8
 
+/* CM_L3INIT_USB_HOST_HS_CLKCTRL */
+#define USB_HOST_HS_CLKCTRL_MASK		0x7FC0
+
+/* CM_L3INIT_USB_TLL_HS_CLKCTRL */
+#define USB_TLL_HS_CLKCTRL_MASK			0x700
+
 /* CM_MPU_MPU_CLKCTRL */
 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT	24
 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK	(3 << 24)
arch/arm/include/asm/arch-omap5/ehci.h new file +0 -0
new file mode 100644
index 0000000..49197f2

arch/arm/include/asm/arch-omap5/ehci.h line 6

Quoted 6 lines
arch/arm/include/asm/arch-omap5/ehci.h new file +6 -0
@@ -0,0 +1,44 @@
+/*
+ * OMAP EHCI port support
+ * Based on LINUX KERNEL
+ * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com*

2013...:)

Thanks
Lokesh

Quoted 176 lines
arch/arm/include/asm/arch-omap5/ehci.h new file +38 -0
+ * Author: Govindraj R <[email protected]>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _EHCI_H
+#define _EHCI_H
+
+#define OMAP_EHCI_BASE				(OMAP54XX_L4_CORE_BASE + 0x64C00)
+#define OMAP_UHH_BASE				(OMAP54XX_L4_CORE_BASE + 0x64000)
+#define OMAP_USBTLL_BASE			(OMAP54XX_L4_CORE_BASE + 0x62000)
+
+/* TLL Register Set */
+#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE		(1 << 3)
+#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP		(1 << 2)
+#define OMAP_USBTLL_SYSCONFIG_SOFTRESET		(1 << 1)
+#define OMAP_USBTLL_SYSCONFIG_CACTIVITY		(1 << 8)
+#define OMAP_USBTLL_SYSSTATUS_RESETDONE		1
+
+#define OMAP_UHH_SYSCONFIG_SOFTRESET		1
+#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE	(1 << 2)
+#define OMAP_UHH_SYSCONFIG_NOIDLE		(1 << 2)
+#define OMAP_UHH_SYSCONFIG_NOSTDBY		(1 << 4)
+
+#define OMAP_UHH_SYSCONFIG_VAL	(OMAP_UHH_SYSCONFIG_NOIDLE | \
+					OMAP_UHH_SYSCONFIG_NOSTDBY)
+
+#endif /* _EHCI_H */
arch/arm/include/asm/ehci-omap.h +1 -0
index 77e8170..0b09e9d 100644
@@ -42,6 +42,7 @@ enum usbhs_omap_port_mode {
 /* Values of UHH_REVISION - Note: these are not given in the TRM */
 #define OMAP_USBHS_REV1					0x00000010 /* OMAP3 */
 #define OMAP_USBHS_REV2					0x50700100 /* OMAP4 */
+#define OMAP_USBHS_REV2_1				0x50700101 /* OMAP5 */
 
 /* UHH Register Set */
 #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN		(1 << 2)
board/ti/omap5_uevm/evm.c +35 -0
index 00bd72d..21d4704 100644
@@ -29,6 +29,12 @@
 
 #include "mux_data.h"
 
+#ifdef CONFIG_USB_EHCI
+#include <usb.h>
+#include <asm/arch/ehci.h>
+#include <asm/ehci-omap.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 const struct omap_sysinfo sysinfo = {

@@ -103,3 +109,32 @@ int board_mmc_init(bd_t *bis)
 	return 0;
 }
 #endif
+
+#ifdef CONFIG_USB_EHCI
+static struct omap_usbhs_board_data usbhs_bdata = {
+	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+	.port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
+	.port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
+};
+
+int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+	int ret;
+
+	ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+	if (ret < 0) {
+		printf("Failed to initialize ehci\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	int ret;
+
+	ret = omap_ehci_hcd_stop();
+	return ret;
+}
+#endif
board/ti/omap5_uevm/mux_data.h +3 -1
index a82795d..dc3a8b1 100644
@@ -56,7 +56,9 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
 	{USBD0_HS_DP, (IEN | M0)},	/*  USBD0_HS_DP */
 	{USBD0_HS_DM, (IEN | M0)},	/*  USBD0_HS_DM */
 	{USBD0_SS_RX, (IEN | M0)},	/*  USBD0_SS_RX */
-
+	{HSI2_ACWAKE, (M6)},    /*  HSI2_ACWAKE */
+	{HSI2_CAFLAG, (M6)},    /*  HSI2_CAFLAG */
+	{FREF_CLK1_OUT, (M0)},    /*  FREF_CLK1_OUT  */
 };
 
 const struct pad_conf_entry wkup_padconf_array_essential[] = {
drivers/usb/host/ehci-omap.c +1 -1
index 086c697..17f2214 100644
@@ -208,7 +208,7 @@ int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
 			clrbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
 		else
 			setbits_le32(&reg, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS);
-	} else if (rev == OMAP_USBHS_REV2) {
+	} else if ((rev == OMAP_USBHS_REV2) || (rev == OMAP_USBHS_REV2_1)) {
 		clrsetbits_le32(&reg, (OMAP_P1_MODE_CLEAR | OMAP_P2_MODE_CLEAR),
 					OMAP4_UHH_HOSTCONFIG_APP_START_CLK);
include/configs/omap5_common.h +0 -2
index b87ee42..32f053d 100644
@@ -113,8 +113,6 @@
 #define CONFIG_CMD_MMC		/* MMC support                  */
 
 /* Disabled commands */
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
 #undef CONFIG_CMD_IMLS		/* List all found images        */
include/configs/omap5_uevm.h +23 -0
index 46dacc2..86f4238 100644
@@ -53,6 +53,29 @@
 #define CONFIG_PARTITION_UUIDS
 #define CONFIG_CMD_PART
 
+/* USB UHH support options */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT_OMAP
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 79
+#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
+
+/* Enabled commands */
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_DHCP		/* DHCP Support			*/
+#define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
+#define CONFIG_CMD_NFS		/* NFS support			*/
+
+/* USB Networking options */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+
 #define CONFIG_SYS_PROMPT		"OMAP5432 uEVM # "
 
 #define CONSOLEDEV		"ttyO2"
#5 lore raw

PATCH 2/3 usb: omap5-evm: Add ethernet support to the uevm

In reply to Dan Murphy

Hi Dan,

Quoted 41 lines · Dan Murphy

Add code to configure the USB EHCI host controller. This enumerates an ethernet controller through USB3 using the HSIC lines.

Signed-off-by Dan Murphy <[email protected]>
---
 arch/arm/cpu/armv7/omap5/hw_data.c      |   15 +++++++++++
 arch/arm/include/asm/arch-omap5/clock.h |    6 +++++
 arch/arm/include/asm/arch-omap5/ehci.h  |   44 +++++++++++++++++++++++++++++++
 arch/arm/include/asm/ehci-omap.h        |    1 +
 board/ti/omap5_uevm/evm.c               |   35 ++++++++++++++++++++++++
 board/ti/omap5_uevm/mux_data.h          |    4 ++-
 drivers/usb/host/ehci-omap.c            |    2 +-
 include/configs/omap5_common.h          |    2 --
 include/configs/omap5_uevm.h            |   23 ++++++++++++++++
 9 files changed, 128 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h
arch/arm/cpu/armv7/omap5/hw_data.c +3 -0
index 56cf1f8..f3973ee 100644
@@ -412,6 +412,8 @@ void enable_basic_clocks(void)
 		(*prcm)->cm_l4per_gpio4_clkctrl,
 		(*prcm)->cm_l4per_gpio5_clkctrl,
 		(*prcm)->cm_l4per_gpio6_clkctrl,
+		(*prcm)->cm_clksel_usb_60mhz,
+		(*prcm)->cm_l3init_hsusbtll_clkctrl,
 		0
 	};
 

@@ -423,6 +425,7 @@ void enable_basic_clocks(void)
 		(*prcm)->cm_wkup_wdtimer2_clkctrl,
 		(*prcm)->cm_l4per_uart3_clkctrl,
 		(*prcm)->cm_l4per_i2c1_clkctrl,
+		(*prcm)->cm_l3init_hsusbhost_clkctrl,
 		0
 	};
 

@@ -446,6 +449,14 @@ void enable_basic_clocks(void)
 	setbits_le32((*prcm)->cm_wkup_gptimer1_clkctrl,

arch/arm/cpu/armv7/omap5/hw_data.c void enable_basic_clocks(void) · line 459

Quoted 10 lines
arch/arm/cpu/armv7/omap5/hw_data.c +8 -0
 			GPTIMER1_CLKCTRL_CLKSEL_MASK);
 
+	/* Enbale all 3 usb ports enable uhh, utmi and hsic clocks*/
+	setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,
+			USB_HOST_HS_CLKCTRL_MASK);
+
+	/* Enbale all 3 usb host ports tll clocks*/
+	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
+			USB_TLL_HS_CLKCTRL_MASK);
+

Why enable all 3 port clocks here? uEVM uses only 2 ports.

Did you verify that if you boot the linux kernel without USB support then the USB_Host and USB_TLL module are back to idle state?

Just checking if we need to add something more in the linux kernel to make sure that these modules are not stuck in transition state.

If this is taken care of, I really don't mind even if all 3 clocks kept enabled ;).

Quoted 4 lines
arch/arm/cpu/armv7/omap5/hw_data.c +0 -0
 	do_enable_clocks(clk_domains_essential,
 			 clk_modules_hw_auto_essential,
 			 clk_modules_explicit_en_essential,

arch/arm/cpu/armv7/omap5/hw_data.c void enable_basic_uboot_clocks(void) · line 500

Quoted 10 lines
arch/arm/cpu/armv7/omap5/hw_data.c +4 -0
@@ -480,6 +491,10 @@ void enable_basic_uboot_clocks(void)
 		0
 	};
 
+	/* Enbale all 3 usb host ports tll clocks*/
+	setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
+			USB_TLL_HS_CLKCTRL_MASK);
+
 	do_enable_clocks(clk_domains_essential,
 			 clk_modules_hw_auto_essential,
 			 clk_modules_explicit_en_essential,

cheers,
-roger

author
#6 lore raw

PATCH 3/3 HACK: ehci-omap: do gpio toggle after port power is set

In reply to Dan Murphy

Need to check why gpio toggling in ehci-omap is not working and works only from ehci-hcd.

Signed-off-by Dan Murphy <[email protected]>
---
 drivers/usb/host/ehci-hcd.c  |    7 ++++++-
 drivers/usb/host/ehci-omap.c |    2 +-
 2 files changed, 7 insertions(+), 2 deletions(-)
drivers/usb/host/ehci-hcd.c +6 -1
index 706cf0c..17d0c9c 100644
@@ -29,7 +29,7 @@
 #include <malloc.h>
 #include <watchdog.h>
 #include <linux/compiler.h>
-
+#include <asm/ehci-omap.h>
 #include "ehci.h"
 
 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT

@@ -776,6 +776,11 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 			if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
 				reg |= EHCI_PS_PP;
 				ehci_writel(status_reg, reg);
+#ifdef CONFIG_USB_EHCI_OMAP
+				omap_ehci_phy_reset(1, 1000);
+				mdelay(10);
+				omap_ehci_phy_reset(0, 1000);
+#endif
 			}
 			break;
 		case USB_PORT_FEAT_RESET:
drivers/usb/host/ehci-omap.c +1 -1
index 17f2214..68add44 100644
@@ -109,7 +109,7 @@ int board_usb_init(void) __attribute__((weak, alias("__board_usb_init")));
 #if defined(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO) || \
 	defined(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO)
 /* controls PHY(s) reset signal(s) */
-static inline void omap_ehci_phy_reset(int on, int delay)
+void omap_ehci_phy_reset(int on, int delay)
 {
 	/*
 	 * Refer ISSUE1:
Signature · 1 line
1.7.9.5
#7 lore raw

PATCH 3/3 HACK: ehci-omap: do gpio toggle after port power is set

Quoted 2 lines · Dan Murphy

Need to check why gpio toggling in ehci-omap is not working and works only from ehci-hcd.

do you mean HSIC detection is not working?

GPIO toggling has to work from anywhere.

Quoted 21 lines
Signed-off-by Dan Murphy <[email protected]>
---
 drivers/usb/host/ehci-hcd.c  |    7 ++++++-
 drivers/usb/host/ehci-omap.c |    2 +-
 2 files changed, 7 insertions(+), 2 deletions(-)
drivers/usb/host/ehci-hcd.c +1 -1
index 706cf0c..17d0c9c 100644
@@ -29,7 +29,7 @@
 #include <malloc.h>
 #include <watchdog.h>
 #include <linux/compiler.h>
-
+#include <asm/ehci-omap.h>
 #include "ehci.h"
 
 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT

drivers/usb/host/ehci-hcd.c ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, · line 783

Quoted 8 lines
drivers/usb/host/ehci-hcd.c +5 -0
@@ -776,6 +776,11 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 			if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
 				reg |= EHCI_PS_PP;
 				ehci_writel(status_reg, reg);
+#ifdef CONFIG_USB_EHCI_OMAP
+				omap_ehci_phy_reset(1, 1000);
+				mdelay(10);
+				omap_ehci_phy_reset(0, 1000);
+#endif

Did you try to first keep the PHY in reset, start the EHCI controller and then release the reset?

At least this is what is done in the Linux kernel to get it to work.

Quoted 9 lines
drivers/usb/host/ehci-hcd.c +0 -0
 			}
 			break;
 		case USB_PORT_FEAT_RESET:
drivers/usb/host/ehci-omap.c +0 -0
index 17f2214..68add44 100644

drivers/usb/host/ehci-omap.c int board_usb_init(void) __attribute__((weak, alias("__board_usb_init"))); · line 115

Quoted 8 lines
drivers/usb/host/ehci-omap.c +1 -1
@@ -109,7 +109,7 @@ int board_usb_init(void) __attribute__((weak, alias("__board_usb_init")));
 #if defined(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO) || \
 	defined(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO)
 /* controls PHY(s) reset signal(s) */
-static inline void omap_ehci_phy_reset(int on, int delay)
+void omap_ehci_phy_reset(int on, int delay)
 {
 	/*
 	 * Refer ISSUE1:

cheers,
-roger

author
#8 lore raw

PATCH 3/3 HACK: ehci-omap: do gpio toggle after port power is set

Quoted 6 lines · Roger Quadros
Quoted 2 lines · Dan Murphy

Need to check why gpio toggling in ehci-omap is not working and works only from ehci-hcd.

do you mean HSIC detection is not working?

GPIO toggling has to work from anywhere.

GPIO toggling does work. I have confirmed that.
The issue seems to be that the Ethernet controller does not enumerate after the power power has been set.

It seems like the IC needs to be reset once the port power is set so it can enumerate.

The USB3530 on port 2 does not seem to have an issue. Need to find out if this is a 9730 IC quirk.

Quoted 19 lines
Quoted 19 lines
Signed-off-by Dan Murphy <[email protected]>
---
 drivers/usb/host/ehci-hcd.c  |    7 ++++++-
 drivers/usb/host/ehci-omap.c |    2 +-
 2 files changed, 7 insertions(+), 2 deletions(-)
drivers/usb/host/ehci-hcd.c +1 -1
index 706cf0c..17d0c9c 100644
@@ -29,7 +29,7 @@
 #include <malloc.h>
 #include <watchdog.h>
 #include <linux/compiler.h>
-
+#include <asm/ehci-omap.h>
 #include "ehci.h"
Quoted 12 lines

drivers/usb/host/ehci-hcd.c ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, · line 783

Quoted 10 lines
drivers/usb/host/ehci-hcd.c +5 -0
 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT

@@ -776,6 +776,11 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 			if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
 				reg |= EHCI_PS_PP;
 				ehci_writel(status_reg, reg);
+#ifdef CONFIG_USB_EHCI_OMAP
+				omap_ehci_phy_reset(1, 1000);
+				mdelay(10);
+				omap_ehci_phy_reset(0, 1000);
+#endif

Did you try to first keep the PHY in reset, start the EHCI controller and then release the reset?

Yes I have and thats what uBoot already does. No dice there.

Quoted 22 lines

At least this is what is done in the Linux kernel to get it to work.

Quoted 9 lines
drivers/usb/host/ehci-hcd.c +0 -0
 			}
 			break;
 		case USB_PORT_FEAT_RESET:
drivers/usb/host/ehci-omap.c +0 -0
index 17f2214..68add44 100644

drivers/usb/host/ehci-omap.c int board_usb_init(void) __attribute__((weak, alias("__board_usb_init"))); · line 115

Quoted 8 lines
drivers/usb/host/ehci-omap.c +1 -1
@@ -109,7 +109,7 @@ int board_usb_init(void) __attribute__((weak, alias("__board_usb_init")));
 #if defined(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO) || \
 	defined(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO)
 /* controls PHY(s) reset signal(s) */
-static inline void omap_ehci_phy_reset(int on, int delay)
+void omap_ehci_phy_reset(int on, int delay)
 {
 	/*
 	 * Refer ISSUE1:

cheers,
-roger

Signature · 2 lines
------------------
Dan Murphy
#9 lore raw

PATCH 1/1 OMAP5: USB_EHCI: Enable ehci support for omap5

In reply to Dan Murphy

Hi Dan,

Quoted 8 lines · Dan Murphy

From: "Govindraj.R" <[email protected]>

* Enable all usb ehci related clocks.
* Add ehci support to omap5 board file and arch specific sysc reg mask values.
* Enable config options for usb support and ethernet support

Signed-off-by Govindraj.R <[email protected]>
Quoted 8 lines
---
 arch/arm/cpu/armv7/omap5/clocks.c        |   20 +++++++++++---
 arch/arm/include/asm/arch-omap5/clocks.h |    6 ++++
 arch/arm/include/asm/arch-omap5/ehci.h   |   44 ++++++++++++++++++++++++++++++
 board/ti/omap5_evm/evm.c                 |   33 ++++++++++++++++++++++
 include/configs/omap5_evm5430.h          |   23 ++++++++++++++--
 5 files changed, 120 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h

Is this based on current mainline?
Most of the above files changed are not preset in mainline.

Quoted 27 lines
arch/arm/cpu/armv7/omap5/clocks.c +3 -1
index 7e69d2b..f914b60 100644
@@ -375,6 +375,8 @@ void enable_basic_clocks(void)
 		&prcm->cm_l4per_gpio4_clkctrl,
 		&prcm->cm_l4per_gpio5_clkctrl,
 		&prcm->cm_l4per_gpio6_clkctrl,
+		&prcm->cm_clksel_usb_60mhz,
+		&prcm->cm_l3init_hsusbtll_clkctrl,
 		0
 	};
 

@@ -385,6 +387,7 @@ void enable_basic_clocks(void)
 		&prcm->cm_wkup_wdtimer2_clkctrl,
 		&prcm->cm_l4per_uart3_clkctrl,
 		&prcm->cm_l4per_i2c1_clkctrl,
+		&prcm->cm_l3init_hsusbhost_clkctrl,
 		0
 	};
 

@@ -408,10 +411,13 @@ void enable_basic_clocks(void)
 	setbits_le32(&prcm->cm_wkup_gptimer1_clkctrl,
 			GPTIMER1_CLKCTRL_CLKSEL_MASK);
 
-	do_enable_clocks(clk_domains_essential,

arch/arm/cpu/armv7/omap5/clocks.c void enable_basic_clocks(void) · line 420

Quoted 10 lines
arch/arm/cpu/armv7/omap5/clocks.c +7 -3
-			 clk_modules_hw_auto_essential,
-			 clk_modules_explicit_en_essential,
-			 1);
+	/* Enbale all 3 usb ports enable uhh, utmi and hsic clocks*/
+	setbits_le32(&prcm->cm_l3init_hsusbhost_clkctrl,
+			USB_HOST_HS_CLKCTRL_MASK);
+
+	/* Enbale all 3 usb host ports tll clocks*/
+	setbits_le32(&prcm->cm_l3init_hsusbtll_clkctrl,
+			USB_TLL_HS_CLKCTRL_MASK);

Please keep this under a CONFIG_*_USB_* macro.

Thanks,
Lokesh

Quoted 173 lines
arch/arm/cpu/armv7/omap5/clocks.c +6 -0
 	/* Select 384Mhz for GPU as its the POR for ES1.0 */
 	setbits_le32(&prcm->cm_sgx_sgx_clkctrl,

@@ -429,6 +435,12 @@ void enable_basic_clocks(void)
 	setbits_le32(&prcm->cm_coreaon_bandgap_clkctrl,
 		((OMAP_TS_CLK_ENABLE_MASK | OMAP_19M_TS_CLK_DIVIDER_MASK)
 			& ~OMAP_38M_TS_CLK_DIVIDER_MASK));
+
+	do_enable_clocks(clk_domains_essential,
+			 clk_modules_hw_auto_essential,
+			 clk_modules_explicit_en_essential,
+			 1);
+
 }
 
 void enable_basic_uboot_clocks(void)
arch/arm/include/asm/arch-omap5/clocks.h +6 -0
index c944f35..43fc5b8 100644
@@ -613,6 +613,12 @@ struct omap5_prcm_regs {
 /* CM_L3INIT_USBPHY_CLKCTRL */
 #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK	8
 
+/* CM_L3INIT_USB_HOST_HS_CLKCTRL */
+#define USB_HOST_HS_CLKCTRL_MASK		0xFFC0
+
+/* CM_L3INIT_USB_TLL_HS_CLKCTRL */
+#define USB_TLL_HS_CLKCTRL_MASK			0x700
+
 /* CM_MPU_MPU_CLKCTRL */
 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT	24
 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK	(1 << 24)
arch/arm/include/asm/arch-omap5/ehci.h new file +44 -0
new file mode 100644
index 0000000..49197f2
@@ -0,0 +1,44 @@
+/*
+ * OMAP EHCI port support
+ * Based on LINUX KERNEL
+ * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com*
+ * Author: Govindraj R <[email protected]>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _EHCI_H
+#define _EHCI_H
+
+#define OMAP_EHCI_BASE				(OMAP54XX_L4_CORE_BASE + 0x64C00)
+#define OMAP_UHH_BASE				(OMAP54XX_L4_CORE_BASE + 0x64000)
+#define OMAP_USBTLL_BASE			(OMAP54XX_L4_CORE_BASE + 0x62000)
+
+/* TLL Register Set */
+#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE		(1 << 3)
+#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP		(1 << 2)
+#define OMAP_USBTLL_SYSCONFIG_SOFTRESET		(1 << 1)
+#define OMAP_USBTLL_SYSCONFIG_CACTIVITY		(1 << 8)
+#define OMAP_USBTLL_SYSSTATUS_RESETDONE		1
+
+#define OMAP_UHH_SYSCONFIG_SOFTRESET		1
+#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE	(1 << 2)
+#define OMAP_UHH_SYSCONFIG_NOIDLE		(1 << 2)
+#define OMAP_UHH_SYSCONFIG_NOSTDBY		(1 << 4)
+
+#define OMAP_UHH_SYSCONFIG_VAL	(OMAP_UHH_SYSCONFIG_NOIDLE | \
+					OMAP_UHH_SYSCONFIG_NOSTDBY)
+
+#endif /* _EHCI_H */
board/ti/omap5_evm/evm.c +33 -0
index 7b426d9..30fcd95 100644
@@ -29,6 +29,12 @@
 
 #include "mux_data.h"
 
+#ifdef CONFIG_USB_EHCI
+#include <usb.h>
+#include <asm/arch/ehci.h>
+#include <asm/ehci-omap.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 const struct omap_sysinfo sysinfo = {

@@ -107,3 +113,30 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 #endif
+
+#ifdef CONFIG_USB_EHCI
+static struct omap_usbhs_board_data usbhs_bdata = {
+	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+	.port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
+	.port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
+};
+
+int ehci_hcd_init(void)
+{
+	int ret;
+
+	ret = omap_ehci_hcd_init(&usbhs_bdata);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	int ret;
+
+	ret = omap_ehci_hcd_stop();
+	return ret;
+}
+#endif
include/configs/omap5_evm5430.h +21 -2
index 3145e53..e81c560 100644
@@ -128,6 +128,27 @@
 /* Flash */
 #define CONFIG_SYS_NO_FLASH	1
 
+/* USB UHH support options */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 172
+#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 173
+
+/* Enabled commands */
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_DHCP		/* DHCP Support			*/
+#define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
+#define CONFIG_CMD_NFS		/* NFS support			*/
+
+/* USB Networking options */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+
 /* commands to include */
 #include <config_cmd_default.h>
 

@@ -139,8 +160,6 @@
 #define CONFIG_CMD_SAVEENV
 
 /* Disabled commands */
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
 #undef CONFIG_CMD_IMLS		/* List all found images        */
author
#10 lore raw

PATCH 1/1 OMAP5: USB_EHCI: Enable ehci support for omap5

Lokesh

Quoted 18 lines · Lokesh Vutla

Hi Dan,

Quoted 8 lines · Dan Murphy

From: "Govindraj.R" <[email protected]>

* Enable all usb ehci related clocks.
* Add ehci support to omap5 board file and arch specific sysc reg mask values.
* Enable config options for usb support and ethernet support

Signed-off-by Govindraj.R <[email protected]>
Quoted 8 lines
---
 arch/arm/cpu/armv7/omap5/clocks.c        |   20 +++++++++++---
 arch/arm/include/asm/arch-omap5/clocks.h |    6 ++++
 arch/arm/include/asm/arch-omap5/ehci.h   |   44 ++++++++++++++++++++++++++++++
 board/ti/omap5_evm/evm.c                 |   33 ++++++++++++++++++++++
 include/configs/omap5_evm5430.h          |   23 ++++++++++++++--
 5 files changed, 120 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h
Quoted 2 lines

Is this based on current mainline?
Most of the above files changed are not preset in mainline.

Honestly I have no idea how this patch got posted.

I will remove this patch in v2.

Quoted 1 line

<snip>

Signature · 2 lines
------------------
Dan Murphy
author
#11 lore raw

PATCH 1/1 OMAP5: USB_EHCI: Enable ehci support for omap5

In reply to Lokesh Vutla

Lokesh

Quoted 18 lines · Lokesh Vutla

Hi Dan,

Quoted 8 lines · Dan Murphy

From: "Govindraj.R" <[email protected]>

* Enable all usb ehci related clocks.
* Add ehci support to omap5 board file and arch specific sysc reg mask values.
* Enable config options for usb support and ethernet support

Signed-off-by Govindraj.R <[email protected]>
Quoted 8 lines
---
 arch/arm/cpu/armv7/omap5/clocks.c        |   20 +++++++++++---
 arch/arm/include/asm/arch-omap5/clocks.h |    6 ++++
 arch/arm/include/asm/arch-omap5/ehci.h   |   44 ++++++++++++++++++++++++++++++
 board/ti/omap5_evm/evm.c                 |   33 ++++++++++++++++++++++
 include/configs/omap5_evm5430.h          |   23 ++++++++++++++--
 5 files changed, 120 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-omap5/ehci.h
Quoted 2 lines

Is this based on current mainline?
Most of the above files changed are not preset in mainline.

Honestly I have no idea how this patch got posted.

I will remove this patch in v2.

Quoted 1 line

<snip>

Signature · 2 lines
------------------
Dan Murphy