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net, phy, cpsw: fix gigabit register access

PATCH In review Heiko Schocher 4 participants 5 messages Jul 23, 2013 – Jul 30, 2013

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#0 lore raw

PATCH 1/1 net, phy, cpsw: fix gigabit register access

accessing a lan9303 switch with the cpsw driver results in wrong speed detection, as the switch sets the BMSR_ERCAP in BMSR register, and follow read of the MII_STAT1000 register fails, as the switch does not support it. Current code did not check, if a phy_read() fails ... fix this.

---
 drivers/net/cpsw.c    | 2 +-
 drivers/net/phy/phy.c | 6 +++++-

2 Dateien ge?ndert, 6 Zeilen hinzugef?gt(+), 2 Zeilen entfernt(-)

drivers/net/cpsw.c +1 -1
index 379b679..52c08ed 100644
@@ -489,7 +489,7 @@ static inline void wait_for_idle(void)
 static int cpsw_mdio_read(struct mii_dev *bus, int phy_id,
 				int dev_addr, int phy_reg)
 {
-	unsigned short data;
+	int data;
 	u32 reg;
 
 	if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK)
drivers/net/phy/phy.c +5 -1
index effe3e3..2fdccb8 100644
@@ -291,7 +291,7 @@ int genphy_parse_link(struct phy_device *phydev)
 	/* We're using autonegotiation */
 	if (mii_reg & BMSR_ANEGCAPABLE) {
 		u32 lpa = 0;
-		u32 gblpa = 0;
+		int gblpa = 0;
 		u32 estatus = 0;
 
 		/* Check for gigabit capability */
@@ -300,6 +300,10 @@ int genphy_parse_link(struct phy_device *phydev)
 			 * both PHYs in the link
 			 */
 			gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
+			if (gblpa < 0) {
+				debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
+				gblpa = 0;
+			}
 			gblpa &= phy_read(phydev,
 					MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
 		}
Signature · 1 line
1.7.11.7
#1 lore raw

PATCH 1/1 net, phy, cpsw: fix gigabit register access

Quoted 18 lines · Heiko Schocher

accessing a lan9303 switch with the cpsw driver results in wrong speed detection, as the switch sets the BMSR_ERCAP in BMSR register, and follow read of the MII_STAT1000 register fails, as the switch does not support it. Current code did not check, if a phy_read() fails ... fix this.

---
 drivers/net/cpsw.c    | 2 +-
 drivers/net/phy/phy.c | 6 +++++-

2 Dateien ge?ndert, 6 Zeilen hinzugef?gt(+), 2 Zeilen entfernt(-)

drivers/net/cpsw.c +0 -0
index 379b679..52c08ed 100644

drivers/net/cpsw.c static inline void wait_for_idle(void) · line 492

Quoted 5 lines
drivers/net/cpsw.c +1 -1
@@ -489,7 +489,7 @@ static inline void wait_for_idle(void)
 static int cpsw_mdio_read(struct mii_dev *bus, int phy_id,
                                int dev_addr, int phy_reg)
 {
-       unsigned short data;
+       int data;

How is this change related to the substance of the patch?

drivers/net/cpsw.c static inline void wait_for_idle(void) · line 495

Quoted 3 lines
drivers/net/cpsw.c +0 -0
        u32 reg;
 
        if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK)

Seems OK otherwise.

-Joe

#2 lore raw

PATCH 1/1 net, phy, cpsw: fix gigabit register access

Hello Joe,

Am 24.07.2013 00:17, schrieb Joe Hershberger:

Quoted 14 lines · Heiko Schocher
Quoted 13 lines

accessing a lan9303 switch with the cpsw driver results in wrong speed detection, as the switch sets the BMSR_ERCAP in BMSR register, and follow read of the MII_STAT1000 register fails, as the switch does not support it. Current code did not check, if a phy_read() fails ... fix this.

---
  drivers/net/cpsw.c    | 2 +-
  drivers/net/phy/phy.c | 6 +++++-

2 Dateien ge?ndert, 6 Zeilen hinzugef?gt(+), 2 Zeilen entfernt(-)

Quoted 12 lines

drivers/net/cpsw.c static inline void wait_for_idle(void) · line 492

Quoted 10 lines
drivers/net/cpsw.c +1 -1
index 379b679..52c08ed 100644
@@ -489,7 +489,7 @@ static inline void wait_for_idle(void)
  static int cpsw_mdio_read(struct mii_dev *bus, int phy_id,
                                 int dev_addr, int phy_reg)
  {
-       unsigned short data;
+       int data;

How is this change related to the substance of the patch?

data is returned, and the code do:

         data = (reg & USERACCESS_ACK) ? (reg & USERACCESS_DATA) : -1;
         return data;

So if data is short only, the return value is in case, the phy read fails, 0xffff instead 0xffffffff ...

Quoted 5 lines

drivers/net/cpsw.c static inline void wait_for_idle(void)

Quoted 3 lines
drivers/net/cpsw.c +0 -0
         u32 reg;
 
         if (phy_reg&  ~PHY_REG_MASK || phy_id&  ~PHY_ID_MASK)

Seems OK otherwise.

Thanks!

bye,
Heiko

Signature · 2 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
#3 lore raw

PATCH 1/1 net, phy, cpsw: fix gigabit register access

In reply to Heiko Schocher
Quoted 8 lines · Heiko Schocher

accessing a lan9303 switch with the cpsw driver results in wrong speed detection, as the switch sets the BMSR_ERCAP in BMSR register, and follow read of the MII_STAT1000 register fails, as the switch does not support it. Current code did not check, if a phy_read() fails ... fix this.

Looks correct

Regards
Mugunthan V N

#4 lore raw
In reply to Heiko Schocher
Quoted 9 lines · Heiko Schocher

accessing a lan9303 switch with the cpsw driver results in wrong speed detection, as the switch sets the BMSR_ERCAP in BMSR register, and follow read of the MII_STAT1000 register fails, as the switch does not support it. Current code did not check, if a phy_read() fails ... fix this.

Applied to u-boot-ti/master, thanks!

Signature · 8 lines
Tom
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