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mx6: Factor out common HDMI setup code

PATCH Superseded Pardeep Kumar Singla 2 participants 3 messages Jul 24, 2013

Subsystems (2)
Arm (32-bit) Arm i.MX and Layerscape

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Pardeep Kumar Singla

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#0 lore raw

PATCH v2 1/2 mx6: Factor out common HDMI setup code

Instead of duplicating HDMI setup code for every mx6 board, factor out the common code

Signed-off-by Pardeep Kumar Singla <[email protected]>

---
Changes since v1:
Remove dev paramter from imx_enable_hdmi_phy function to make interface clearer. Boards that support auto-detect (mx6qsabrelite/nitrogen6x) are wrapping it.

 arch/arm/cpu/armv7/mx6/soc.c                  |   48 +++++++++++++++++++++++++
 arch/arm/include/asm/arch-mx6/mxc_hdmi.h      |    6 ++++
 board/boundary/nitrogen6x/nitrogen6x.c        |   43 ++++------------------
 board/freescale/mx6qsabrelite/mx6qsabrelite.c |   45 ++++-------------------
 board/wandboard/wandboard.c                   |   43 ++--------------------
 include/configs/mx6qsabrelite.h               |    1 +
 include/configs/nitrogen6x.h                  |    1 +
 include/configs/wandboard.h                   |    1 +
 8 files changed, 73 insertions(+), 115 deletions(-)
arch/arm/cpu/armv7/mx6/soc.c +48 -0
index fc436fb..2c89c59 100644
@@ -32,6 +32,8 @@
 #include <asm/imx-common/boot_mode.h>
 #include <asm/imx-common/dma.h>
 #include <stdbool.h>
+#include <asm/arch/mxc_hdmi.h>
+#include <asm/arch/crm_regs.h>
 
 struct scu_regs {
 	u32	ctrl;

@@ -228,3 +230,49 @@ const struct boot_mode soc_boot_modes[] = {
 void s_init(void)
 {
 }
+
+#ifdef CONFIG_IMX_HDMI
+void imx_enable_hdmi_phy(void)
+{
+	struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
+	u8 reg;
+	reg = readb(&hdmi->phy_conf0);
+	reg |= HDMI_PHY_CONF0_PDZ_MASK;
+	writeb(reg, &hdmi->phy_conf0);
+	udelay(3000);
+	reg |= HDMI_PHY_CONF0_ENTMDS_MASK;
+	writeb(reg, &hdmi->phy_conf0);
+	udelay(3000);
+	reg |= HDMI_PHY_CONF0_GEN2_TXPWRON_MASK;
+	writeb(reg, &hdmi->phy_conf0);
+	writeb(HDMI_MC_PHYRSTZ_ASSERT, &hdmi->mc_phyrstz);
+}
+
+void imx_setup_hdmi(void)
+{
+	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+	struct hdmi_regs *hdmi  = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
+	int reg;
+
+	/* Turn on IPU clock */
+	reg = readl(&mxc_ccm->CCGR3);
+	reg |= MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET;
+	writel(reg, &mxc_ccm->CCGR3);
+
+	/* Turn on HDMI PHY clock */
+	reg = readl(&mxc_ccm->CCGR2);
+	reg |=  MXC_CCM_CCGR2_HDMI_TX_IAHBCLK_MASK|
+		 MXC_CCM_CCGR2_HDMI_TX_ISFRCLK_MASK;
+	writel(reg, &mxc_ccm->CCGR2);
+	writeb(HDMI_MC_PHYRSTZ_DEASSERT, &hdmi->mc_phyrstz);
+	reg = readl(&mxc_ccm->chsccdr);
+	reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK|
+		 MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK|
+		 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK);
+	reg |= (CHSCCDR_PODF_DIVIDE_BY_3
+		 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET)
+		 |(CHSCCDR_IPU_PRE_CLK_540M_PFD
+		 << MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET);
+	writel(reg, &mxc_ccm->chsccdr);
+}
+#endif
arch/arm/include/asm/arch-mx6/mxc_hdmi.h +6 -0
index 9dccb3f..06e2bc4 100644
@@ -21,6 +21,12 @@
 #ifndef __MXC_HDMI_H__
 #define __MXC_HDMI_H__
 
+#ifdef CONFIG_IMX_HDMI
+#include<asm/arch/sys_proto.h>
+void imx_enable_hdmi_phy(void);
+void imx_setup_hdmi(void);
+#endif
+
 /*
  * Hdmi controller registers
  */
board/boundary/nitrogen6x/nitrogen6x.c +6 -37

75 lines not on this page · raw message

board/freescale/mx6qsabrelite/mx6qsabrelite.c +7 -38

78 lines not on this page · raw message

board/wandboard/wandboard.c +3 -40

66 lines not on this page · raw message

include/configs/mx6qsabrelite.h +1 -0
index c7db81d..6127347 100644
@@ -141,6 +141,7 @@
 #define CONFIG_BMP_16BPP
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_IPUV3_CLK 260000000
+#define CONFIG_IMX_HDMI
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
include/configs/nitrogen6x.h +1 -0
index 74df66c..0b665dc 100644
@@ -154,6 +154,7 @@
 #define CONFIG_IPUV3_CLK 260000000
 #define CONFIG_CMD_HDMIDETECT
 #define CONFIG_CONSOLE_MUX
+#define CONFIG_IMX_HDMI
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
include/configs/wandboard.h +1 -0
index dd06bd7..1f83e89 100644
@@ -100,6 +100,7 @@
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_IPUV3_CLK 260000000
+#define CONFIG_IMX_HDMI
 
 #if defined(CONFIG_MX6DL)
 #define CONFIG_DEFAULT_FDT_FILE		"imx6dl-wandboard.dtb"
Signature · 1 line
1.7.9.5
author
#1 lore raw

PATCH v2 2/2 mx6qsabresd: Add splash screen support via HDMI

Signed-off-by Pardeep Kumar Singla <[email protected]>

---
Changes since v1:
Remove dev paramter from imx_enable_hdmi_phy function to make interface clearer. Remove display_info_t structure.

 board/freescale/mx6sabresd/mx6sabresd.c |   63 ++++++++++++++++++++++++++++++-
 include/configs/mx6sabre_common.h       |    3 +-
 include/configs/mx6sabresd.h            |   19 ++++++++++
 3 files changed, 83 insertions(+), 2 deletions(-)
board/freescale/mx6sabresd/mx6sabresd.c +62 -1
index 222ee98..faab344 100644
@@ -29,7 +29,12 @@
 #include <fsl_esdhc.h>
 #include <miiphy.h>
 #include <netdev.h>
-
+#include <asm/arch/mxc_hdmi.h>
+#include <asm/arch/crm_regs.h>
+#include <linux/fb.h>
+#include <ipu_pixfmt.h>
+#include <asm/io.h>
+#include <asm/arch/sys_proto.h>
 DECLARE_GLOBAL_DATA_PTR;
 
 #define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\

@@ -239,6 +244,59 @@ int board_phy_config(struct phy_device *phydev)
 	return 0;
 }
 
+#if defined(CONFIG_VIDEO_IPUV3)
+static struct fb_videomode const hdmi = {
+	.name           = "HDMI",
+	.refresh        = 60,
+	.xres           = 1024,
+	.yres           = 768,
+	.pixclock       = 15385,
+	.left_margin    = 220,
+	.right_margin   = 40,
+	.upper_margin   = 21,
+	.lower_margin   = 7,
+	.hsync_len      = 60,
+	.vsync_len      = 10,
+	.sync           = FB_SYNC_EXT,
+	.vmode          = FB_VMODE_NONINTERLACED
+};
+
+int board_video_skip(void)
+{
+	int ret;
+
+	ret = ipuv3_fb_init(&hdmi, 0, IPU_PIX_FMT_RGB24);
+
+	if (ret)
+		printf("HDMI cannot be configured: %d\n", ret);
+
+	imx_enable_hdmi_phy();
+	return ret;
+}
+
+static void setup_display(void)
+{
+	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+	int reg;
+
+	imx_setup_hdmi();
+
+	reg = readl(&mxc_ccm->chsccdr);
+	reg |= (CHSCCDR_CLK_SEL_LDB_DI0
+		<< MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
+	writel(reg, &mxc_ccm->chsccdr);
+}
+#endif /* CONFIG_VIDEO_IPUV3 */
+
+/*
+ * Do not overwrite the console
+ * Use always serial for U-Boot console
+ */
+int overwrite_console(void)
+{
+	return 1;
+}
+
 int board_eth_init(bd_t *bis)
 {
 	int ret;

@@ -255,6 +313,9 @@ int board_eth_init(bd_t *bis)
 int board_early_init_f(void)
 {
 	setup_iomux_uart();
+#if defined(CONFIG_VIDEO_IPUV3)
+	setup_display();
+#endif
 
 	return 0;
 }
include/configs/mx6sabre_common.h +2 -1
index 53cc559..dd93fff 100644
@@ -20,6 +20,7 @@
 #define CONFIG_MX6
 
 #include "mx6_common.h"
+#include <asm/sizes.h>
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO

@@ -32,7 +33,7 @@
 #define CONFIG_REVISION_TAG
 
 /* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
 
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_LATE_INIT
include/configs/mx6sabresd.h +19 -0
index 76675f4..5637c19 100644
@@ -17,6 +17,9 @@
 #ifndef __MX6QSABRESD_CONFIG_H
 #define __MX6QSABRESD_CONFIG_H
 
+#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
+
 #define CONFIG_MACH_TYPE	3980
 #define CONFIG_MXC_UART_BASE	UART1_BASE
 #define CONFIG_CONSOLE_DEV		"ttymxc0"

@@ -31,4 +34,20 @@
 #define CONFIG_SYS_MMC_ENV_DEV		1	/* SDHC3 */
 #endif
 
+/* Framebuffer */
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_IPUV3
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_LOGO
+#define CONFIG_IPUV3_CLK 260000000
+#define CONFIG_IMX_HDMI
+
 #endif                         /* __MX6QSABRESD_CONFIG_H */
Signature · 1 line
1.7.9.5
#2 lore raw

PATCH v2 1/2 mx6: Factor out common HDMI setup code

In reply to Pardeep Kumar Singla

Hi Pardeep,

Quoted 49 lines · Pardeep Kumar Singla

Instead of duplicating HDMI setup code for every mx6 board, factor out the common code

Signed-off-by Pardeep Kumar Singla <[email protected]>

---
Changes since v1:
Remove dev paramter from imx_enable_hdmi_phy function to make interface clearer. Boards that support auto-detect (mx6qsabrelite/nitrogen6x) are wrapping it.

  arch/arm/cpu/armv7/mx6/soc.c                  |   48 +++++++++++++++++++++++++
  arch/arm/include/asm/arch-mx6/mxc_hdmi.h      |    6 ++++
  board/boundary/nitrogen6x/nitrogen6x.c        |   43 ++++------------------
  board/freescale/mx6qsabrelite/mx6qsabrelite.c |   45 ++++-------------------
  board/wandboard/wandboard.c                   |   43 ++--------------------
  include/configs/mx6qsabrelite.h               |    1 +
  include/configs/nitrogen6x.h                  |    1 +
  include/configs/wandboard.h                   |    1 +
  8 files changed, 73 insertions(+), 115 deletions(-)
arch/arm/cpu/armv7/mx6/soc.c +16 -0
index fc436fb..2c89c59 100644
@@ -32,6 +32,8 @@
  #include <asm/imx-common/boot_mode.h>
  #include <asm/imx-common/dma.h>
  #include <stdbool.h>
+#include <asm/arch/mxc_hdmi.h>
+#include <asm/arch/crm_regs.h>
 
  struct scu_regs {
  	u32	ctrl;

@@ -228,3 +230,49 @@ const struct boot_mode soc_boot_modes[] = {
  void s_init(void)
  {
  }
+
+#ifdef CONFIG_IMX_HDMI
+void imx_enable_hdmi_phy(void)
+{
+	struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
+	u8 reg;
+	reg = readb(&hdmi->phy_conf0);
+	reg |= HDMI_PHY_CONF0_PDZ_MASK;
+	writeb(reg, &hdmi->phy_conf0);
+	udelay(3000);
+	reg |= HDMI_PHY_CONF0_ENTMDS_MASK;
+	writeb(reg, &hdmi->phy_conf0);
+	udelay(3000);
+	reg |= HDMI_PHY_CONF0_GEN2_TXPWRON_MASK;

arch/arm/cpu/armv7/mx6/soc.c const struct boot_mode soc_boot_modes[] = { · line 256

Quoted 10 lines
arch/arm/cpu/armv7/mx6/soc.c +10 -0
+	writeb(reg, &hdmi->phy_conf0);
+	writeb(HDMI_MC_PHYRSTZ_ASSERT, &hdmi->mc_phyrstz);
+}
+
+void imx_setup_hdmi(void)
+{
+	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+	struct hdmi_regs *hdmi  = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
+	int reg;
+

This should probably not go here, or at least should be visible elsewhere because it's needed for boards which don't have HDMI exposed:

arch/arm/cpu/armv7/mx6/soc.c const struct boot_mode soc_boot_modes[] = { · line 261

Quoted 5 lines
arch/arm/cpu/armv7/mx6/soc.c +5 -0
+	/* Turn on IPU clock */
+	reg = readl(&mxc_ccm->CCGR3);
+	reg |= MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET;
+	writel(reg, &mxc_ccm->CCGR3);
+

If (when) someone builds a board file that doesn't have HDMI, they'll probably search a while for the

We probably want an 'enable_ipu_clock()' routine in .../cpu/mx6/clock.c.

Quoted 22 lines
arch/arm/cpu/armv7/mx6/soc.c +17 -0
+	/* Turn on HDMI PHY clock */
+	reg = readl(&mxc_ccm->CCGR2);
+	reg |=  MXC_CCM_CCGR2_HDMI_TX_IAHBCLK_MASK|
+		 MXC_CCM_CCGR2_HDMI_TX_ISFRCLK_MASK;
+	writel(reg, &mxc_ccm->CCGR2);
+	writeb(HDMI_MC_PHYRSTZ_DEASSERT, &hdmi->mc_phyrstz);
+	reg = readl(&mxc_ccm->chsccdr);
+	reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK|
+		 MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK|
+		 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK);
+	reg |= (CHSCCDR_PODF_DIVIDE_BY_3
+		 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET)
+		 |(CHSCCDR_IPU_PRE_CLK_540M_PFD
+		 << MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET);
+	writel(reg, &mxc_ccm->chsccdr);
+}
+#endif
arch/arm/include/asm/arch-mx6/mxc_hdmi.h +0 -0
index 9dccb3f..06e2bc4 100644

arch/arm/include/asm/arch-mx6/mxc_hdmi.h line 24

Quoted 4 lines
arch/arm/include/asm/arch-mx6/mxc_hdmi.h +1 -0
@@ -21,6 +21,12 @@
  #ifndef __MXC_HDMI_H__
  #define __MXC_HDMI_H__
 
+#ifdef CONFIG_IMX_HDMI

Why sys_proto.h?

arch/arm/include/asm/arch-mx6/mxc_hdmi.h line 29

Quoted 5 lines
arch/arm/include/asm/arch-mx6/mxc_hdmi.h +5 -0
+#include<asm/arch/sys_proto.h>
+void imx_enable_hdmi_phy(void);
+void imx_setup_hdmi(void);
+#endif
+

The rest looks good to me.

Regards,

Eric