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ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module

PATCH New Philipp Zabel 3 participants 5 messages Jul 24, 2013 – Jul 25, 2013

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#0 lore raw

PATCH 1/2 ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module

---
 arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +15 -0
index f5e1981..5113d29 100644
@@ -20,6 +20,20 @@
 	};
 };
 
+&ecspi3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi3_1>;
+	status = "okay";
+	fsl,spi-num-chipselects = <1>;
+	cs-gpios = <&gpio4 24 0>;
+
+	flash: m25p80 at 0 {
+		compatible = "m25p80";
+		spi-max-frequency = <20000000>;
+		reg = <0>;
+	};
+};
+
 &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
@@ -28,6 +42,7 @@
 		pinctrl_hog: hoggrp {
 			fsl,pins = <
 				MX6Q_PAD_EIM_D23__GPIO3_IO23    0x80000000
+				MX6Q_PAD_DISP0_DAT3__GPIO4_IO24	0x80000000 /* SPI NOR chipselect */
 			>;
 		};
 	};
Signature · 1 line
1.8.3.2
#1 lore raw

PATCH 2/2 ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module

This patch enables I2C1 and adds device tree nodes for the EEPROM and the DA9063 PMIC connected to this I2C bus.

---
 arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi | 91 ++++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)
arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +91 -0
index 5113d29..8d1a548 100644
@@ -34,6 +34,96 @@
 	};
 };
 
+&i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1_1>;
+	status = "okay";
+
+	eeprom at 50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+	};
+
+	pmic at 58 {
+		compatible = "dialog,da9063";
+		reg = <0x58>;
+		interrupt-parent = <&gpio4>;
+		interrupts = <17 0x8>; /* active-low GPIO4_17 */
+
+		regulators {
+			vddcore_reg: bcore1 {
+				regulator-min-microvolt = <730000>;
+				regulator-max-microvolt = <1380000>;
+				regulator-always-on;
+			};
+
+			vddsoc_reg: bcore2 {
+				regulator-min-microvolt = <730000>;
+				regulator-max-microvolt = <1380000>;
+				regulator-always-on;
+			};
+
+			vdd_ddr3_reg: bpro {
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-always-on;
+			};
+
+			vdd_3v3_reg: bperi {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vdd_buckmem_reg: bmem {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vdd_eth_reg: bio {
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-always-on;
+			};
+
+			vdd_eth_io_reg: ldo4 {
+				regulator-min-microvolt = <2500000>;
+				regulator-max-microvolt = <2500000>;
+				regulator-always-on;
+			};
+
+			vdd_mx6_snvs_reg: ldo5 {
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+			};
+
+			vdd_3v3_pmic_io_reg: ldo6 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vdd_sd0_reg: ldo9 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vdd_sd1_reg: ldo10 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vdd_mx6_high_reg: ldo11 {
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
 &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
@@ -43,6 +133,7 @@
 			fsl,pins = <
 				MX6Q_PAD_EIM_D23__GPIO3_IO23    0x80000000
 				MX6Q_PAD_DISP0_DAT3__GPIO4_IO24	0x80000000 /* SPI NOR chipselect */
+				MX6Q_PAD_DI0_PIN15__GPIO4_IO17  0x80000000 /* PMIC interrupt */
 			>;
 		};
 	};
Signature · 1 line
1.8.3.2
#2 lore raw

PATCH 1/2 ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module

In reply to Philipp Zabel

Hello.

Quoted 11 lines · Philipp Zabel
---
  arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi | 15 +++++++++++++++
  1 file changed, 15 insertions(+)
arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +0 -0
index f5e1981..5113d29 100644
@@ -20,6 +20,20 @@
  	};

arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi line 30

Quoted 10 lines
arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +8 -0
  };
 
+&ecspi3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi3_1>;
+	status = "okay";
+	fsl,spi-num-chipselects = <1>;
+	cs-gpios = <&gpio4 24 0>;
+
+	flash: m25p80 at 0 {

Quoting the EPAPR spec [1]: "The name of a node should be somewhat
generic, reflecting the function of the device and not its precise programming model. If appropriate, the name should be one of the following choices:
[...]
- flash
[...]
"

[1] http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf

WBR, Sergei

#3 lore raw

PATCH 1/2 ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module

Quoted 17 lines · Sergei Shtylyov

Hello.

Quoted 13 lines · Philipp Zabel
---
 arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +0 -0
index f5e1981..5113d29 100644
@@ -20,6 +20,20 @@
 	};
 };
 
Quoted 15 lines

arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi line 30

Quoted 8 lines
arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +8 -0
+&ecspi3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi3_1>;
+	status = "okay";
+	fsl,spi-num-chipselects = <1>;
+	cs-gpios = <&gpio4 24 0>;
+
+	flash: m25p80 at 0 {

Quoting the EPAPR spec [1]: "The name of a node should be
somewhat generic, reflecting the function of the device and not its precise programming model. If appropriate, the name should be one of the following choices:
[...]
- flash

I fixed it up and applied the series.

Shawn

#4 lore raw

PATCH 1/2 ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module

Am Donnerstag, den 25.07.2013, 10:36 +0800 schrieb Shawn Guo:

Quoted 34 lines · Sergei Shtylyov
Quoted 17 lines

Hello.

Quoted 13 lines · Philipp Zabel
---
 arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +0 -0
index f5e1981..5113d29 100644
@@ -20,6 +20,20 @@
 	};
 };
 
Quoted 15 lines

arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi line 30

Quoted 8 lines
arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +8 -0
+&ecspi3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi3_1>;
+	status = "okay";
+	fsl,spi-num-chipselects = <1>;
+	cs-gpios = <&gpio4 24 0>;
+
+	flash: m25p80 at 0 {

Quoting the EPAPR spec [1]: "The name of a node should be
somewhat generic, reflecting the function of the device and not its precise programming model. If appropriate, the name should be one of the following choices:
[...]
- flash

Quoted 1 line

I fixed it up and applied the series.

thanks
Philipp