arm, am335x: add support for siemens boards

PATCH Superseded Heiko Schocher 3 participants 11 messages Jul 30, 2013 – Aug 14, 2013

Subsystems (2)

Arm (32-bit) Watchdog device drivers

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Heiko Schocher

author

2013-07-30 07:53 UTC #0 lore raw

v3 cover arm, am335x: add support for siemens boards

add support for the am335x based boards from siemens:

dxr2:
- DDR3 128MiB
- NAND 256MiB
- Ethernet with external Switch SMSC LAN9303
- no PMIC
- internal Watchdog
- DFU support

pxm2:
- DDR2 512 MiB
- NAND 1024 MiB
- PMIC
- PHY atheros ar803x
- USB Host
- internal Watchdog
- DFU support

rut:
- DDR3 256 MiB
- NAND 256 MiB
- PMIC
- PHY natsemi dp83630
- external Watchdog
- DFU support

- changes for v2:
- add a more detailed comment, from where the files are based
- add missing (C)
- changes for v3:
- rebased against u-boot-ti commit bb2a5d8f87fffb4fadfb205837decbd1b3e75f88
- rebased against lokeshs v2 patches
- rebased arm, am33xx: add defines for gmii_sel_register bits patch, and therefore added to this patchserie
- add bd_ram_ofs to cpsw_data in board code

    needed since commit 2bf36ac638ab2db9f0295aa47064976eeebf80c1

Needed patches:

- [U-Boot] arm, spl: add watchdog library to SPL
http://patchwork.ozlabs.org/patch/248503/
reposted with this patchserie
- [U-Boot] arm, arm335x: add watchdog support
http://patchwork.ozlabs.org/patch/248504/
reposted with this patchserie
- [U-Boot,v2] arm, am33xx: add defines for gmii_sel_register bits
http://patchwork.ozlabs.org/patch/248916/
added in v3 to this patchseries as rebased against u-boot-ti
- patches from Lokesh Vutla:
[U-Boot,V2,1/4] ARM: AM33xx: Cleanup dplls data
http://patchwork.ozlabs.org/patch/263175/
[U-Boot,V2,2/4] ARM: AM33xx: Cleanup clocks layer
http://patchwork.ozlabs.org/patch/263176/
[U-Boot,V2,3/4] ARM: AM33xx: Move s_init to a common place
http://patchwork.ozlabs.org/patch/263177/
[U-Boot,V2,4/4] musb: Disable extra prints
http://patchwork.ozlabs.org/patch/263174/
- [U-Boot,v5] dfu, nand, ubi: add partubi alt settings for updating ubi partition
http://patchwork.ozlabs.org/patch/261583/
- [U-Boot] net, phy, cpsw: fix gigabit register access
http://patchwork.ozlabs.org/patch/261087/

Tested patches with this patch:
- [U-Boot] dfu: Implementation of target reset after communication with dfu-util's -R switch
http://patchwork.ozlabs.org/patch/260041/
- [U-Boot] ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5
http://patchwork.ozlabs.org/patch/253185/

Heiko Schocher (4):
arm, am33xx: add defines for gmii_sel_register bits arm, spl: add watchdog library to SPL
arm, am335x: add watchdog support
arm, am335x: add support for 3 siemens boards

 MAINTAINERS                            |   5 +
 arch/arm/include/asm/arch-am33xx/cpu.h |  41 +++
 board/isee/igep0033/board.c            |   6 +-
 board/phytec/pcm051/board.c            |   2 -
 board/siemens/common/board.c           | 167 ++++++++++++
 board/siemens/common/factoryset.c      | 268 +++++++++++++++++++
 board/siemens/common/factoryset.h      |  21 ++
 board/siemens/dxr2/Makefile            |  49 ++++
 board/siemens/dxr2/board.c             | 241 +++++++++++++++++
 board/siemens/dxr2/board.h             |  69 +++++
 board/siemens/dxr2/mux.c               | 112 ++++++++
 board/siemens/pxm2/Makefile            |  49 ++++
 board/siemens/pxm2/board.c             | 238 +++++++++++++++++
 board/siemens/pxm2/board.h             |  22 ++
 board/siemens/pxm2/mux.c               | 140 ++++++++++
 board/siemens/pxm2/pmic.h              |  71 +++++
 board/siemens/rut/Makefile             |  49 ++++
 board/siemens/rut/board.c              | 180 +++++++++++++
 board/siemens/rut/board.h              |  22 ++
 board/siemens/rut/mux.c                | 341 ++++++++++++++++++++++++
 board/ti/am335x/board.c                |   6 +-
 boards.cfg                             |   3 +
 doc/README.SPL                         |   2 +-
 drivers/watchdog/Makefile              |   1 +
 drivers/watchdog/omap_wdt.c            | 121 +++++++++
 include/configs/dxr2.h                 |  94 +++++++
 include/configs/pxm2.h                 | 134 ++++++++++
 include/configs/rut.h                  | 135 ++++++++++
 include/configs/siemens-am33x-common.h | 464 +++++++++++++++++++++++++++++++++
 spl/Makefile                           |   1 +
 30 Dateien ge?ndert, 3042 Zeilen hinzugef?gt(+), 12 Zeilen entfernt(-)
 create mode 100644 board/siemens/common/board.c
 create mode 100644 board/siemens/common/factoryset.c
 create mode 100644 board/siemens/common/factoryset.h
 create mode 100644 board/siemens/dxr2/Makefile
 create mode 100644 board/siemens/dxr2/board.c
 create mode 100644 board/siemens/dxr2/board.h
 create mode 100644 board/siemens/dxr2/mux.c
 create mode 100644 board/siemens/pxm2/Makefile
 create mode 100644 board/siemens/pxm2/board.c
 create mode 100644 board/siemens/pxm2/board.h
 create mode 100644 board/siemens/pxm2/mux.c
 create mode 100644 board/siemens/pxm2/pmic.h
 create mode 100644 board/siemens/rut/Makefile
 create mode 100644 board/siemens/rut/board.c
 create mode 100644 board/siemens/rut/board.h
 create mode 100644 board/siemens/rut/mux.c
 create mode 100644 drivers/watchdog/omap_wdt.c
 create mode 100644 include/configs/dxr2.h
 create mode 100644 include/configs/pxm2.h
 create mode 100644 include/configs/rut.h
 create mode 100644 include/configs/siemens-am33x-common.h

Cc Tom Rini <[email protected]>

Signature · 1 line

1.7.11.7

Heiko Schocher

author

2013-07-30 07:53 UTC #1 lore raw

PATCH v3 1/4 arm, am33xx: add defines for gmii_sel_register bits

Signed-off-by Heiko Schocher <[email protected]>

---
- changes for v2:
defined all bits used in the gmii_sel register as
Tom Rini suggested
- changes for v3:
rebased against u-boot-ti commit bb2a5d8f87fffb4fadfb205837decbd1b3e75f88

---
 arch/arm/include/asm/arch-am33xx/cpu.h | 21 +++++++++++++++++++++
 board/isee/igep0033/board.c            |  6 ++----
 board/phytec/pcm051/board.c            |  2 --
 board/ti/am335x/board.c                |  6 +-----

4 Dateien ge?ndert, 24 Zeilen hinzugef?gt(+), 11 Zeilen entfernt(-)

arch/arm/include/asm/arch-am33xx/cpu.h +21 -0

index bcb4c50..945a09b 100644
@@ -336,6 +336,27 @@ struct ctrl_dev {
 	unsigned int resv4[4];
 	unsigned int miisel;		/* offset 0x50 */
 };
+
+/* gmii_sel register defines */
+#define GMII1_SEL_MII		0x0
+#define GMII1_SEL_RMII		0x1
+#define GMII1_SEL_RGMII		0x2
+#define GMII1_SEL_NOTUSED	0x3
+#define GMII2_SEL_MII		0x0
+#define GMII2_SEL_RMII		0x4
+#define GMII2_SEL_RGMII		0x8
+#define GMII2_SEL_NOTUSED	0xc
+#define RGMII1_IDMODE		BIT(4)
+#define RGMII2_IDMODE		BIT(5)
+#define RMII1_IO_CLK_EN		BIT(6)
+#define RMII2_IO_CLK_EN		BIT(7)
+
+#define MII_MODE_ENABLE		(GMII1_SEL_MII | GMII2_SEL_MII)
+#define RMII_MODE_ENABLE        (GMII1_SEL_RMII | GMII2_SEL_RMII)
+#define RGMII_MODE_ENABLE	(GMII1_SEL_RGMII | GMII2_SEL_RGMII)
+#define RGMII_INT_DELAY		(RGMII1_IDMODE | RGMII2_IDMODE)
+#define RMII_CHIPCKL_ENABLE     (RMII1_IO_CLK_EN | RMII2_IO_CLK_EN)
+
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL_STRICT_NAMES */

board/isee/igep0033/board.c +2 -4

index f71aaa0..bdb4745 100644
@@ -27,9 +27,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* MII mode defines */
-#define RMII_MODE_ENABLE	0x4D
-
 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 
 #ifdef CONFIG_SPL_BUILD

@@ -158,7 +155,8 @@ int board_eth_init(bd_t *bis)
 			eth_setenv_enetaddr("ethaddr", mac_addr);
 	}
 
-	writel(RMII_MODE_ENABLE, &cdev->miisel);
+	writel((GMII1_SEL_RMII | GMII2_SEL_NOTUSED | RMII1_IO_CLK_EN),
+	       &cdev->miisel);
 
 	rv = cpsw_register(&cpsw_data);
 	if (rv < 0)

board/phytec/pcm051/board.c +0 -2

index f3bad76..275fe82 100644
@@ -31,8 +31,6 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 /* MII mode defines */
-#define MII_MODE_ENABLE		0x0
-#define RGMII_MODE_ENABLE	0xA
 #define RMII_RGMII2_MODE_ENABLE	0x49
 
 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;

board/ti/am335x/board.c +1 -5

index eac9cc9..b2bec34 100644
@@ -30,10 +30,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* MII mode defines */
-#define MII_MODE_ENABLE		0x0
-#define RGMII_MODE_ENABLE	0x3A
-
 /* GPIO that controls power to DDR on EVM-SK */
 #define GPIO_DDR_VTT_EN		7

@@ -460,7 +456,7 @@ int board_eth_init(bd_t *bis)
 		cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
 				PHY_INTERFACE_MODE_MII;
 	} else {
-		writel(RGMII_MODE_ENABLE, &cdev->miisel);
+		writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel);
 		cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
 				PHY_INTERFACE_MODE_RGMII;
 	}

Signature · 1 line

1.7.11.7

Mugunthan V N

2013-07-30 08:40 UTC #2 lore raw

PATCH v3 1/4 arm, am33xx: add defines for gmii_sel_register bits

Quoted 20 lines · Heiko Schocher

Signed-off-by Heiko Schocher <[email protected]>
---
- changes for v2:
defined all bits used in the gmii_sel register as
Tom Rini suggested
- changes for v3:
rebased against u-boot-ti commit bb2a5d8f87fffb4fadfb205837decbd1b3e75f88
---
 arch/arm/include/asm/arch-am33xx/cpu.h | 21 +++++++++++++++++++++
 board/isee/igep0033/board.c            |  6 ++----
 board/phytec/pcm051/board.c            |  2 --
 board/ti/am335x/board.c                |  6 +-----
4 Dateien ge?ndert, 24 Zeilen hinzugef?gt(+), 11 Zeilen entfernt(-)
arch/arm/include/asm/arch-am33xx/cpu.h +0 -0
index bcb4c50..945a09b 100644

arch/arm/include/asm/arch-am33xx/cpu.h struct ctrl_dev { · line 344

Quoted 9 lines

arch/arm/include/asm/arch-am33xx/cpu.h +6 -0

@@ -336,6 +336,27 @@ struct ctrl_dev {
 	unsigned int resv4[4];
 	unsigned int miisel;		/* offset 0x50 */
 };
+
+/* gmii_sel register defines */
+#define GMII1_SEL_MII		0x0
+#define GMII1_SEL_RMII		0x1
+#define GMII1_SEL_RGMII		0x2
+#define GMII1_SEL_NOTUSED	0x3

NOTUSED not needed as it is not supposed to be used.

arch/arm/include/asm/arch-am33xx/cpu.h struct ctrl_dev { · line 348

Quoted 4 lines

arch/arm/include/asm/arch-am33xx/cpu.h +4 -0

+#define GMII2_SEL_MII		0x0
+#define GMII2_SEL_RMII		0x4
+#define GMII2_SEL_RGMII		0x8
+#define GMII2_SEL_NOTUSED	0xc

NOTUSED not needed as it is not supposed to be used.

Quoted 75 lines

arch/arm/include/asm/arch-am33xx/cpu.h +11 -0

+#define RGMII1_IDMODE		BIT(4)
+#define RGMII2_IDMODE		BIT(5)
+#define RMII1_IO_CLK_EN		BIT(6)
+#define RMII2_IO_CLK_EN		BIT(7)
+
+#define MII_MODE_ENABLE		(GMII1_SEL_MII | GMII2_SEL_MII)
+#define RMII_MODE_ENABLE        (GMII1_SEL_RMII | GMII2_SEL_RMII)
+#define RGMII_MODE_ENABLE	(GMII1_SEL_RGMII | GMII2_SEL_RGMII)
+#define RGMII_INT_DELAY		(RGMII1_IDMODE | RGMII2_IDMODE)
+#define RMII_CHIPCKL_ENABLE     (RMII1_IO_CLK_EN | RMII2_IO_CLK_EN)
+
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL_STRICT_NAMES */

board/isee/igep0033/board.c +2 -4

index f71aaa0..bdb4745 100644
@@ -27,9 +27,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* MII mode defines */
-#define RMII_MODE_ENABLE	0x4D
-
 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 
 #ifdef CONFIG_SPL_BUILD

@@ -158,7 +155,8 @@ int board_eth_init(bd_t *bis)
 			eth_setenv_enetaddr("ethaddr", mac_addr);
 	}
 
-	writel(RMII_MODE_ENABLE, &cdev->miisel);
+	writel((GMII1_SEL_RMII | GMII2_SEL_NOTUSED | RMII1_IO_CLK_EN),
+	       &cdev->miisel);
 
 	rv = cpsw_register(&cpsw_data);
 	if (rv < 0)

board/phytec/pcm051/board.c +0 -2

index f3bad76..275fe82 100644
@@ -31,8 +31,6 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 /* MII mode defines */
-#define MII_MODE_ENABLE		0x0
-#define RGMII_MODE_ENABLE	0xA
 #define RMII_RGMII2_MODE_ENABLE	0x49
 
 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;

board/ti/am335x/board.c +1 -5

index eac9cc9..b2bec34 100644
@@ -30,10 +30,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* MII mode defines */
-#define MII_MODE_ENABLE		0x0
-#define RGMII_MODE_ENABLE	0x3A
-
 /* GPIO that controls power to DDR on EVM-SK */
 #define GPIO_DDR_VTT_EN		7

@@ -460,7 +456,7 @@ int board_eth_init(bd_t *bis)
 		cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
 				PHY_INTERFACE_MODE_MII;
 	} else {
-		writel(RGMII_MODE_ENABLE, &cdev->miisel);
+		writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel);
 		cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
 				PHY_INTERFACE_MODE_RGMII;
 	}

Heiko Schocher

author

2013-07-31 06:20 UTC #3 lore raw

PATCH v3 1/4 arm, am33xx: add defines for gmii_sel_register bits

Hello Mugunthan,

Am 30.07.2013 10:40, schrieb Mugunthan V N:

Quoted 16 lines · Heiko Schocher

Quoted 15 lines
Signed-off-by Heiko Schocher<[email protected]>
---
- changes for v2:
defined all bits used in the gmii_sel register as Tom Rini suggested
- changes for v3:
   rebased against u-boot-ti commit bb2a5d8f87fffb4fadfb205837decbd1b3e75f88
---
  arch/arm/include/asm/arch-am33xx/cpu.h | 21 +++++++++++++++++++++
  board/isee/igep0033/board.c            |  6 ++----
  board/phytec/pcm051/board.c            |  2 --
  board/ti/am335x/board.c                |  6 +-----
4 Dateien ge?ndert, 24 Zeilen hinzugef?gt(+), 11 Zeilen entfernt(-)

Quoted 15 lines

Quoted 5 lines
arch/arm/include/asm/arch-am33xx/cpu.h +0 -0
index bcb4c50..945a09b 100644
arch/arm/include/asm/arch-am33xx/cpu.h struct ctrl_dev { · line 344
Quoted 9 lines
arch/arm/include/asm/arch-am33xx/cpu.h +6 -0
@@ -336,6 +336,27 @@ struct ctrl_dev {
  	unsigned int resv4[4];
  	unsigned int miisel;		/* offset 0x50 */
  };
+
+/* gmii_sel register defines */
+#define GMII1_SEL_MII		0x0
+#define GMII1_SEL_RMII		0x1
+#define GMII1_SEL_RGMII		0x2
+#define GMII1_SEL_NOTUSED	0x3
NOTUSED not needed as it is not supposed to be used.

Maybe it is used to check, that is it not set?
But I can remove it ...

Quoted 5 lines

arch/arm/include/asm/arch-am33xx/cpu.h struct ctrl_dev { · line 348
Quoted 4 lines
arch/arm/include/asm/arch-am33xx/cpu.h +4 -0
+#define GMII2_SEL_MII		0x0
+#define GMII2_SEL_RMII		0x4
+#define GMII2_SEL_RGMII		0x8
+#define GMII2_SEL_NOTUSED	0xc
NOTUSED not needed as it is not supposed to be used.

same here ...

bye,
Heiko

Signature · 2 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

Tom Rini

2013-08-12 14:22 UTC #4 lore raw

PATCH v3 1/4 arm, am33xx: add defines for gmii_sel_register bits

Quoted 38 lines · Heiko Schocher

Hello Mugunthan,
Am 30.07.2013 10:40, schrieb Mugunthan V N:
Quoted 16 lines · Heiko Schocher
Quoted 15 lines
Signed-off-by Heiko Schocher<[email protected]>
---
- changes for v2:
defined all bits used in the gmii_sel register as
Tom Rini suggested
- changes for v3:
rebased against u-boot-ti commit bb2a5d8f87fffb4fadfb205837decbd1b3e75f88
---
 arch/arm/include/asm/arch-am33xx/cpu.h | 21 +++++++++++++++++++++
 board/isee/igep0033/board.c            |  6 ++----
 board/phytec/pcm051/board.c            |  2 --
 board/ti/am335x/board.c                |  6 +-----
4 Dateien ge??ndert, 24 Zeilen hinzugef??gt(+), 11 Zeilen entfernt(-)
Quoted 15 lines
Quoted 5 lines
arch/arm/include/asm/arch-am33xx/cpu.h +0 -0
index bcb4c50..945a09b 100644
arch/arm/include/asm/arch-am33xx/cpu.h struct ctrl_dev { · line 344
Quoted 9 lines
arch/arm/include/asm/arch-am33xx/cpu.h +6 -0
@@ -336,6 +336,27 @@ struct ctrl_dev {
 	unsigned int resv4[4];
 	unsigned int miisel;		/* offset 0x50 */
 };
+
+/* gmii_sel register defines */
+#define GMII1_SEL_MII		0x0
+#define GMII1_SEL_RMII		0x1
+#define GMII1_SEL_RGMII		0x2
+#define GMII1_SEL_NOTUSED	0x3
NOTUSED not needed as it is not supposed to be used.
Maybe it is used to check, that is it not set?
But I can remove it ...

Quoted 7 lines

Quoted 5 lines
arch/arm/include/asm/arch-am33xx/cpu.h struct ctrl_dev { · line 348
Quoted 4 lines
arch/arm/include/asm/arch-am33xx/cpu.h +4 -0
+#define GMII2_SEL_MII		0x0
+#define GMII2_SEL_RMII		0x4
+#define GMII2_SEL_RGMII		0x8
+#define GMII2_SEL_NOTUSED	0xc
NOTUSED not needed as it is not supposed to be used.
same here ...

I think "Not Used" in the TRM here means "this port is not used" rather than "this combination of bits is not to be used", so the changes are correct.

Signature · 8 lines

Tom
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Mugunthan V N

2013-08-12 17:36 UTC #5 lore raw

PATCH v3 1/4 arm, am33xx: add defines for gmii_sel_register bits

Quoted 10 lines · Tom Rini

Quoted 7 lines
Quoted 7 lines
Quoted 5 lines
+#define GMII2_SEL_MII 0x0
Quoted 4 lines
Quoted 3 lines
arch/arm/include/asm/arch-am33xx/cpu.h struct ctrl_dev { · line 348
Quoted 3 lines
arch/arm/include/asm/arch-am33xx/cpu.h +3 -0
+#define GMII2_SEL_RMII		0x4
+#define GMII2_SEL_RGMII		0x8
+#define GMII2_SEL_NOTUSED	0xc
NOTUSED not needed as it is not supposed to be used.
same here ...
I think "Not Used" in the TRM here means "this port is not used" rather than "this combination of bits is not to be used", so the changes are correct.

But having this define is not useful as far as I can think of as there is not abstraction API for this to check what user is passing. But I leave it to Tom's decision to have this change or not.

Other than this the patch looks good to me.

Acked-by Mugunthan V N <[email protected]>

Regards
Mugunthan V N

Mugunthan V N

2013-08-14 06:29 UTC #6 lore raw

PATCH v3 1/4 arm, am33xx: add defines for gmii_sel_register bits

Quoted 10 lines · Mugunthan V N

Quoted 9 lines · Tom Rini
Quoted 6 lines
Quoted 6 lines
Quoted 5 lines
+#define GMII2_SEL_MII 0x0
Quoted 4 lines
Quoted 3 lines
arch/arm/include/asm/arch-am33xx/cpu.h struct ctrl_dev { · line 348
Quoted 3 lines
arch/arm/include/asm/arch-am33xx/cpu.h +3 -0
+#define GMII2_SEL_RMII		0x4
+#define GMII2_SEL_RGMII		0x8
+#define GMII2_SEL_NOTUSED	0xc
NOTUSED not needed as it is not supposed to be used.
same here ...
I think "Not Used" in the TRM here means "this port is not used" rather than "this combination of bits is not to be used", so the changes are correct.

Quoted 8 lines

But having this define is not useful as far as I can think of as there is not abstraction API for this to check what user is passing. But I leave it to Tom's decision to have this change or not.
Other than this the patch looks good to me.
Acked-by Mugunthan V N <[email protected]>

I had a discussion with the hardware team internally and the comment is *When these bits are set to 11b the RGMII is selected with internal delay mode which was not timing closed. Therefore this register setting is not supported so it should not be used. The respective pin multiplexing should be used to deselect any unused CPGMAC pins.*c The same will be updated in the TRM soon. So can you remove NOTUSED define and resubmit the patch again and can include my Acked-by in your next version patch.

Regards
Mugunthan V N

Tom Rini

2013-08-14 13:51 UTC #7 lore raw

PATCH v3 1/4 arm, am33xx: add defines for gmii_sel_register bits

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Quoted 20 lines · Mugunthan V N

Quoted 10 lines · Mugunthan V N
Quoted 9 lines · Tom Rini
Quoted 6 lines
Quoted 6 lines
Quoted 5 lines
+#define GMII2_SEL_MII 0x0
Quoted 4 lines
Quoted 3 lines
Quoted 3 lines
+#define GMII2_SEL_RMII 0x4 +#define
GMII2_SEL_RGMII 0x8 +#define GMII2_SEL_NOTUSED
0xc
NOTUSED not needed as it is not supposed to be used.
same here ...
I think "Not Used" in the TRM here means "this port is not used" rather than "this combination of bits is not to be used", so the changes are correct.
Quoted 9 lines
But having this define is not useful as far as I can think of as there is not abstraction API for this to check what user is passing. But I leave it to Tom's decision to have this change or not.
Other than this the patch looks good to me. Acked-by: Mugunthan V N <[email protected]>

Quoted 8 lines

I had a discussion with the hardware team internally and the comment is *When these bits are set to 11b the RGMII is selected with internal delay mode which was not timing closed. Therefore this register setting is not supported so it should not be used. The respective pin multiplexing should be used to deselect any unused CPGMAC pins.*c The same will be updated in the TRM soon. So can you remove NOTUSED define and resubmit the patch again and can include my Acked-by in your next version patch.

Along with fixing the boards that set these bits to not set them please, thanks!

- --
Tom
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Heiko Schocher

author

2013-07-30 07:53 UTC #8 lore raw

PATCH v3 2/4 arm, spl: add watchdog library to SPL

In reply to Heiko Schocher

Signed-off-by Heiko Schocher <[email protected]>

Cc Tom Rini <[email protected]>

---
- changes for v2:
none
- changes for v3:
rebased against u-boot-ti commit bb2a5d8f87fffb4fadfb205837decbd1b3e75f88

---
 doc/README.SPL | 2 +-
 spl/Makefile   | 1 +

2 Dateien ge?ndert, 2 Zeilen hinzugef?gt(+), 1 Zeile entfernt(-)

doc/README.SPL +1 -1

index ac9a213..312a6a6 100644
@@ -67,7 +67,7 @@ CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o)
 CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/nand_spl_load.o)
 CONFIG_SPL_SPI_LOAD (drivers/mtd/spi/spi_spl_load.o)
 CONFIG_SPL_RAM_DEVICE (common/spl/spl.c)
-
+CONFIG_SPL_WATCHDOG_SUPPORT (drivers/watchdog/libwatchdog.o)
 
 Normally CPU is assumed to be the same between the SPL and normal
 u-boot build.  However it is possible to specify a different CPU for

spl/Makefile +1 -0

index 6e5299b..9a46e7e 100644
@@ -82,6 +82,7 @@ LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/libnet.o
 LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/phy/libphy.o
 LIBS-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += drivers/usb/musb-new/libusb_musb-new.o
 LIBS-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/usb/gadget/libusb_gadget.o
+LIBS-$(CONFIG_SPL_WATCHDOG_SUPPORT) += drivers/watchdog/libwatchdog.o
 
 ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
 LIBS-y += $(CPUDIR)/omap-common/libomap-common.o

Signature · 1 line

1.7.11.7

Heiko Schocher

author

2013-07-30 07:53 UTC #9 lore raw

PATCH v3 3/4 arm, am335x: add watchdog support

In reply to Heiko Schocher

Add TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog support.

Signed-off-by Heiko Schocher <[email protected]>

Reviewed-by Tom Rini <[email protected]>

Cc Albert Aribaud <[email protected]>

---
- changes for v2:
- add Reviedwed-by from Tom Rini
- fixed subject
- add SPDX-License-Identifier
- changes for v3:
- add a more detailed comment, from where this file is based
- fixed SPDX-License-Identifier to GPL-2.0
- changes for v4:
rebased against u-boot-ti commit bb2a5d8f87fffb4fadfb205837decbd1b3e75f88

---
 arch/arm/include/asm/arch-am33xx/cpu.h |  20 ++++++
 drivers/watchdog/Makefile              |   1 +
 drivers/watchdog/omap_wdt.c            | 121 +++++++++++++++++++++++++++++++++
 3 Dateien ge?ndert, 142 Zeilen hinzugef?gt(+)
 create mode 100644 drivers/watchdog/omap_wdt.c

arch/arm/include/asm/arch-am33xx/cpu.h +20 -0

index 945a09b..ce24080 100644
@@ -53,6 +53,26 @@
 #define PRM_RSTCTRL_RESET		0x01
 #define PRM_RSTST_WARM_RESET_MASK	0x232
 
+/*
+ * Watchdog:
+ * Using the prescaler, the OMAP watchdog could go for many
+ * months before firing.  These limits work without scaling,
+ * with the 60 second default assumed by most tools and docs.
+ */
+#define TIMER_MARGIN_MAX	(24 * 60 * 60)	/* 1 day */
+#define TIMER_MARGIN_DEFAULT	60	/* 60 secs */
+#define TIMER_MARGIN_MIN	1
+
+#define PTV			0	/* prescale */
+#define GET_WLDR_VAL(secs)	(0xffffffff - ((secs) * (32768/(1<<PTV))) + 1)
+#define WDT_WWPS_PEND_WCLR	BIT(0)
+#define WDT_WWPS_PEND_WLDR	BIT(2)
+#define WDT_WWPS_PEND_WTGR	BIT(3)
+#define WDT_WWPS_PEND_WSPR	BIT(4)
+
+#define WDT_WCLR_PRE		BIT(5)
+#define WDT_WCLR_PTV_OFF	2
+
 #ifndef __KERNEL_STRICT_NAMES
 #ifndef __ASSEMBLY__
 struct gpmc_cs {

drivers/watchdog/Makefile +1 -0

index 7e255ce..3ade624 100644
@@ -18,6 +18,7 @@ COBJS-$(CONFIG_TNETV107X_WATCHDOG) += tnetv107x_wdt.o
 COBJS-$(CONFIG_S5P)               += s5p_wdt.o
 COBJS-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
 COBJS-$(CONFIG_BFIN_WATCHDOG)  += bfin_wdt.o
+COBJS-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(COBJS:.o=.c)

drivers/watchdog/omap_wdt.c new file +121 -0

121 lines not on this page · raw message

Signature · 1 line

1.7.11.7

Heiko Schocher

author

2013-07-30 07:53 UTC #10 lore raw

PATCH v3 4/4 arm, am335x: add support for 3 siemens boards

In reply to Heiko Schocher

add support for the am335x based boards from siemens:

dxr2:
- DDR3 128MiB
- NAND 256MiB
- Ethernet with external Switch SMSC LAN9303
- no PMIC
- internal Watchdog
- DFU support

pxm2:
- DDR2 512 MiB
- NAND 1024 MiB
- PMIC
- PHY atheros ar803x
- USB Host
- internal Watchdog
- DFU support

rut:
- DDR3 256 MiB
- NAND 256 MiB
- PMIC
- PHY natsemi dp83630
- external Watchdog
- DFU support

Signed-off-by Heiko Schocher <[email protected]>

Signed-off-by Roger Meier <[email protected]>

Signed-off-by Samuel Egli <[email protected]>

Cc Pascal Bach <[email protected]>

Cc Tom Rini <[email protected]>

---

- changes for v2:
- add a more detailed comment, from where the files are based
- add missing (C)
- changes for v3:
- rebased against u-boot-ti commit bb2a5d8f87fffb4fadfb205837decbd1b3e75f88
- updated with lokeshs v2 patches
- rebased arm, am33xx: add defines for gmii_sel_register bits patch, and therefore added to this patchserie
- add bd_ram_ofs to cpsw_data in board code

    needed since commit 2bf36ac638ab2db9f0295aa47064976eeebf80c1

Needed patches:

 MAINTAINERS                            |   5 +
 board/siemens/common/board.c           | 167 ++++++++++++
 board/siemens/common/factoryset.c      | 268 +++++++++++++++++++
 board/siemens/common/factoryset.h      |  21 ++
 board/siemens/dxr2/Makefile            |  49 ++++
 board/siemens/dxr2/board.c             | 241 +++++++++++++++++
 board/siemens/dxr2/board.h             |  69 +++++
 board/siemens/dxr2/mux.c               | 112 ++++++++
 board/siemens/pxm2/Makefile            |  49 ++++
 board/siemens/pxm2/board.c             | 238 +++++++++++++++++
 board/siemens/pxm2/board.h             |  22 ++
 board/siemens/pxm2/mux.c               | 140 ++++++++++
 board/siemens/pxm2/pmic.h              |  71 +++++
 board/siemens/rut/Makefile             |  49 ++++
 board/siemens/rut/board.c              | 180 +++++++++++++
 board/siemens/rut/board.h              |  22 ++
 board/siemens/rut/mux.c                | 341 ++++++++++++++++++++++++
 boards.cfg                             |   3 +
 include/configs/dxr2.h                 |  94 +++++++
 include/configs/pxm2.h                 | 134 ++++++++++
 include/configs/rut.h                  | 135 ++++++++++
 include/configs/siemens-am33x-common.h | 464 +++++++++++++++++++++++++++++++++
 22 Dateien ge?ndert, 2874 Zeilen hinzugef?gt(+)
 create mode 100644 board/siemens/common/board.c
 create mode 100644 board/siemens/common/factoryset.c
 create mode 100644 board/siemens/common/factoryset.h
 create mode 100644 board/siemens/dxr2/Makefile
 create mode 100644 board/siemens/dxr2/board.c
 create mode 100644 board/siemens/dxr2/board.h
 create mode 100644 board/siemens/dxr2/mux.c
 create mode 100644 board/siemens/pxm2/Makefile
 create mode 100644 board/siemens/pxm2/board.c
 create mode 100644 board/siemens/pxm2/board.h
 create mode 100644 board/siemens/pxm2/mux.c
 create mode 100644 board/siemens/pxm2/pmic.h
 create mode 100644 board/siemens/rut/Makefile
 create mode 100644 board/siemens/rut/board.c
 create mode 100644 board/siemens/rut/board.h
 create mode 100644 board/siemens/rut/mux.c
 create mode 100644 include/configs/dxr2.h
 create mode 100644 include/configs/pxm2.h
 create mode 100644 include/configs/rut.h
 create mode 100644 include/configs/siemens-am33x-common.h

MAINTAINERS +5 -0

index 081cf96..022cb70 100644
@@ -1082,6 +1082,11 @@ Sergey Yanovich <[email protected]>
 
 	lp8x4x		xscale/pxa
 
+Roger Meier <[email protected]>
+	dxr2			ARM ARMV7 (AM335x SoC)
+	pxm2			ARM ARMV7 (AM335x SoC)
+	rut			ARM ARMV7 (AM335x SoC)
+
 -------------------------------------------------------------------------
 
 Unknown / orphaned boards:

board/siemens/common/board.c new file +167 -0

167 lines not on this page · raw message

board/siemens/common/factoryset.c new file +268 -0

268 lines not on this page · raw message

board/siemens/common/factoryset.h new file +21 -0

new file mode 100644
index 0000000..42cc0a9
@@ -0,0 +1,21 @@
+/*
+ * Common board functions for siemens AM335X based boards
+ * (C) Copyright 2013 Siemens Schweiz AG
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __FACTORYSET_H
+#define __FACTORYSET_H
+
+struct factorysetcontainer {
+	uchar mac[6];
+	int usb_vendor_id;
+	int usb_product_id;
+};
+
+int factoryset_read_eeprom(int i2c_addr);
+int factoryset_setenv(void);
+extern struct factorysetcontainer factory_dat;
+
+#endif /* __FACTORYSET_H */

board/siemens/dxr2/Makefile new file +49 -0

49 lines not on this page · raw message

board/siemens/dxr2/board.c new file +241 -0

241 lines not on this page · raw message

board/siemens/dxr2/board.h new file +69 -0

69 lines not on this page · raw message

board/siemens/dxr2/mux.c new file +112 -0

112 lines not on this page · raw message

board/siemens/pxm2/Makefile new file +49 -0

49 lines not on this page · raw message

board/siemens/pxm2/board.c new file +238 -0

238 lines not on this page · raw message

board/siemens/pxm2/board.h new file +22 -0

new file mode 100644
index 0000000..0362612
@@ -0,0 +1,22 @@
+/*
+ * board.h
+ *
+ * (C) Copyright 2013 Siemens Schweiz AG
+ * (C) Heiko Schocher, DENX Software Engineering, hs at denx.de.
+ *
+ * Based on:
+ * TI AM335x boards information header
+ * u-boot:/board/ti/am335x/board.h
+ *
+ * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+void enable_uart0_pin_mux(void);
+void enable_i2c0_pin_mux(void);
+void enable_board_pin_mux(void);
+#endif

board/siemens/pxm2/mux.c new file +140 -0

140 lines not on this page · raw message

board/siemens/pxm2/pmic.h new file +71 -0

71 lines not on this page · raw message

board/siemens/rut/Makefile new file +49 -0

49 lines not on this page · raw message

board/siemens/rut/board.c new file +180 -0

180 lines not on this page · raw message

board/siemens/rut/board.h new file +22 -0

new file mode 100644
index 0000000..0362612
@@ -0,0 +1,22 @@
+/*
+ * board.h
+ *
+ * (C) Copyright 2013 Siemens Schweiz AG
+ * (C) Heiko Schocher, DENX Software Engineering, hs at denx.de.
+ *
+ * Based on:
+ * TI AM335x boards information header
+ * u-boot:/board/ti/am335x/board.h
+ *
+ * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+void enable_uart0_pin_mux(void);
+void enable_i2c0_pin_mux(void);
+void enable_board_pin_mux(void);
+#endif

board/siemens/rut/mux.c new file +341 -0

341 lines not on this page · raw message

boards.cfg +3 -0

index 211ed58..3f11f1d 100644
@@ -252,6 +252,9 @@ am335x_evm_uart4             arm         armv7       am335x              ti
 am335x_evm_uart5             arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL6,CONS_INDEX=1,NAND
 am335x_evm_usbspl            arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,NAND,SPL_USBETH_SUPPORT
 am335x_boneblack             arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,EMMC_BOOT
+dxr2                         arm         armv7       dxr2                siemens        am33xx
+pxm2                         arm         armv7       pxm2                siemens        am33xx
+rut                          arm         armv7       rut                 siemens        am33xx
 ti814x_evm                   arm         armv7       ti814x              ti             am33xx
 pcm051                       arm         armv7       pcm051              phytec         am33xx      pcm051
 sama5d3xek_mmc               arm         armv7       sama5d3xek          atmel          at91        sama5d3xek:SAMA5D3,SYS_USE_MMC

include/configs/dxr2.h new file +94 -0

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include/configs/pxm2.h new file +134 -0

134 lines not on this page · raw message

include/configs/rut.h new file +135 -0

135 lines not on this page · raw message

include/configs/siemens-am33x-common.h new file +464 -0

464 lines not on this page · raw message

Signature · 1 line

1.7.11.7