ASoC: Add Freescale i.MX S/PDIF controller driver

new file mode 100644
index 0000000..a655800
@@ -0,0 +1,63 @@
+Freescale Sony/Philips Digital Interface Format (S/PDIF) Controller
+
+The Freescale S/PDIF audio block is a stereo transceiver that allows the
+processor to receive and transmit digital audio via an coaxial cable or
+a fibre cable.
+
+Required properties:
+
+  - compatible : Compatible list, contains "fsl,spdif".
+
+  - reg : Offset and length of the register set for the device.
+
+  - interrupts : <a b> where a is the interrupt number and b is a field that
+    represents an encoding of the sense and level information for the interrupt.
+    This should be encoded based on the information in section 2) depending on
+    the type of interrupt controller you have.
+
+  - clocks : The phandle for the clock ID number registered in clock tree.
+
+  - fsl,spdif-dma-events: The dma event ID numbers for Tx and Rx.
+
+Optional properties:
+
+  - rx-clk-source : The clock cource for Rx. Need to set this source according
+  to the SoC datasheet in SPDIF_SRPC section. If absent, the default source is
+  value 0x0 - if (DPLL Locked) SPDIF_RxClk else extal.
+
+  - tx-clk-source : The clock cources for Tx. There're three sources, each for
+  different supported sample rate, sequentially 32000Hz, 44100Hz and 48000Hz.
+  Need to set this source according to the SoC datasheet in SPDIF_STC section.
+  If absent, the default source is value 0x1 - CCM spdif0_clk_root input.
+
+  - tx-clk-div : The clock divider factor for Tx clock. There're three values,
+  each for different supported sample rate, sequentially 32000Hz 44100Hz 48000Hz.
+  Need to set this source according to the clock rate from the clock source.
+  If absent, the default divider factor is <37 23 37> by using spdif0_clk source.
+
+Example:
+
+spdif: spdif@02004000 {
+	compatible = "fsl,fsl-spdif";
+	reg = <0x02004000 0x4000>;
+	interrupts = <0 52 0x04>;
+	clocks = <&clks 197>;
+	fsl,spdif-dma-events = <15 14>;
+
+	rx-clk-source = <0x0>;
+	tx-clk-source = <
+		0x1 /* Tx clk src for 32KHz: CCM spdif0_clk_root input */
+		0x1 /* Tx clk src for 44KHz: CCM spdif0_clk_root input */
+		0x1 /* Tx clk src for 48KHz: CCM spdif0_clk_root input */
+	>;
+
+	/*
+	 * In i.MX6Q SoC, the clock rate of spdif0_clk_root will be 454.7MHz.
+	 * 32KHz:   454.7MHz / 6(ccm) / 37(spdif) = 32,003 Hz ~ 0.01% error
+	 * 44.1KHz: 454.7MHz / 7(ccm) / 23(spdif) = 44,128 Hz ~ 0.06% error
+	 * 48KHz:   454.7MHz / 4(ccm) / 37(spdif) = 48,004 Hz ~ 0.01% error
+	 */
+	tx-clk-div = <37 23 37>;
+
+	status = "okay";
+};

index 3a79d01..156b794 100644
@@ -1,6 +1,9 @@
 config SND_SOC_FSL_SSI
 	tristate
 
+config SND_SOC_FSL_SPDIF
+	tristate
+
 config SND_SOC_FSL_UTILS
 	tristate
 

index d4b4aa8..4b5970e 100644
@@ -12,9 +12,11 @@ obj-$(CONFIG_SND_SOC_P1022_RDK) += snd-soc-p1022-rdk.o
 
 # Freescale PowerPC SSI/DMA Platform Support
 snd-soc-fsl-ssi-objs := fsl_ssi.o
+snd-soc-fsl-spdif-objs := fsl_spdif.o
 snd-soc-fsl-utils-objs := fsl_utils.o
 snd-soc-fsl-dma-objs := fsl_dma.o
 obj-$(CONFIG_SND_SOC_FSL_SSI) += snd-soc-fsl-ssi.o
+obj-$(CONFIG_SND_SOC_FSL_SPDIF) += snd-soc-fsl-spdif.o
 obj-$(CONFIG_SND_SOC_FSL_UTILS) += snd-soc-fsl-utils.o
 obj-$(CONFIG_SND_SOC_POWERPC_DMA) += snd-soc-fsl-dma.o
 

new file mode 100644
index 0000000..9a3fa26
@@ -0,0 +1,29 @@
+Freescale i.MX audio complex with S/PDIF transceiver
+
+Required properties:
+
+  - compatible : "fsl,imx-audio-spdif"
+
+  - model : The user-visible name of this sound complex
+
+  - spdif-controller : The phandle of the i.MX S/PDIF controller
+
+
+Optional properties:
+
+  - spdif-transmitter : The phandle of the spdif-transmitter dummy codec
+
+  - spdif-receiver : The phandle of the spdif-receiver dummy codec
+
+* Note: At least one of these two properties should be set in the DT binding.
+
+
+Example:
+
+sound-spdif {
+	compatible = "fsl,imx-audio-spdif";
+	model = "imx-spdif";
+	spdif-controller = <&spdif>;
+	spdif-transmitter = <&spdif_tx_codec>;
+	spdif-receiver = <&spdif_rx_codec>;
+};

index 156b794..ba0c7ff 100644
@@ -195,6 +195,17 @@ config SND_SOC_IMX_SGTL5000
 	  Say Y if you want to add support for SoC audio on an i.MX board with
 	  a sgtl5000 codec.
 
+config SND_SOC_IMX_SPDIF
+	tristate "SoC Audio support for i.MX boards with S/PDIF"
+	select SND_SOC_IMX_PCM_DMA
+	select SND_SOC_FSL_SPDIF
+	select SND_SOC_FSL_UTILS
+	select SND_SOC_SPDIF
+	help
+	  SoC Audio support for i.MX boards with S/PDIF
+	  Say Y if you want to add support for SoC audio on an i.MX board with
+	  a S/DPDIF.
+
 config SND_SOC_IMX_MC13783
 	tristate "SoC Audio support for I.MX boards with mc13783"
 	depends on MFD_MC13783 && ARCH_ARM

index 4b5970e..e2aaff7 100644
@@ -45,6 +45,7 @@ snd-soc-mx27vis-aic32x4-objs := mx27vis-aic32x4.o
 snd-soc-wm1133-ev1-objs := wm1133-ev1.o
 snd-soc-imx-sgtl5000-objs := imx-sgtl5000.o
 snd-soc-imx-wm8962-objs := imx-wm8962.o
+snd-soc-imx-spdif-objs :=imx-spdif.o
 snd-soc-imx-mc13783-objs := imx-mc13783.o
 
 obj-$(CONFIG_SND_SOC_EUKREA_TLV320) += snd-soc-eukrea-tlv320.o

@@ -53,4 +54,5 @@ obj-$(CONFIG_SND_SOC_MX27VIS_AIC32X4) += snd-soc-mx27vis-aic32x4.o
 obj-$(CONFIG_SND_MXC_SOC_WM1133_EV1) += snd-soc-wm1133-ev1.o
 obj-$(CONFIG_SND_SOC_IMX_SGTL5000) += snd-soc-imx-sgtl5000.o
 obj-$(CONFIG_SND_SOC_IMX_WM8962) += snd-soc-imx-wm8962.o
+obj-$(CONFIG_SND_SOC_IMX_SPDIF) += snd-soc-imx-spdif.o
 obj-$(CONFIG_SND_SOC_IMX_MC13783) += snd-soc-imx-mc13783.o