Add Arndale board support

Arndale board is based on samsung's exynos5250 soc.

Signed-off-by Inderpal Singh <[email protected]>

Signed-off-by Chander Kashyap <[email protected]>

---
 MAINTAINERS                              |    4 +
 board/samsung/arndale/Makefile           |   50 ++++++
 board/samsung/arndale/arndale.c          |  102 +++++++++++
 board/samsung/arndale/arndale_spl.c      |   66 ++++++++
 board/samsung/dts/exynos5250-arndale.dts |   23 +++
 boards.cfg                               |    1 +
 include/configs/arndale.h                |  271 ++++++++++++++++++++++++++++++
 7 files changed, 517 insertions(+)
 create mode 100644 board/samsung/arndale/Makefile
 create mode 100644 board/samsung/arndale/arndale.c
 create mode 100644 board/samsung/arndale/arndale_spl.c
 create mode 100644 board/samsung/dts/exynos5250-arndale.dts
 create mode 100644 include/configs/arndale.h

MAINTAINERS +0 -0

index 081cf96..bf489d4 100644

MAINTAINERS +3 -0

+
+	Arndale			ARM ARMV7 (EXYNOS5250 SoC)
+
 Lukasz Majewski <[email protected]>
 
 	trats			ARM ARMV7 (EXYNOS4210 SoC)

board/samsung/arndale/Makefile new file +10 -0

new file mode 100644
index 0000000..5786774
@@ -0,0 +1,50 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.

board/samsung/arndale/Makefile new file +30 -0

+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	+= arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS	+= arndale.o
+endif
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL	:=	 $(obj).depend $(LIB)
+
+all:	$(ALL)
+
+$(LIB):	$(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

board/samsung/arndale/arndale.c new file +66 -0

new file mode 100644
index 0000000..47cbac8
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/power.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+	return 0;
+}
+
+int dram_init(void)
+{
+	int i;
+	u32 addr;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+		gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+	}
+	return 0;
+}
+
+int power_init_board(void)
+{
+	set_ps_hold_ctrl();
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	int i;
+	u32 addr, size;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+		size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+		gd->bd->bi_dram[i].start = addr;
+		gd->bd->bi_dram[i].size = size;
+	}
+}
+

board/samsung/arndale/arndale.c new file +17 -0

+	err = board_uart_init();
+	if (err) {
+		debug("UART init failed\n");
+		return err;
+	}
+	return err;
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+	printf("\nBoard: Arndale\n");
+
+	return 0;
+}
+#endif

board/samsung/arndale/arndale_spl.c new file +66 -0

new file mode 100644
index 0000000..8135708
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/spl.h>
+
+#define SIGNATURE	0xdeadbeef
+
+/* Parameters of early board initialization in SPL */
+static struct spl_machine_param machine_param
+		__attribute__((section(".machine_param"))) = {
+	.signature	= SIGNATURE,
+	.version	= 1,
+	.params		= "vmubfasirM",
+	.size		= sizeof(machine_param),
+
+	.mem_iv_size	= 0x1f,
+	.mem_type	= DDR_MODE_DDR3,
+
+	/*
+	 * Set uboot_size to 0x100000 bytes.
+	 *
+	 * This is an overly conservative value chosen to accommodate all
+	 * possible U-Boot image.  You are advised to set this value to a
+	 * smaller realistic size via scripts that modifies the .machine_param
+	 * section of output U-Boot image.
+	 */
+	.uboot_size	= 0x100000,
+
+	.boot_source	= BOOT_MODE_OM,
+	.frequency_mhz	= 800,
+	.arm_freq_mhz	= 1000,
+	.serial_base	= 0x12c30000,
+	.i2c_base	= 0x12c60000,
+	.mem_manuf	= MEM_MANUF_SAMSUNG,
+};
+
+struct spl_machine_param *spl_get_machine_params(void)
+{
+	if (machine_param.signature != SIGNATURE) {
+		/* Will hang if SIGNATURE dont match */
+		while (1)
+			;
+	}
+
+	return &machine_param;
+}

board/samsung/dts/exynos5250-arndale.dts new file +23 -0

new file mode 100644
index 0000000..3081ab4
@@ -0,0 +1,23 @@
+/*
+ * SAMSUNG Arndale board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ ARCH_CPU_DTS
+
+/ {
+	model = "SAMSUNG Arndale board based on EXYNOS5250";
+	compatible = "samsung,arndale", "samsung,exynos5250";
+
+	aliases {
+		serial0 = "/serial at 12C20000";
+		console = "/serial at 12C20000";
+	};
+};

boards.cfg +0 -0

index 6a368de..e44d8d4 100644

boards.cfg +0 -0

 smdkv310		     arm	 armv7	     smdkv310		 samsung	exynos
 trats                        arm         armv7       trats               samsung        exynos
 harmony                      arm         armv7:arm720t harmony           nvidia         tegra20

include/configs/arndale.h new file +261 -0

new file mode 100644
index 0000000..3b41862
@@ -0,0 +1,271 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * Configuration settings for the SAMSUNG Arndale board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_ARNDALE_H
+#define __CONFIG_ARNDALE_H
+
+/* High Level Configuration Options */
+#define CONFIG_SAMSUNG			/* in a SAMSUNG core */
+#define CONFIG_S5P			/* S5P Family */
+#define CONFIG_EXYNOS5			/* which is in a Exynos5 Family */
+#define CONFIG_EXYNOS5250
+
+#include <asm/arch/cpu.h>		/* get chip and board defs */
+
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+/* Enable fdt support for Exynos5250 */
+#define CONFIG_ARCH_DEVICE_TREE		exynos5250
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_SEPARATE
+
+/* Allow tracing to be enabled */
+#define CONFIG_TRACE
+#define CONFIG_CMD_TRACE
+#define CONFIG_TRACE_BUFFER_SIZE	(16 << 20)
+#define CONFIG_TRACE_EARLY_SIZE		(8 << 20)
+#define CONFIG_TRACE_EARLY
+#define CONFIG_TRACE_EARLY_ADDR		0x50000000
+
+/* Keep L2 Cache Disabled */
+#define CONFIG_SYS_DCACHE_OFF
+
+#define CONFIG_SYS_SDRAM_BASE		0x40000000
+#define CONFIG_SYS_TEXT_BASE		0x43E00000
+
+/* input clock of PLL: SMDK5250 has 24MHz input clock */
+#define CONFIG_SYS_CLK_FREQ		24000000
+
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_EDITING
+
+/* Power Down Modes */
+#define S5P_CHECK_SLEEP			0x00000BAD
+#define S5P_CHECK_DIDLE			0xBAD00000
+#define S5P_CHECK_LPA			0xABAD0000
+
+/* Offset for inform registers */
+#define INFORM0_OFFSET			0x800
+#define INFORM1_OFFSET			0x804
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (4 << 20))
+
+/* select serial console configuration */
+#define CONFIG_BAUDRATE			115200
+#define EXYNOS5_DEFAULT_UART_OFFSET	0x010000
+#define CONFIG_SILENT_CONSOLE
+
+/* Console configuration */
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define EXYNOS_DEVICE_SETTINGS \
+		"stdin=serial\0" \
+		"stdout=serial\0" \
+		"stderr=serial\0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	EXYNOS_DEVICE_SETTINGS
+
+/* SD/MMC configuration */
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_SDHCI
+#define CONFIG_S5P_SDHCI
+#define CONFIG_DWMMC
+#define CONFIG_EXYNOS_DWMMC
+#define CONFIG_SUPPORT_EMMC_BOOT
+
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/* PWM */
+#define CONFIG_PWM
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/* Command definition*/
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_HASH
+
+#define CONFIG_BOOTDELAY		3
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+/* USB */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_EXYNOS
+#define CONFIG_USB_STORAGE
+
+/* MMC SPL */
+#define CONFIG_SPL
+#define COPY_BL2_FNPTR_ADDR	0x02020030
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+
+/* specific .lds file */
+#define CONFIG_SPL_LDSCRIPT	"board/samsung/common/exynos-uboot-spl.lds"
+#define CONFIG_SPL_TEXT_BASE	0x02023400
+#define CONFIG_SPL_MAX_FOOTPRINT	(14 * 1024)
+
+#define CONFIG_BOOTCOMMAND	"mmc read 40007000 451 2000; bootm 40007000"
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP		/* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser	*/
+#define CONFIG_SYS_PROMPT		"ARNDALE # "
+#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE		384	/* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
+#define CONFIG_DEFAULT_CONSOLE		"console=ttySAC2,115200n8\0"
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+/* memtest works on */
+#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5E00000)
+#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
+
+#define CONFIG_SYS_HZ			1000
+
+#define CONFIG_RD_LVL
+
+#define CONFIG_NR_DRAM_BANKS	8
+#define SDRAM_BANK_SIZE		(256UL << 20UL)	/* 256 MB */
+#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3		(CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4		(CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_5		(CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_5_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_6		(CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_6_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_7		(CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_7_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_8		(CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_8_SIZE	SDRAM_BANK_SIZE
+
+#define CONFIG_SYS_MONITOR_BASE	0x00000000
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_IDENT_STRING		" for ARNDALE"
+
+#define CONFIG_SYS_MMC_ENV_DEV		0
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SECURE_BL1_ONLY
+
+/* Secure FW size configuration */
+#ifdef	CONFIG_SECURE_BL1_ONLY
+#define	CONFIG_SEC_FW_SIZE		(8 << 10)	/* 8KB */
+#else
+#define	CONFIG_SEC_FW_SIZE		0
+#endif
+
+/* Configuration of BL1, BL2, ENV Blocks on mmc */
+#define CONFIG_RES_BLOCK_SIZE	(512)
+#define CONFIG_BL1_SIZE		(16 << 10) /*16 K reserved for BL1*/
+#define	CONFIG_BL2_SIZE		(512UL << 10UL)	/* 512 KB */
+#define CONFIG_ENV_SIZE		(16 << 10)	/* 16 KB */
+
+#define CONFIG_BL1_OFFSET	(CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE)
+#define CONFIG_BL2_OFFSET	(CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE)
+#define CONFIG_ENV_OFFSET	(CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE)
+
+/* U-boot copy size from boot Media to DRAM.*/
+#define BL2_START_OFFSET	(CONFIG_BL2_OFFSET/512)
+#define BL2_SIZE_BLOC_COUNT	(CONFIG_BL2_SIZE/512)
+
+#define CONFIG_SPI_BOOTING
+#define EXYNOS_COPY_SPI_FNPTR_ADDR	0x02020058
+#define SPI_FLASH_UBOOT_POS		(CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_PART
+#define CONFIG_PARTITION_UUIDS
+
+
+#define CONFIG_IRAM_STACK	0x02050000
+
+#define CONFIG_SYS_INIT_SP_ADDR	CONFIG_IRAM_STACK
+
+/* I2C */
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_HARD_I2C
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C_SPEED	100000		/* 100 Kbps */
+#define CONFIG_DRIVER_S3C24X0_I2C
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_MAX_I2C_NUM	8
+#define CONFIG_SYS_I2C_SLAVE    0x0
+#define CONFIG_I2C_EDID
+
+/* PMIC */
+#define CONFIG_PMIC
+#define CONFIG_PMIC_I2C
+#define CONFIG_PMIC_MAX77686
+
+#define CONFIG_DEFAULT_DEVICE_TREE	exynos5250-arndale
+
+/* Ethernet Controllor Driver */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_SMC911X
+#define CONFIG_SMC911X_BASE		0x5000000
+#define CONFIG_SMC911X_16_BIT
+#define CONFIG_ENV_SROM_BANK		1
+#endif /*CONFIG_CMD_NET*/
+
+/* Enable PXE Support */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_CMD_PXE

Quoted 27 lines · Chander Kashyap

Arndale board is based on samsung's exynos5250 soc.

Signed-off-by Inderpal Singh <[email protected]>

Signed-off-by Chander Kashyap <[email protected]>

---
 MAINTAINERS                              |    4 +
 board/samsung/arndale/Makefile           |   50 ++++++
 board/samsung/arndale/arndale.c          |  102 +++++++++++
 board/samsung/arndale/arndale_spl.c      |   66 ++++++++
 board/samsung/dts/exynos5250-arndale.dts |   23 +++
 boards.cfg                               |    1 +
 include/configs/arndale.h                |  271 ++++++++++++++++++++++++++++++
 7 files changed, 517 insertions(+)
 create mode 100644 board/samsung/arndale/Makefile
 create mode 100644 board/samsung/arndale/arndale.c
 create mode 100644 board/samsung/arndale/arndale_spl.c
 create mode 100644 board/samsung/dts/exynos5250-arndale.dts
 create mode 100644 include/configs/arndale.h

MAINTAINERS +0 -0

index 081cf96..bf489d4 100644
@@ -747,6 +747,10 @@ Chander Kashyap <[email protected]>
      SMDKV310                ARM ARMV7 (EXYNOS4210 SoC)
      SMDK5250                ARM ARMV7 (EXYNOS5250 SoC)
 

MAINTAINERS Chander Kashyap <[email protected]> · line 750

Quoted 1 line

MAINTAINERS +1 -0

+Inderpal Singh <[email protected]>

please sort the list by last name.

Quoted 28 lines

MAINTAINERS +3 -0

+
+     Arndale                 ARM ARMV7 (EXYNOS5250 SoC)
+
 Lukasz Majewski <[email protected]>
 
      trats                   ARM ARMV7 (EXYNOS4210 SoC)

board/samsung/arndale/Makefile new file +15 -0

new file mode 100644
index 0000000..5786774
@@ -0,0 +1,50 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.

board/samsung/arndale/Makefile line 20

Quoted 5 lines

board/samsung/arndale/Makefile new file +5 -0

+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA

Please use for new files SPDX-License-Identifier.
please check it globally.

Quoted 107 lines

board/samsung/arndale/Makefile new file +30 -0

+#
+
+include $(TOPDIR)/config.mk
+
+LIB  = $(obj)lib$(BOARD).o
+
+COBJS        += arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS        += arndale.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL  :=       $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB):      $(OBJS)
+     $(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

board/samsung/arndale/arndale.c new file +70 -0

new file mode 100644
index 0000000..47cbac8
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/power.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+     gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+     return 0;
+}
+
+int dram_init(void)
+{
+     int i;
+     u32 addr;
+
+     for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+             addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+             gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+     }
+     return 0;
+}
+
+int power_init_board(void)
+{
+     set_ps_hold_ctrl();
+     return 0;
+}
+
+void dram_init_banksize(void)
+{
+     int i;
+     u32 addr, size;
+
+     for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+             addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+             size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+             gd->bd->bi_dram[i].start = addr;
+             gd->bd->bi_dram[i].size = size;
+     }
+}
+
+static int board_uart_init(void)
+{
+     int err, uart_id, ret = 0;
+

board/samsung/arndale/arndale.c line 76

Quoted 6 lines

board/samsung/arndale/arndale.c new file +6 -0

+     for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
+             err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
+             if (err) {
+                     debug("UART%d not configured\n",
+                             (uart_id - PERIPH_ID_UART0));
+                     ret |= err;

why don't you return error here?

board/samsung/arndale/arndale.c line 85

Quoted 10 lines

board/samsung/arndale/arndale.c new file +9 -0

+             }
+     }
+     return ret;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+     int err;

please add a blank line.

Quoted 124 lines

board/samsung/arndale/arndale.c new file +17 -0

+     err = board_uart_init();
+     if (err) {
+             debug("UART init failed\n");
+             return err;
+     }
+     return err;
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+     printf("\nBoard: Arndale\n");
+
+     return 0;
+}
+#endif

board/samsung/arndale/arndale_spl.c new file +66 -0

new file mode 100644
index 0000000..8135708
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/spl.h>
+
+#define SIGNATURE    0xdeadbeef
+
+/* Parameters of early board initialization in SPL */
+static struct spl_machine_param machine_param
+             __attribute__((section(".machine_param"))) = {
+     .signature      = SIGNATURE,
+     .version        = 1,
+     .params         = "vmubfasirM",
+     .size           = sizeof(machine_param),
+
+     .mem_iv_size    = 0x1f,
+     .mem_type       = DDR_MODE_DDR3,
+
+     /*
+      * Set uboot_size to 0x100000 bytes.
+      *
+      * This is an overly conservative value chosen to accommodate all
+      * possible U-Boot image.  You are advised to set this value to a
+      * smaller realistic size via scripts that modifies the .machine_param
+      * section of output U-Boot image.
+      */
+     .uboot_size     = 0x100000,
+
+     .boot_source    = BOOT_MODE_OM,
+     .frequency_mhz  = 800,
+     .arm_freq_mhz   = 1000,
+     .serial_base    = 0x12c30000,
+     .i2c_base       = 0x12c60000,
+     .mem_manuf      = MEM_MANUF_SAMSUNG,
+};
+
+struct spl_machine_param *spl_get_machine_params(void)
+{
+     if (machine_param.signature != SIGNATURE) {
+             /* Will hang if SIGNATURE dont match */
+             while (1)
+                     ;
+     }
+
+     return &machine_param;
+}

board/samsung/dts/exynos5250-arndale.dts new file +23 -0

new file mode 100644
index 0000000..3081ab4
@@ -0,0 +1,23 @@
+/*
+ * SAMSUNG Arndale board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ *           http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ ARCH_CPU_DTS
+
+/ {
+     model = "SAMSUNG Arndale board based on EXYNOS5250";
+     compatible = "samsung,arndale", "samsung,exynos5250";
+
+     aliases {
+             serial0 = "/serial at 12C20000";
+             console = "/serial at 12C20000";
+     };
+};

boards.cfg +0 -0

index 6a368de..e44d8d4 100644

boards.cfg origen arm armv7 origen samsung exynos · line 324

Quoted 4 lines

boards.cfg +1 -0

@@ -321,6 +321,7 @@ origen                         arm         armv7       origen              samsung        exynos
 s5pc210_universal            arm         armv7       universal_c210      samsung        exynos
 snow                      arm         armv7       smdk5250            samsung        exynos
 smdk5250                  arm         armv7       smdk5250            samsung        exynos
+arndale                           arm         armv7       arndale             samsung        exynos

please sort this list by board name in exnynos.

Quoted 276 lines

boards.cfg +0 -0

 smdkv310                  arm         armv7       smdkv310            samsung        exynos
 trats                        arm         armv7       trats               samsung        exynos
 harmony                      arm         armv7:arm720t harmony           nvidia         tegra20

include/configs/arndale.h new file +267 -0

new file mode 100644
index 0000000..3b41862
@@ -0,0 +1,271 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * Configuration settings for the SAMSUNG Arndale board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_ARNDALE_H
+#define __CONFIG_ARNDALE_H
+
+/* High Level Configuration Options */
+#define CONFIG_SAMSUNG                       /* in a SAMSUNG core */
+#define CONFIG_S5P                   /* S5P Family */
+#define CONFIG_EXYNOS5                       /* which is in a Exynos5 Family */
+#define CONFIG_EXYNOS5250
+
+#include <asm/arch/cpu.h>            /* get chip and board defs */
+
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+/* Enable fdt support for Exynos5250 */
+#define CONFIG_ARCH_DEVICE_TREE              exynos5250
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_SEPARATE
+
+/* Allow tracing to be enabled */
+#define CONFIG_TRACE
+#define CONFIG_CMD_TRACE
+#define CONFIG_TRACE_BUFFER_SIZE     (16 << 20)
+#define CONFIG_TRACE_EARLY_SIZE              (8 << 20)
+#define CONFIG_TRACE_EARLY
+#define CONFIG_TRACE_EARLY_ADDR              0x50000000
+
+/* Keep L2 Cache Disabled */
+#define CONFIG_SYS_DCACHE_OFF
+
+#define CONFIG_SYS_SDRAM_BASE                0x40000000
+#define CONFIG_SYS_TEXT_BASE         0x43E00000
+
+/* input clock of PLL: SMDK5250 has 24MHz input clock */
+#define CONFIG_SYS_CLK_FREQ          24000000
+
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_EDITING
+
+/* Power Down Modes */
+#define S5P_CHECK_SLEEP                      0x00000BAD
+#define S5P_CHECK_DIDLE                      0xBAD00000
+#define S5P_CHECK_LPA                        0xABAD0000
+
+/* Offset for inform registers */
+#define INFORM0_OFFSET                       0x800
+#define INFORM1_OFFSET                       0x804
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN                (CONFIG_ENV_SIZE + (4 << 20))
+
+/* select serial console configuration */
+#define CONFIG_BAUDRATE                      115200
+#define EXYNOS5_DEFAULT_UART_OFFSET  0x010000
+#define CONFIG_SILENT_CONSOLE
+
+/* Console configuration */
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define EXYNOS_DEVICE_SETTINGS \
+             "stdin=serial\0" \
+             "stdout=serial\0" \
+             "stderr=serial\0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+     EXYNOS_DEVICE_SETTINGS
+
+/* SD/MMC configuration */
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_SDHCI
+#define CONFIG_S5P_SDHCI
+#define CONFIG_DWMMC
+#define CONFIG_EXYNOS_DWMMC
+#define CONFIG_SUPPORT_EMMC_BOOT
+
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/* PWM */
+#define CONFIG_PWM
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/* Command definition*/
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_HASH
+
+#define CONFIG_BOOTDELAY             3
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+/* USB */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_EXYNOS
+#define CONFIG_USB_STORAGE
+
+/* MMC SPL */
+#define CONFIG_SPL
+#define COPY_BL2_FNPTR_ADDR  0x02020030
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+
+/* specific .lds file */
+#define CONFIG_SPL_LDSCRIPT  "board/samsung/common/exynos-uboot-spl.lds"
+#define CONFIG_SPL_TEXT_BASE 0x02023400
+#define CONFIG_SPL_MAX_FOOTPRINT     (14 * 1024)
+
+#define CONFIG_BOOTCOMMAND   "mmc read 40007000 451 2000; bootm 40007000"
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP          /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER               /* use "hush" command parser    */
+#define CONFIG_SYS_PROMPT            "ARNDALE # "
+#define CONFIG_SYS_CBSIZE            256     /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE            384     /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS           16      /* max number of command args */
+#define CONFIG_DEFAULT_CONSOLE               "console=ttySAC2,115200n8\0"
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE          CONFIG_SYS_CBSIZE
+/* memtest works on */
+#define CONFIG_SYS_MEMTEST_START     CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END               (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
+#define CONFIG_SYS_LOAD_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
+
+#define CONFIG_SYS_HZ                        1000
+
+#define CONFIG_RD_LVL
+
+#define CONFIG_NR_DRAM_BANKS 8
+#define SDRAM_BANK_SIZE              (256UL << 20UL) /* 256 MB */
+#define PHYS_SDRAM_1         CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE    SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2         (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE    SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3         (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE    SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4         (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE    SDRAM_BANK_SIZE
+#define PHYS_SDRAM_5         (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_5_SIZE    SDRAM_BANK_SIZE
+#define PHYS_SDRAM_6         (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_6_SIZE    SDRAM_BANK_SIZE
+#define PHYS_SDRAM_7         (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_7_SIZE    SDRAM_BANK_SIZE
+#define PHYS_SDRAM_8         (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_8_SIZE    SDRAM_BANK_SIZE
+
+#define CONFIG_SYS_MONITOR_BASE      0x00000000
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_IDENT_STRING          " for ARNDALE"
+
+#define CONFIG_SYS_MMC_ENV_DEV               0
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SECURE_BL1_ONLY
+
+/* Secure FW size configuration */
+#ifdef       CONFIG_SECURE_BL1_ONLY
+#define      CONFIG_SEC_FW_SIZE              (8 << 10)       /* 8KB */
+#else
+#define      CONFIG_SEC_FW_SIZE              0
+#endif
+
+/* Configuration of BL1, BL2, ENV Blocks on mmc */
+#define CONFIG_RES_BLOCK_SIZE        (512)
+#define CONFIG_BL1_SIZE              (16 << 10) /*16 K reserved for BL1*/
+#define      CONFIG_BL2_SIZE         (512UL << 10UL) /* 512 KB */
+#define CONFIG_ENV_SIZE              (16 << 10)      /* 16 KB */
+
+#define CONFIG_BL1_OFFSET    (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE)
+#define CONFIG_BL2_OFFSET    (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE)
+#define CONFIG_ENV_OFFSET    (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE)
+
+/* U-boot copy size from boot Media to DRAM.*/
+#define BL2_START_OFFSET     (CONFIG_BL2_OFFSET/512)
+#define BL2_SIZE_BLOC_COUNT  (CONFIG_BL2_SIZE/512)
+
+#define CONFIG_SPI_BOOTING
+#define EXYNOS_COPY_SPI_FNPTR_ADDR   0x02020058
+#define SPI_FLASH_UBOOT_POS          (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_PART
+#define CONFIG_PARTITION_UUIDS
+
+
+#define CONFIG_IRAM_STACK    0x02050000
+
+#define CONFIG_SYS_INIT_SP_ADDR      CONFIG_IRAM_STACK
+
+/* I2C */
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_HARD_I2C
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C_SPEED 100000          /* 100 Kbps */
+#define CONFIG_DRIVER_S3C24X0_I2C
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_MAX_I2C_NUM   8
+#define CONFIG_SYS_I2C_SLAVE    0x0
+#define CONFIG_I2C_EDID
+
+/* PMIC */
+#define CONFIG_PMIC
+#define CONFIG_PMIC_I2C
+#define CONFIG_PMIC_MAX77686
+
+#define CONFIG_DEFAULT_DEVICE_TREE   exynos5250-arndale
+
+/* Ethernet Controllor Driver */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_SMC911X
+#define CONFIG_SMC911X_BASE          0x5000000
+#define CONFIG_SMC911X_16_BIT
+#define CONFIG_ENV_SROM_BANK         1
+#endif /*CONFIG_CMD_NET*/
+
+/* Enable PXE Support */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_CMD_PXE
+#define CONFIG_MENU
+#endif
+
+/* Enable devicetree support */
+#define CONFIG_OF_LIBFDT
+

include/configs/arndale.h line 271

Quoted 5 lines

include/configs/arndale.h new file +4 -0

+/* Enable Time Command */
+#define CONFIG_CMD_TIME
+
+#endif       /* __CONFIG_H */

Thanks,
Minkyu Kang.