Armada 370/XP clocksource fixes
Subsystems (5)
v3 cover Armada 370/XP clocksource fixes
This small patchset fixes a somewhat minor issue found in the clocksource driver for Armada 370/XP SoC.
On one side the Armada 370 SoC has no 25 MHz fixed timer.
On the other side the Armada XP SoC cannot work properly without such 25 MHz fixed timer selected, because otherwise the base clock frequency would vary when doing cpufreq frequency changes.
Therefore we can consider the SoCs as not being compatible, being better to have two compatible strings, one for each SoC. The previous compatible and its behavior has been removed, considering there are no DT-enabled boards in use in the field.
In addition, CLOCKSOURCE_OF_DECLARE is used to simplify the initialization.
This patchset is based on v3.11-rc4. Also, to ease maintainer's task this is based on these two patches which are in linux-next:
commit be14114934545f52be2ffddbe401ba0951007c59
Author: Stephen Boyd <[email protected]> "clocksource: time-armada-370-xp: Divorce from local timer API"
commit 4047c794ae18c467a5ea987265238186bc253f61
Author: Stephen Boyd <[email protected]> "clocksource: time-armada-370-xp: Fix sparse warning"
Any testing and feedback is highly appreciated!
Changes from v2:
* As suggested by Jason Cooper, and given there are no DT-enabled boards in the field, the previous compatible string is *removed* instead of being retained and changes in documentation and .dts files are added as needed.
Changes from v1:
* Declare TIMER_CTRL register access helpers as static, as reported by Andrew Lunn.
* Add some documentation about the deprecated compatible string in the clocksource driver, as suggested by Andrew Lunn.
* Add to the series a cosmetic patch to use BIT()
* Rebased on top of two patches for the armada-370-xp clocksource driver, that are already in linux-next.
* Reordered the patches: bare cleanup first, improvements later.
Ezequiel Garcia (6):
clocksource: armada-370-xp: Use BIT()
clocksource: armada-370-xp: Simplify TIMER_CTRL register access
clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE
clocksource: armada-370-xp: Introduce new compatibles
clocksource: armada-370-xp: Fix device-tree binding
ARM: mvebu: Fix the Armada 370/XP timer compatible strings
.../bindings/timer/marvell,armada-370-xp-timer.txt | 27 ++++- arch/arm/boot/dts/armada-370-xp.dtsi | 2 - arch/arm/boot/dts/armada-370.dtsi | 5 + arch/arm/boot/dts/armada-xp.dtsi | 2 +- arch/arm/mach-mvebu/armada-370-xp.c | 4 +- drivers/clocksource/time-armada-370-xp.c | 127 ++++++++++++--------- include/linux/time-armada-370-xp.h | 16 --- 7 files changed, 103 insertions(+), 80 deletions(-) delete mode 100644 include/linux/time-armada-370-xp.h
Signature · 1 line
1.8.1.5
PATCH v3 1/6 clocksource: armada-370-xp: Use BIT()
This is a purely cosmetic commit: we replace hardcoded values that representing bits by BIT(), which is slightly more readable.
--- drivers/clocksource/time-armada-370-xp.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
drivers/clocksource/time-armada-370-xp.c +6 -6
@@ -36,13 +36,13 @@* Timer block registers. */ #define TIMER_CTRL_OFF 0x0000 -#define TIMER0_EN 0x0001 -#define TIMER0_RELOAD_EN 0x0002 -#define TIMER0_25MHZ 0x0800 +#define TIMER0_EN BIT(0) +#define TIMER0_RELOAD_EN BIT(1) +#define TIMER0_25MHZ BIT(11)#define TIMER0_DIV (div) ((div) << 19) -#define TIMER1_EN 0x0004 -#define TIMER1_RELOAD_EN 0x0008 -#define TIMER1_25MHZ 0x1000 +#define TIMER1_EN BIT(2) +#define TIMER1_RELOAD_EN BIT(3) +#define TIMER1_25MHZ BIT(12)#define TIMER1_DIV (div) ((div) << 22)#define TIMER_EVENTS_STATUS 0x0004#define TIMER0_CLR_MASK (~0x1)
Signature · 1 line
1.8.1.5
PATCH v3 2/6 clocksource: armada-370-xp: Simplify TIMER_CTRL register access
In reply to Ezequiel GarciaThis commit creates two functions to access the TIMER_CTRL register:
one for global one for the per-cpu. This makes the code much more readable. In addition, since the TIMER_CTRL register is also used for watchdog, this is preparation work for future thread-safe improvements.
--- drivers/clocksource/time-armada-370-xp.c | 62 +++++++++++++++----------------- 1 file changed, 29 insertions(+), 33 deletions(-)
drivers/clocksource/time-armada-370-xp.c +29 -33
@@ -72,6 +72,18 @@ static u32 ticks_per_jiffy;static struct clock_event_device __percpu *armada_370_xp_evt; +static void timer_ctrl_clrset (u32 clr,u32 set) +{ +writel ((readl (timer_base +TIMER_CTRL_OFF ) & ~clr) | set, + timer_base +TIMER_CTRL_OFF ); +} + +static void local_timer_ctrl_clrset (u32 clr,u32 set) +{ +writel ((readl (local_base +TIMER_CTRL_OFF ) & ~clr) | set, + local_base +TIMER_CTRL_OFF ); +} + static u32 notrace armada_370_xp_read_sched_clock(void) {return ~readl (timer_base +TIMER0_VAL_OFF );
@@ -84,7 +96,6 @@ static int armada_370_xp_clkevt_next_event(unsigned long delta, struct clock_event_device *dev) { -u32 u;/* * Clear clockevent timer interrupt. */
@@ -98,11 +109,8 @@ armada_370_xp_clkevt_next_event(unsigned long delta,/* * Enable the timer. */ - u =readl (local_base +TIMER_CTRL_OFF ); - u = ((u & ~TIMER0_RELOAD_EN ) |TIMER0_EN | -TIMER0_DIV (TIMER_DIVIDER_SHIFT )); -writel (u, local_base +TIMER_CTRL_OFF ); - +local_timer_ctrl_clrset (TIMER0_RELOAD_EN , +TIMER0_EN |TIMER0_DIV (TIMER_DIVIDER_SHIFT ));return 0 ; }
@@ -110,8 +118,6 @@ static void armada_370_xp_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) { - u32 u; -if (mode ==CLOCK_EVT_MODE_PERIODIC ) {/*
@@ -123,18 +129,14 @@ armada_370_xp_clkevt_mode(enum clock_event_mode mode,/* * Enable timer. */ - - u =readl (local_base +TIMER_CTRL_OFF ); - -writel ((u |TIMER0_EN |TIMER0_RELOAD_EN | -TIMER0_DIV (TIMER_DIVIDER_SHIFT )), - local_base +TIMER_CTRL_OFF ); +local_timer_ctrl_clrset (0 ,TIMER0_RELOAD_EN | +TIMER0_EN | +TIMER0_DIV (TIMER_DIVIDER_SHIFT )); }else {/* * Disable timer. */ - u =readl (local_base +TIMER_CTRL_OFF ); -writel (u & ~TIMER0_EN , local_base +TIMER_CTRL_OFF ); +local_timer_ctrl_clrset (TIMER0_EN ,0 );/* * ACK pending timer interrupt.
@@ -163,14 +165,14 @@ static irqreturn_t armada_370_xp_timer_interrupt(int irq, void *dev_id)*/ static int armada_370_xp_timer_setup (struct clock_event_device *evt) { -u32 u; +u32 clr =0 , set =0 ;int cpu =smp_processor_id (); - u =readl (local_base +TIMER_CTRL_OFF );if (timer25Mhz) -writel (u |TIMER0_25MHZ , local_base +TIMER_CTRL_OFF ); + set =TIMER0_25MHZ ;else -writel (u & ~TIMER0_25MHZ , local_base +TIMER_CTRL_OFF ); + clr =TIMER0_25MHZ ; +local_timer_ctrl_clrset (clr, set); evt->name ="armada_370_xp_per_cpu_tick" , evt->features = CLOCK_EVT_FEAT_ONESHOT |
@@ -219,7 +221,7 @@ static struct notifier_block armada_370_xp_timer_cpu_nb = {void __init armada_370_xp_timer_init (void ) { -u32 u; +u32 clr =0 , set =0 ;struct device_node *np;int res;
@@ -230,23 +232,19 @@ void __init armada_370_xp_timer_init(void)if (of_find_property (np,"marvell,timer-25Mhz" ,NULL )) {/* The fixed 25MHz timer is available so let's use it */ - u =readl (timer_base +TIMER_CTRL_OFF ); -writel (u |TIMER0_25MHZ , - timer_base +TIMER_CTRL_OFF ); + set =TIMER0_25MHZ ; timer_clk =25000000 ; }else {unsigned long rate =0 ;struct clk *clk =of_clk_get (np,0 );WARN_ON (IS_ERR (clk)); rate =clk_get_rate (clk); - - u =readl (timer_base +TIMER_CTRL_OFF ); -writel (u & ~(TIMER0_25MHZ ), - timer_base +TIMER_CTRL_OFF ); - timer_clk = rate /TIMER_DIVIDER ; + + clr =TIMER0_25MHZ ; timer25Mhz = false; } +timer_ctrl_clrset (clr, set);/* * We use timer 0 as clocksource, and private(local) timer 0
@@ -268,10 +266,8 @@ void __init armada_370_xp_timer_init(void)writel (0xffffffff , timer_base +TIMER0_VAL_OFF );writel (0xffffffff , timer_base +TIMER0_RELOAD_OFF ); - u =readl (timer_base +TIMER_CTRL_OFF ); - -writel ((u |TIMER0_EN |TIMER0_RELOAD_EN | -TIMER0_DIV (TIMER_DIVIDER_SHIFT )), timer_base +TIMER_CTRL_OFF ); +timer_ctrl_clrset (0 ,TIMER0_EN |TIMER0_RELOAD_EN | +TIMER0_DIV (TIMER_DIVIDER_SHIFT )); clocksource_mmio_init(timer_base + TIMER0_VAL_OFF, "armada_370_xp_clocksource",
Signature · 1 line
1.8.1.5
PATCH v3 3/6 clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE
In reply to Ezequiel GarciaThis is almost cosmetic: we achieve a bit of consistency with other clocksource drivers by using the CLOCKSOURCE_OF_DECLARE macro for the boilerplate code.
--- arch/arm/mach-mvebu/armada-370-xp.c | 4 ++-- drivers/clocksource/time-armada-370-xp.c | 7 +++---- include/linux/time-armada-370-xp.h | 16 ---------------- 3 files changed, 5 insertions(+), 22 deletions(-) delete mode 100644 include/linux/time-armada-370-xp.h
arch/arm/mach-mvebu/armada-370-xp.c +2 -2
@@ -18,7 +18,7 @@#include <linux/of_address.h> #include <linux/of_platform.h> #include <linux/io.h> -#include <linux/time-armada-370-xp.h> +#include <linux/clocksource.h> #include <linux/dma-mapping.h> #include <linux/mbus.h> #include <asm/hardware/cache-l2x0.h>
@@ -69,7 +69,7 @@ static void __init armada_370_xp_mbus_init(void)static void __init armada_370_xp_timer_and_clk_init (void ) {of_clk_init (NULL ); -armada_370_xp_timer_init (); +clocksource_of_init ();coherency_init ();armada_370_xp_mbus_init ();#ifdef CONFIG_CACHE_L2X0
drivers/clocksource/time-armada-370-xp.c +3 -4
@@ -30,7 +30,6 @@#include <linux/module.h> #include <linux/sched_clock.h> #include <linux/percpu.h> -#include <linux/time-armada-370-xp.h> /* * Timer block registers.
@@ -219,13 +218,11 @@ static struct notifier_block armada_370_xp_timer_cpu_nb = { .notifier_call = armada_370_xp_timer_cpu_notify, }; -void __init armada_370_xp_timer_init (void ) +static void __init armada_370_xp_timer_init (struct device_node *np) {u32 clr =0 , set =0 ; -struct device_node *np;int res; - np =of_find_compatible_node (NULL ,NULL ,"marvell,armada-370-xp-timer" ); timer_base =of_iomap (np,0 );WARN_ON (!timer_base); local_base =of_iomap (np,1 );
@@ -289,3 +286,5 @@ void __init armada_370_xp_timer_init(void)if (!res)armada_370_xp_timer_setup (this_cpu_ptr (armada_370_xp_evt)); } +CLOCKSOURCE_OF_DECLARE (armada_370_xp,"marvell,armada-370-xp-timer" , + armada_370_xp_timer_init);
include/linux/time-armada-370-xp.h deleted +0 -16
@@ -1,16 +0,0 @@ -/* -* Marvell Armada 370/XP SoC timer handling. -* -* Copyright (C) 2012 Marvell -* -* Lior Amsalem <[email protected]> -* Gregory CLEMENT <[email protected]> -* Thomas Petazzoni <[email protected]> -* -*/ -#ifndef __TIME_ARMADA_370_XPPRCMU_H -#define __TIME_ARMADA_370_XPPRCMU_H - -void armada_370_xp_timer_init (void ); - -#endif
Signature · 1 line
1.8.1.5
PATCH v3 4/6 clocksource: armada-370-xp: Introduce new compatibles
In reply to Ezequiel GarciaThe Armada XP SoC clocksource driver cannot work without the 25 MHz fixed timer. Therefore it's appropriate to introduce a new compatible string and use it to set the 25 MHz fixed timer.
The 'marvell,timer-25MHz' property will be marked as deprecated.
--- drivers/clocksource/time-armada-370-xp.c | 54 +++++++++++++++++++++++--------- 1 file changed, 39 insertions(+), 15 deletions(-)
drivers/clocksource/time-armada-370-xp.c +39 -15
@@ -13,6 +13,19 @@* * Timer 0 is used as free-running clocksource, while timer 1 is * used as clock_event_device. +* +* --- +* Clocksource driver for Armada 370 and Armada XP SoC. +* This driver implements one compatible string for each SoC, given +* each has its own characteristics: +* +* * Armada 370 has no 25 MHz fixed timer. +* +* * Armada XP cannot work properly without such 25 MHz fixed timer as +* doing otherwise leads to using a clocksource whose frequency varies +* when doing cpufreq frequency changes. +* +* See Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt */ #include <linux/init.h>
@@ -218,7 +231,7 @@ static struct notifier_block armada_370_xp_timer_cpu_nb = { .notifier_call = armada_370_xp_timer_cpu_notify, }; -static void __init armada_370_xp_timer_init (struct device_node *np) +static void __init armada_370_xp_timer_common_init (struct device_node *np) {u32 clr =0 , set =0 ;int res;
@@ -227,20 +240,10 @@ static void __init armada_370_xp_timer_init(struct device_node *np)WARN_ON (!timer_base); local_base =of_iomap (np,1 ); -if (of_find_property (np,"marvell,timer-25Mhz" ,NULL )) { -/* The fixed 25MHz timer is available so let's use it */ +if (timer25Mhz) set =TIMER0_25MHZ ; - timer_clk =25000000 ; - }else { -unsigned long rate =0 ; -struct clk *clk =of_clk_get (np,0 ); -WARN_ON (IS_ERR (clk)); - rate =clk_get_rate (clk); - timer_clk = rate /TIMER_DIVIDER ; - +else clr =TIMER0_25MHZ ; - timer25Mhz = false; - }timer_ctrl_clrset (clr, set);/*
@@ -286,5 +289,26 @@ static void __init armada_370_xp_timer_init(struct device_node *np)if (!res)armada_370_xp_timer_setup (this_cpu_ptr (armada_370_xp_evt)); } -CLOCKSOURCE_OF_DECLARE (armada_370_xp,"marvell,armada-370-xp-timer" , - armada_370_xp_timer_init); + +static void __init armada_xp_timer_init (struct device_node *np) +{ +/* The fixed 25MHz timer is required, timer25Mhz is true by default */ + timer_clk =25000000 ; + +armada_370_xp_timer_common_init (np); +} +CLOCKSOURCE_OF_DECLARE (armada_xp,"marvell,armada-xp-timer" , + armada_xp_timer_init); + +static void __init armada_370_timer_init (struct device_node *np) +{ +struct clk *clk =of_clk_get (np,0 ); + +WARN_ON (IS_ERR (clk)); + timer_clk =clk_get_rate (clk) /TIMER_DIVIDER ; + timer25Mhz = false; + +armada_370_xp_timer_common_init (np); +} +CLOCKSOURCE_OF_DECLARE (armada_370,"marvell,armada-370-timer" , + armada_370_timer_init);
Signature · 1 line
1.8.1.5
PATCH v3 5/6 clocksource: armada-370-xp: Fix device-tree binding
In reply to Ezequiel GarciaThis commit fixes the DT binding for the Armada 370/XP SoC timer. The previous "marvell,armada-370-xp-timer" compatible is removed and two new compatible strings are introduced: "marvell,armada-xp-timer" and "marvell,armada-370-timer".
The rationale behind this change is that the Armada 370 SoC and the Armada XP SoC timers are not really compatible:
* Armada 370 has no 25 MHz fixed timer.
* Armada XP cannot work properly without such 25 MHz fixed timer as doing otherwise leads to using a clocksource whose frequency varies when doing cpufreq frequency changes.
This commit also removes the "marvell,timer-25Mhz" property, given it's now meaningless.
--- .../bindings/timer/marvell,armada-370-xp-timer.txt | 27 ++++++++++++++++++---- 1 file changed, 22 insertions(+), 5 deletions(-)
Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt +22 -5
@@ -2,14 +2,31 @@ Marvell Armada 370 and Armada XP Timers --------------------------------------- Required properties: -- compatible: Should be "marvell,armada-370-xp-timer" +- compatible: Should be either "marvell,armada-370-timer" or + "marvell,armada-xp-timer" as appropriate. - interrupts: Should contain the list of Global Timer interrupts and then local timer interrupts - reg: Should contain location and length for timers register. First pair for the Global Timer registers, second pair for the local/private timers. -- clocks: clock driving the timer hardware +- clocks: clock driving the timer hardware, only required for + "marvell,armada-370-timer"; -Optional properties: -- marvell,timer-25Mhz: Tells whether the Global timer supports the 25 - Mhz fixed mode (available on Armada XP and not on Armada 370) +Examples: + +- Armada 370: + + timer { + compatible = "marvell,armada-370-timer"; + reg = <0x20300 0x30>, <0x21040 0x30>; + interrupts = <37>, <38>, <39>, <40>, <5>, <6>; + clocks = <&coreclk 2>; + }; + +- Armada XP: + + timer { + compatible = "marvell,armada-xp-timer"; + reg = <0x20300 0x30>, <0x21040 0x30>; + interrupts = <37>, <38>, <39>, <40>, <5>, <6>; + };
Signature · 1 line
1.8.1.5
PATCH v3 5/6 clocksource: armada-370-xp: Fix device-tree binding
Quoted 14 lines · Ezequiel Garcia
This commit fixes the DT binding for the Armada 370/XP SoC timer. The previous "marvell,armada-370-xp-timer" compatible is removed and two new compatible strings are introduced: "marvell,armada-xp-timer" and "marvell,armada-370-timer".
The rationale behind this change is that the Armada 370 SoC and the Armada XP SoC timers are not really compatible:
* Armada 370 has no 25 MHz fixed timer.
* Armada XP cannot work properly without such 25 MHz fixed timer as doing otherwise leads to using a clocksource whose frequency varies when doing cpufreq frequency changes.
Quoted 8 lines
This commit also removes the "marvell,timer-25Mhz" property, given it's now meaningless.
Cc devicetree at vger.kernel.orgSigned-off-by Ezequiel Garcia <[email protected]>--- .../bindings/timer/marvell,armada-370-xp-timer.txt | 27 ++++++++++++++++++---- 1 file changed, 22 insertions(+), 5 deletions(-)
As there are no native DT-booting Marvell products in the wild yet,
thx,
Jason.
Quoted 45 lines
Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt +22
-5@@ -2,14 +2,31 @@ Marvell Armada 370 and Armada XP Timers --------------------------------------- Required properties: -- compatible: Should be "marvell,armada-370-xp-timer" +- compatible: Should be either "marvell,armada-370-timer" or + "marvell,armada-xp-timer" as appropriate. - interrupts: Should contain the list of Global Timer interrupts and then local timer interrupts - reg: Should contain location and length for timers register. First pair for the Global Timer registers, second pair for the local/private timers. -- clocks: clock driving the timer hardware +- clocks: clock driving the timer hardware, only required for + "marvell,armada-370-timer"; -Optional properties: -- marvell,timer-25Mhz: Tells whether the Global timer supports the 25 - Mhz fixed mode (available on Armada XP and not on Armada 370) +Examples: + +- Armada 370: + + timer { + compatible = "marvell,armada-370-timer"; + reg = <0x20300 0x30>, <0x21040 0x30>; + interrupts = <37>, <38>, <39>, <40>, <5>, <6>; + clocks = <&coreclk 2>; + }; + +- Armada XP: + + timer { + compatible = "marvell,armada-xp-timer"; + reg = <0x20300 0x30>, <0x21040 0x30>; + interrupts = <37>, <38>, <39>, <40>, <5>, <6>; + };Signature · 1 line
1.8.1.5
PATCH v3 6/6 ARM: mvebu: Fix the Armada 370/XP timer compatible strings
In reply to Ezequiel GarciaThe "marvell,armada-370-xp-timer" compatible string, together with the "marvell,timer-25Mhz" property are deprecated and should be removed from current DT.
Instead, the timer DT nodes are now required to have an appropriate compatible string, which should be either "marvell,armada-370-timer" or "marvell,armada-xp-timer", depending on SoC.
The clock property is now required only for Armada 370 so move it accordingly.
--- arch/arm/boot/dts/armada-370-xp.dtsi | 2 -- arch/arm/boot/dts/armada-370.dtsi | 5 +++++ arch/arm/boot/dts/armada-xp.dtsi | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-)
arch/arm/boot/dts/armada-370-xp.dtsi +0 -2
@@ -81,10 +81,8 @@ }; timer at 20300 { - compatible = "marvell,armada-370-xp-timer"; reg = <0x20300 0x30>, <0x21040 0x30>; interrupts = <37>, <38>, <39>, <40>, <5>, <6>; - clocks = <&coreclk 2>; }; sata at a0000 {
arch/arm/boot/dts/armada-370.dtsi +5 -0
@@ -104,6 +104,11 @@ interrupts = <91>; }; + timer at 20300 { + compatible = "marvell,armada-370-timer"; + clocks = <&coreclk 2>; + }; + coreclk: mvebu-sar at 18230 { compatible = "marvell,armada-370-core-clock"; reg = <0x18230 0x08>;
arch/arm/boot/dts/armada-xp.dtsi +1 -1
@@ -62,7 +62,7 @@ }; timer at 20300 { - marvell,timer-25Mhz; + compatible = "marvell,armada-xp-timer"; }; coreclk: mvebu-sar at 18230 {
Signature · 1 line
1.8.1.5
v3 cover Armada 370/XP clocksource fixes
In reply to Ezequiel GarciaQuoted 18 lines · Ezequiel Garcia
This small patchset fixes a somewhat minor issue found in the clocksource driver for Armada 370/XP SoC.
On one side the Armada 370 SoC has no 25 MHz fixed timer.
On the other side the Armada XP SoC cannot work properly without such 25 MHz fixed timer selected, because otherwise the base clock frequency would vary when doing cpufreq frequency changes.Therefore we can consider the SoCs as not being compatible, being better to have two compatible strings, one for each SoC. The previous compatible and its behavior has been removed, considering there are no DT-enabled boards in use in the field.
In addition,
CLOCKSOURCE_OF_DECLAREis used to simplify the initialization.This patchset is based on v3.11-rc4. Also, to ease maintainer's task this is based on these two patches which are in linux-next:
Quoted 7 lines
commit
be14114934545f52be2ffddbe401ba0951007c59
Author: Stephen Boyd <[email protected]> "clocksource: time-armada-370-xp: Divorce from local timer API"commit
4047c794ae18c467a5ea987265238186bc253f61
Author: Stephen Boyd <[email protected]> "clocksource: time-armada-370-xp: Fix sparse warning"
Your patchset does not apply to my tree for timers/core
These two patches described above are in the ARM tree, not available in the timers/core tree.
The correct submission path for these would have been through timers/urgent:
timers/urgent -> v3.11-rcX -> arm-soc
-> timers/core
Or alternatively if it depends on material in arm-soc, a pull request based in a v3.11-rcX where Olof and I can pull from.
I guess you have to rebase your patchset on top of timers/core.
Thanks
-- Daniel
Signature · 5 lines
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
v3 cover Armada 370/XP clocksource fixes
Quoted 34 lines · Daniel Lezcano
Quoted 18 lines · Ezequiel Garcia
This small patchset fixes a somewhat minor issue found in the clocksource driver for Armada 370/XP SoC.
On one side the Armada 370 SoC has no 25 MHz fixed timer.
On the other side the Armada XP SoC cannot work properly without such 25 MHz fixed timer selected, because otherwise the base clock frequency would vary when doing cpufreq frequency changes.Therefore we can consider the SoCs as not being compatible, being better to have two compatible strings, one for each SoC. The previous compatible and its behavior has been removed, considering there are no DT-enabled boards in use in the field.
In addition,
CLOCKSOURCE_OF_DECLAREis used to simplify the initialization.This patchset is based on v3.11-rc4. Also, to ease maintainer's task this is based on these two patches which are in linux-next:
Quoted 7 lines
commit
be14114934545f52be2ffddbe401ba0951007c59
Author: Stephen Boyd <[email protected]> "clocksource: time-armada-370-xp: Divorce from local timer API"commit
4047c794ae18c467a5ea987265238186bc253f61
Author: Stephen Boyd <[email protected]> "clocksource: time-armada-370-xp: Fix sparse warning"Your patchset does not apply to my tree for timers/core
These two patches described above are in the ARM tree, not available in the timers/core tree.
The correct submission path for these would have been through timers/urgent:
Quoted 8 lines
timers/urgent -> v3.11-rcX -> arm-soc
-> timers/coreOr alternatively if it depends on material in arm-soc, a pull request based in a v3.11-rcX where Olof and I can pull from.
I guess you have to rebase your patchset on top of timers/core.
Sure. I'll just send this patchset on top of timers/core.
I guess it was just a silly thing to base this on top of those two patches.
Thanks,
Signature · 3 lines
Ezequiel Garc?a, Free Electrons Embedded Linux, Kernel and Android Engineering http://free-electrons.com
v3 cover Armada 370/XP clocksource fixes
Quoted 38 lines · Ezequiel Garcia
Quoted 37 lines · Daniel Lezcano
Quoted 18 lines · Ezequiel Garcia
This small patchset fixes a somewhat minor issue found in the clocksource driver for Armada 370/XP SoC.
On one side the Armada 370 SoC has no 25 MHz fixed timer.
On the other side the Armada XP SoC cannot work properly without such 25 MHz fixed timer selected, because otherwise the base clock frequency would vary when doing cpufreq frequency changes.Therefore we can consider the SoCs as not being compatible, being better to have two compatible strings, one for each SoC. The previous compatible and its behavior has been removed, considering there are no DT-enabled boards in use in the field.
In addition,
CLOCKSOURCE_OF_DECLAREis used to simplify the initialization.This patchset is based on v3.11-rc4. Also, to ease maintainer's task this is based on these two patches which are in linux-next:
Quoted 7 lines
commit
be14114934545f52be2ffddbe401ba0951007c59
Author: Stephen Boyd <[email protected]> "clocksource: time-armada-370-xp: Divorce from local timer API"commit
4047c794ae18c467a5ea987265238186bc253f61
Author: Stephen Boyd <[email protected]> "clocksource: time-armada-370-xp: Fix sparse warning"Your patchset does not apply to my tree for timers/core
These two patches described above are in the ARM tree, not available in the timers/core tree.
The correct submission path for these would have been through timers/urgent:
timers/urgent -> v3.11-rcX -> arm-soc
-> timers/core
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Or alternatively if it depends on material in arm-soc, a pull request based in a v3.11-rcX where Olof and I can pull from.
I guess you have to rebase your patchset on top of timers/core.
Sure. I'll just send this patchset on top of timers/core.
Ok, thx.
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I guess it was just a silly thing to base this on top of those two patches.
Thanks,
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