powerpc: Use print_size() where appropriate
PATCH v2 1/2 powerpc: Use print_size() where appropriate
Makes the startup output more consistent
--- arch/powerpc/cpu/mpc824x/cpu.c | 8 +++----- arch/powerpc/cpu/mpc85xx/cpu_init.c | 8 +++++--- arch/powerpc/cpu/mpc8xx/cpu.c | 24 +++++++++++------------- arch/powerpc/cpu/mpc8xxx/ddr/main.c | 3 ++- 4 files changed, 21 insertions(+), 22 deletions(-)
v2: Address all the checkpatch warnings
Hello PowerPC Custodians,
These are two simple patches I've been playing with as part of my learning process. I realize that perhaps pieces of these patches should be submitted to their respective custodians, but given their simplicity I'm thinking one of the powerpc custodians can apply them (York perhaps) to their tree if nobody objects
I compile-tested these patches on all the mpc8xx and mpc8[356]xxx powerpc boards/targets and I run them on one board each of the following families of SoC(s): MPC8xx, MPC83xx and MPC85xx
Checkpatch runs with no warnings
Regards,
Shruti.
arch/powerpc/cpu/mpc824x/cpu.c +3 -5
@@ -45,12 +45,10 @@ int checkcpu (void)return -1 ;/* no valid CPU revision info */ } -printf (" at %s MHz:" ,strmhz (buf, clock)); +printf (" at %s MHz: " ,strmhz (buf, clock)); -printf (" %u kB I-Cache" ,checkicache () >>10 ); -printf (" %u kB D-Cache" ,checkdcache () >>10 ); - -puts ("\n" ); +print_size (checkicache ()," I-Cache " ); +print_size (checkdcache ()," D-Cache\n" );return 0 ; }
arch/powerpc/cpu/mpc85xx/cpu_init.c +5 -3
@@ -166,7 +166,8 @@ static void enable_cpc(void) } -printf ("Corenet Platform Cache: %d KB enabled\n" , size); +puts ("Corenet Platform Cache: " ); +print_size (size *1024 ," enabled\n" ); }static void invalidate_cpc (void )
@@ -525,13 +526,14 @@ int cpu_init_r(void)if (CONFIG_SYS_INIT_L2CSR0 &L2CSR0_L2E ) {while (!(mfspr (SPRN_L2CSR0 ) &L2CSR0_L2E )) ; -printf ("%d KB enabled\n" , (l2cfg0 &0x3fff ) *64 ); +print_size ((l2cfg0 &0x3fff ) *64 *1024 ," enabled\n" ); } skip_l2:#elif defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2 )if (l2cache->l2csr0 &L2CSR0_L2E ) -printf ("%d KB enabled\n" , (l2cache->l2cfg0 &0x3fff ) *64 ); +print_size ((l2cache->l2cfg0 &0x3fff ) *64 *1024 , +" enabled\n" );enable_cluster_l2 ();#else
arch/powerpc/cpu/mpc8xx/cpu.c +11 -13
@@ -136,10 +136,8 @@ static int check_CPU (long clock, uint pvr, uint immr)#else printf (" at %s MHz: " ,strmhz (buf, clock));#endif -printf ("%u kB I-Cache %u kB D-Cache" , -checkicache () >>10 , -checkdcache () >>10 - ); +print_size (checkicache ()," I-Cache " ); +print_size (checkdcache ()," D-Cache" );/* do we have a FEC (860T/P or 852/859/866/885)? */
@@ -204,10 +202,10 @@ static int check_CPU (long clock, uint pvr, uint immr)printf ("unknown MPC857 (0x%08x)" , k);#endif -printf (" at %s MHz:" ,strmhz (buf, clock)); +printf (" at %s MHz: " ,strmhz (buf, clock)); -printf (" %u kB I-Cache" ,checkicache () >>10 ); -printf (" %u kB D-Cache" ,checkdcache () >>10 ); +print_size (checkicache ()," I-Cache " ); +print_size (checkdcache ()," D-Cache" );/* lets check and see if we're running on a 862T (or P?) */
@@ -265,10 +263,10 @@ static int check_CPU (long clock, uint pvr, uint immr)if (suf)printf ("PPC823ZTnn%s" , suf); -printf (" at %s MHz:" ,strmhz (buf, clock)); +printf (" at %s MHz: " ,strmhz (buf, clock)); -printf (" %u kB I-Cache" ,checkicache () >>10 ); -printf (" %u kB D-Cache" ,checkdcache () >>10 ); +print_size (checkicache ()," I-Cache " ); +print_size (checkdcache ()," D-Cache" );/* lets check and see if we're running on a 860T (or P?) */
@@ -321,10 +319,10 @@ static int check_CPU (long clock, uint pvr, uint immr)default :printf ("unknown MPC850 (0x%08x)" , k); } -printf (" at %s MHz:" ,strmhz (buf, clock)); +printf (" at %s MHz: " ,strmhz (buf, clock)); -printf (" %u kB I-Cache" ,checkicache () >>10 ); -printf (" %u kB D-Cache" ,checkdcache () >>10 ); +print_size (checkicache ()," I-Cache " ); +print_size (checkdcache ()," D-Cache" );/* lets check and see if we're running on a 850T (or P?) */
arch/powerpc/cpu/mpc8xxx/ddr/main.c +2 -1
@@ -683,7 +683,8 @@ phys_size_t fsl_ddr_sdram(void)#if !defined(CONFIG_PHYS_64BIT )/* Check for 4G or more. Bad. */ if (total_memory >= (1ull <<32 )) { -printf ("Detected %lld MB of memory\n" , total_memory >>20 ); +puts ("Detected " ); +print_size (total_memory," of memory\n" );printf (" This U-Boot only supports < 4G of DDR\n" );printf (" You could rebuild it with CONFIG_PHYS_64BIT\n" );printf (" " );/* re-align to match init_func_ram print */
Signature · 1 line
1.8.3.1
PATCH v2 2/2 powerpcv2: Print hardcoded size like print_size() does
Makes the startup output more consistent
--- arch/powerpc/cpu/mpc824x/cpu.c | 2 +- arch/powerpc/cpu/mpc85xx/cpu.c | 2 +- arch/powerpc/cpu/mpc85xx/cpu_init.c | 14 +++++++------- arch/powerpc/cpu/mpc86xx/cpu.c | 6 +++--- arch/powerpc/cpu/mpc8xx/cpu.c | 6 +++--- arch/powerpc/cpu/mpc8xx/video.c | 4 ++-- arch/powerpc/cpu/ppc4xx/cpu.c | 8 ++++---- 7 files changed, 21 insertions(+), 21 deletions(-)
arch/powerpc/cpu/mpc824x/cpu.c +1 -1
@@ -45,7 +45,7 @@ int checkcpu (void)return -1 ;/* no valid CPU revision info */ } -printf (" at %s MHz: " ,strmhz (buf, clock)); +printf (" at %s MHz: " ,strmhz (buf, clock));print_size (checkicache ()," I-Cache " );print_size (checkdcache ()," D-Cache\n" );
arch/powerpc/cpu/mpc85xx/cpu.c +1 -1
@@ -209,7 +209,7 @@ int checkcpu (void)printf (" PME: %s MHz\n" ,strmhz (buf1, sysinfo.freqPME));#endif -puts ("L1: D-cache 32 kB enabled\n I-cache 32 kB enabled\n" ); +puts ("L1: D-cache 32 KiB enabled\n I-cache 32 KiB enabled\n" );#ifdef CONFIG_FSL_CORENET /* Display the RCW, so that no one gets confused as to what RCW
arch/powerpc/cpu/mpc85xx/cpu_init.c +7 -7
@@ -457,28 +457,28 @@ int cpu_init_r(void)case 0x1 :if (ver ==SVR_8540 || ver ==SVR_8560 || ver ==SVR_8541 || ver ==SVR_8555 ) { -puts ("128 KB " ); -/* set L2E=1, L2I=1, & L2BLKSZ=1 (128 Kbyte) */ +puts ("128 KiB " ); +/* set L2E=1, L2I=1, & L2BLKSZ=1 (128 KiBibyte) */ cache_ctl =0xc4000000 ; }else { -puts ("256 KB " ); +puts ("256 KiB " ); cache_ctl =0xc0000000 ;/* set L2E=1, L2I=1, & L2SRAM=0 */ }break ;case 0x2 :if (ver ==SVR_8540 || ver ==SVR_8560 || ver ==SVR_8541 || ver ==SVR_8555 ) { -puts ("256 KB " ); -/* set L2E=1, L2I=1, & L2BLKSZ=2 (256 Kbyte) */ +puts ("256 KiB " ); +/* set L2E=1, L2I=1, & L2BLKSZ=2 (256 KiBibyte) */ cache_ctl =0xc8000000 ; }else { -puts ("512 KB " ); +puts ("512 KiB " );/* set L2E=1, L2I=1, & L2SRAM=0 */ cache_ctl =0xc0000000 ; }break ;case 0x3 : -puts ("1024 KB " ); +puts ("1024 KiB " );/* set L2E=1, L2I=1, & L2SRAM=0 */ cache_ctl =0xc0000000 ;break ;
arch/powerpc/cpu/mpc86xx/cpu.c +3 -3
@@ -85,8 +85,8 @@ checkcpu(void) sysinfo.freqLocalBus); } -puts ("L1: D-cache 32 KB enabled\n" ); -puts (" I-cache 32 KB enabled\n" ); +puts ("L1: D-cache 32 KiB enabled\n" ); +puts (" I-cache 32 KiB enabled\n" );puts ("L2: " );if (get_l2cr () &0x80000000 ) {
@@ -95,7 +95,7 @@ checkcpu(void)#elif defined(CONFIG_MPC8641 )puts ("512" );#endif -puts (" KB enabled\n" ); +puts (" KiB enabled\n" ); }else {puts ("Disabled\n" ); }
arch/powerpc/cpu/mpc8xx/cpu.c +3 -3
@@ -202,7 +202,7 @@ static int check_CPU (long clock, uint pvr, uint immr)printf ("unknown MPC857 (0x%08x)" , k);#endif -printf (" at %s MHz: " ,strmhz (buf, clock)); +printf (" at %s MHz: " ,strmhz (buf, clock));print_size (checkicache ()," I-Cache " );print_size (checkdcache ()," D-Cache" );
@@ -263,7 +263,7 @@ static int check_CPU (long clock, uint pvr, uint immr)if (suf)printf ("PPC823ZTnn%s" , suf); -printf (" at %s MHz: " ,strmhz (buf, clock)); +printf (" at %s MHz: " ,strmhz (buf, clock));print_size (checkicache ()," I-Cache " );print_size (checkdcache ()," D-Cache" );
@@ -319,7 +319,7 @@ static int check_CPU (long clock, uint pvr, uint immr)default :printf ("unknown MPC850 (0x%08x)" , k); } -printf (" at %s MHz: " ,strmhz (buf, clock)); +printf (" at %s MHz: " ,strmhz (buf, clock));print_size (checkicache ()," I-Cache " );print_size (checkdcache ()," D-Cache" );
arch/powerpc/cpu/mpc8xx/video.c +2 -2
@@ -1177,7 +1177,7 @@ static void *video_logo (void)#ifndef CONFIG_FADS /* all normal boards */ /* leave one blank line */ -sprintf (info,"MPC823 CPU at %s MHz, %ld MB RAM, %ld MB Flash" , +sprintf (info,"MPC823 CPU at %s MHz, %ld MiB RAM, %ld MiB Flash" ,strmhz (temp, gd->cpu_clk), gd->ram_size >>20 , gd->bd->bi_flashsize >>20 );
@@ -1188,7 +1188,7 @@ static void *video_logo (void)video_drawstring (VIDEO_INFO_X ,VIDEO_INFO_Y +VIDEO_FONT_HEIGHT , info); -sprintf (info,"2MB FLASH - 8MB DRAM - 4MB SRAM" ); +sprintf (info,"2MiB FLASH - 8MiB DRAM - 4MiB SRAM" );video_drawstring (VIDEO_INFO_X ,VIDEO_INFO_Y +VIDEO_FONT_HEIGHT *2 , info);#endif
arch/powerpc/cpu/ppc4xx/cpu.c +4 -4
@@ -647,12 +647,12 @@ int checkcpu (void)#endif #if defined(CONFIG_405EP ) || defined(CONFIG_405EZ ) || defined(CONFIG_405EX ) -printf (" 16 kB I-Cache 16 kB D-Cache" ); +printf (" 16 KiB I-Cache 16 KiB D-Cache" );#elif defined(CONFIG_440 ) -printf (" 32 kB I-Cache 32 kB D-Cache" ); +printf (" 32 KiB I-Cache 32 KiB D-Cache" );#else -printf (" 16 kB I-Cache %d kB D-Cache" , - ((pvr |0x00000001 ) ==PVR_405GPR_RB ) ?16 :8 ); +printf (" 16 KiB I-Cache %d KiB D-Cache" , + ((pvr |0x00000001 ) ==PVR_405GPR_RB ) ?16 :8 );#endif #endif /* !defined(CONFIG_405) */
Signature · 1 line
1.8.3.1
PATCH v2 2/2 powerpcv2: Print hardcoded size like print_size() does
Stefan,
Would you ack this patch? It has a minor change to arch/powerpc/cpu/ppc4xx/cpu.c.
Quoted 15 lines · Shruti Kanetkar
Makes the startup output more consistent
Signed-off-by Shruti Kanetkar <[email protected]>Acked-by Andy Fleming <[email protected]>---
arch/powerpc/cpu/mpc824x/cpu.c| 2 +-arch/powerpc/cpu/mpc85xx/cpu.c | 2 +- arch/powerpc/cpu/mpc85xx/cpu_init.c | 14 +++++++------- arch/powerpc/cpu/mpc86xx/cpu.c | 6 +++--- arch/powerpc/cpu/mpc8xx/cpu.c | 6 +++--- arch/powerpc/cpu/mpc8xx/video.c | 4 ++-- arch/powerpc/cpu/ppc4xx/cpu.c | 8 ++++---- 7 files changed, 21 insertions(+), 21 deletions(-)
<snip>
Quoted 12 lines
arch/powerpc/cpu/ppc4xx/cpu.c +1
-1@@ -647,12 +647,12 @@ int checkcpu (void)#endif #if defined(CONFIG_405EP ) || defined(CONFIG_405EZ ) || defined(CONFIG_405EX ) -printf (" 16 kB I-Cache 16 kB D-Cache" ); +printf (" 16 KiB I-Cache 16 KiB D-Cache" );#elif defined(CONFIG_440 )
arch/powerpc/cpu/ppc4xx/cpu.c int checkcpu (void) · line 658
Quoted 10 lines
arch/powerpc/cpu/ppc4xx/cpu.c +3
-3-printf (" 32 kB I-Cache 32 kB D-Cache" ); +printf (" 32 KiB I-Cache 32 KiB D-Cache" );#else -printf (" 16 kB I-Cache %d kB D-Cache" , - ((pvr |0x00000001 ) ==PVR_405GPR_RB ) ?16 :8 ); +printf (" 16 KiB I-Cache %d KiB D-Cache" , + ((pvr |0x00000001 ) ==PVR_405GPR_RB ) ?16 :8 );#endif #endif /* !defined(CONFIG_405) */
Thanks.
York
PATCH v2 2/2 powerpcv2: Print hardcoded size like print_size() does
York,
Quoted 8 lines · York Sun
Would you ack this patch? It has a minor change to
arch/powerpc/cpu/ppc4xx/cpu.c.Quoted 4 lines · Shruti Kanetkar
Makes the startup output more consistent
Signed-off-by Shruti Kanetkar <[email protected]>Acked-by Andy Fleming <[email protected]>
Sure:
Thanks,
Stefan