ARM: OMAP: DTS/HWMOD/defconfig changes for USB3
Subsystems (5)
v3 cover ARM: OMAP: DTS/HWMOD/defconfig changes for USB3
From: Felipe Balbi <[email protected]>
With these patches (plus a few others on the driver side which will be going upstream soon) I could get functional USB3 with my omap5-uevm platform.
Changes since v2:
- added dt properties for enabling vbus/id interrupts and fixed
vbus-supply value after SMPS10 is modeled as 2 regulators
Changes since v1:
- split ocp2scp dts and hwmod data into separate patches
- reorganize the series in order to group DTS, hwmod and defconfig changes
Benoit Cousson (1):
arm: omap5: hwmod: add missing ocp2scp hwmod data
Felipe Balbi (4):
arm: omap5: dts: fix reg property size
arm: omap5: dts: fix ocp2scp DTS data
arm: omap5: dts: add palmas-usb node
arm: omap2plus_defconfig: enable dwc3 and dependencies
arch/arm/boot/dts/omap5-uevm.dts | 12 ++++++++ arch/arm/boot/dts/omap5.dtsi | 9 +++--- arch/arm/configs/omap2plus_defconfig | 9 ++++++ arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 45 ++++++++++++++++++++++++++++ 4 files changed, 71 insertions(+), 4 deletions(-)
Signature · 1 line
1.7.10.4
PATCH v3 1/5 arm: omap5: dts: fix reg property size
From: Felipe Balbi <[email protected]>
USB3 block has a 64KiB space, another 64KiB is used for the wrapper.
Without this change, resource_size() will get confused and driver won't probe because size will be negative.
--- arch/arm/boot/dts/omap5.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/omap5.dtsi +2 -2
@@ -637,7 +637,7 @@ omap_dwc3@4a020000 { compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss"; - reg = <0x4a020000 0x1000>; + reg = <0x4a020000 0x10000>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <1>;
@@ -645,7 +645,7 @@ ranges; dwc3@4a030000 { compatible = "synopsys,dwc3"; - reg = <0x4a030000 0x1000>; + reg = <0x4a030000 0x10000>; interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; usb-phy = <&usb2_phy>, <&usb3_phy>; tx-fifo-resize;
Signature · 1 line
1.7.10.4
PATCH v3 2/5 arm: omap5: dts: fix ocp2scp DTS data
In reply to Kishon Vijay Abraham IFrom: Felipe Balbi <[email protected]>
this patch fixes the DTS data for ocp2scp
node by adding the missing reg property.
--- arch/arm/boot/dts/omap5.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm/boot/dts/omap5.dtsi +2 -1
@@ -652,10 +652,11 @@ }; }; - ocp2scp { + ocp2scp@4a080000 { compatible = "ti,omap-ocp2scp"; #address-cells = <1>; #size-cells = <1>; + reg = <0x4a080000 0x20>; ranges; ti,hwmods = "ocp2scp1"; usb2_phy: usb2phy@4a084000 {
Signature · 1 line
1.7.10.4
PATCH v3 3/5 arm: omap5: dts: add palmas-usb node
In reply to Kishon Vijay Abraham IFrom: Felipe Balbi <[email protected]>
Without this node, there will be no palmas
driver to notify dwc3 that a cable has
been connected and, without that, dwc3
will never initialize.
[ [email protected]: added dt properties for enabling vbus/id interrupts and fixed vbus-supply value after SMPS10 is modeled as 2 regulators ]
--- arch/arm/boot/dts/omap5-uevm.dts | 12 ++++++++++++ arch/arm/boot/dts/omap5.dtsi | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-)
arch/arm/boot/dts/omap5-uevm.dts +12 -0
@@ -272,6 +272,13 @@ interrupt-controller; #interrupt-cells = <2>; + extcon_usb3: palmas_usb { + compatible = "ti,palmas-usb-vid"; + ti,enable-vbus-detection; + ti,enable-id-detection; + ti,wakeup; + }; + palmas_pmic { compatible = "ti,palmas-pmic"; interrupt-parent = <&palmas>;
@@ -470,6 +477,11 @@ phys = <0 &hsusb2_phy &hsusb3_phy>; }; +&usb3 { + extcon = <&extcon_usb3>; + vbus-supply = <&smps10_out1_reg>; +}; + &mcspi1 { };
arch/arm/boot/dts/omap5.dtsi +1 -1
@@ -634,7 +634,7 @@ ti,type = <2>; }; - omap_dwc3@4a020000 { + usb3: omap_dwc3@4a020000 { compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss"; reg = <0x4a020000 0x10000>;
Signature · 1 line
1.7.10.4
PATCH v3 4/5 arm: omap5: hwmod: add missing ocp2scp hwmod data
In reply to Kishon Vijay Abraham IFrom: Benoit Cousson <[email protected]>
without that hwmod data, USB3 will not in OMAP5 boards.
--- arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 45 ++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+)
arch/arm/mach-omap2/omap_hwmod_54xx_data.c +45 -0
@@ -1114,6 +1114,42 @@ static struct omap_hwmod omap54xx_mpu_hwmod = { };/* +* 'ocp2scp' class +* bridge to transform ocp interface protocol to scp (serial control port) +* protocol +*/ + +static struct omap_hwmod_class_sysconfig omap54xx_ocp2scp_sysc = { + .rev_offs =0x0000 , + .sysc_offs =0x0010 , + .syss_offs =0x0014 , + .sysc_flags = (SYSC_HAS_AUTOIDLE |SYSC_HAS_SIDLEMODE | +SYSC_HAS_SOFTRESET |SYSS_HAS_RESET_STATUS ), + .idlemodes = (SIDLE_FORCE |SIDLE_NO |SIDLE_SMART ), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap54xx_ocp2scp_hwmod_class = { + .name ="ocp2scp" , + .sysc = &omap54xx_ocp2scp_sysc, +}; + +/* ocp2scp1 */ +static struct omap_hwmod omap54xx_ocp2scp1_hwmod = { + .name ="ocp2scp1" , + .class = &omap54xx_ocp2scp_hwmod_class, + .clkdm_name ="l3init_clkdm" , + .main_clk ="l4_root_clk_div" , + .prcm = { + .omap4 = { + .clkctrl_offs =OMAP54XX_CM_L3INIT_OCP2SCP1_CLKCTRL_OFFSET , + .context_offs =OMAP54XX_RM_L3INIT_OCP2SCP1_CONTEXT_OFFSET , + .modulemode =MODULEMODE_HWCTRL , + }, + }, +}; + +/* * 'timer' class * general purpose timer module with accurate 1ms tick * This class contains several variants: ['timer_1ms', 'timer']
@@ -1920,6 +1956,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mpu = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_cfg -> ocp2scp1 */ +static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp1 = { + .master = &omap54xx_l4_cfg_hwmod, + .slave = &omap54xx_ocp2scp1_hwmod, + .clk ="l4_root_clk_div" , + .user =OCP_USER_MPU |OCP_USER_SDMA , +}; +/* l4_wkup -> timer1 */ static struct omap_hwmod_ocp_if omap54xx_l4_wkup__timer1 = { .master = &omap54xx_l4_wkup_hwmod,
@@ -2122,6 +2166,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { &omap54xx_l4_per__mmc4, &omap54xx_l4_per__mmc5, &omap54xx_l4_cfg__mpu, + &omap54xx_l4_cfg__ocp2scp1, &omap54xx_l4_wkup__timer1, &omap54xx_l4_per__timer2, &omap54xx_l4_per__timer3,
Signature · 1 line
1.7.10.4
PATCH v3 5/5 arm: omap2plus_defconfig: enable dwc3 and dependencies
In reply to Kishon Vijay Abraham IFrom: Felipe Balbi <[email protected]>
DWC3 enables USB3 functionality for OMAP5 boards, it's safe to enable those drivers in omap2plus_defconfig.
--- arch/arm/configs/omap2plus_defconfig | 9 +++++++++ 1 file changed, 9 insertions(+)
arch/arm/configs/omap2plus_defconfig +9 -0
@@ -81,6 +81,7 @@ CONFIG_CMA=y CONFIG_CONNECTOR=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y +CONFIG_OMAP_OCP2SCP=y CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CHAR=y
@@ -167,9 +168,11 @@ CONFIG_THERMAL_GOV_USER_SPACE=y CONFIG_CPU_THERMAL=y CONFIG_OMAP_WATCHDOG=y CONFIG_TWL4030_WATCHDOG=y +CONFIG_MFD_PALMAS=y CONFIG_MFD_TPS65217=y CONFIG_MFD_TPS65910=y CONFIG_TWL6040_CORE=y +CONFIG_REGULATOR_PALMAS=y CONFIG_REGULATOR_TWL4030=y CONFIG_REGULATOR_TPS65023=y CONFIG_REGULATOR_TPS6507X=y
@@ -222,10 +225,14 @@ CONFIG_USB_MON=y CONFIG_USB_WDM=y CONFIG_USB_STORAGE=y CONFIG_USB_LIBUSUAL=y +CONFIG_USB_DWC3=m +CONFIG_USB_DWC3_OMAP=m CONFIG_USB_TEST=y CONFIG_USB_PHY=y CONFIG_NOP_USB_XCEIV=y CONFIG_USB_GADGET=y +CONFIG_OMAP_USB2=y +CONFIG_OMAP_USB3=y CONFIG_USB_GADGET_DEBUG=y CONFIG_USB_GADGET_DEBUG_FILES=y CONFIG_USB_GADGET_DEBUG_FS=y
@@ -258,6 +265,8 @@ CONFIG_TI_THERMAL=y CONFIG_OMAP4_THERMAL=y CONFIG_OMAP5_THERMAL=y CONFIG_DRA752_THERMAL=y +CONFIG_EXTCON=y +CONFIG_EXTCON_PALMAS=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y # CONFIG_EXT3_FS_XATTR is not set
Signature · 1 line
1.7.10.4
Hi Kishon,
Quoted 9 lines · Kishon Vijay Abraham I
From: Felipe Balbi <[email protected]>
With these patches (plus a few others on the driver side which will be going upstream soon) I could get functional USB3 with my omap5-uevm platform.
Changes since v2:
- added dt properties for enabling vbus/id interrupts and fixed
vbus-supply value after SMPS10 is modeled as 2 regulators
Excellent, thanks for that super quick update. I've just applied it and will try to push it ASAP. I've just slightly changed the subjects to have both ARM and OMAP in capital letters for consistency.
Tony,
I will update my pull-request now before Kevin and Olof pulled it.
Regards,
Benoit
Quoted 20 lines
Changes since v1:
- split ocp2scp dts and hwmod data into separate patches
- reorganize the series in order to group DTS, hwmod and defconfig changesBenoit Cousson (1):
arm: omap5: hwmod: add missing ocp2scp hwmod dataFelipe Balbi (4):
arm: omap5: dts: fix reg property size
arm: omap5: dts: fix ocp2scp DTS data
arm: omap5: dts: add palmas-usb node
arm:omap2plus_defconfig: enable dwc3 and dependenciesarch/arm/boot/dts/omap5-uevm.dts | 12 ++++++++ arch/arm/boot/dts/omap5.dtsi | 9 +++--- arch/arm/configs/omap2plus_defconfig | 9 ++++++ arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 45 ++++++++++++++++++++++++++++ 4 files changed, 71 insertions(+), 4 deletions(-)