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mmc:sdhci: Fix card ready status timeout.

PATCH New Przemyslaw Marczak 2 participants 3 messages Aug 28, 2013 – Sep 2, 2013 MMC, SD and SDIO

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#0 lore raw

PATCH 1/1 mmc:sdhci: Fix card ready status timeout.

According to JEDEC eMMC specification, after data transfer (multiple or single block) host must wait for card ready status. This is done by waiting for command and data lines to be at idle state after transfer. JEDEC does not specify maximum timeout.

Before this change max timeout was 10 ms but in case of UMS
- when system do multiple read/write operations on random card blocks - timeout causes I/O errors.
The timeout has been increased to 200ms after data transfer. For other transfers it stays unchanged.

Tested on Goni and Trats.

---
 drivers/mmc/sdhci.c |    6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
drivers/mmc/sdhci.c +4 -2
index 4261991..22c18d1 100644
@@ -121,8 +121,10 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 	unsigned int timeout, start_addr = 0;
 	unsigned int retry = 10000;
 
-	/* Wait max 10 ms */
-	timeout = 10;
+	if (!data)
+		timeout = 200;
+	else
+		timeout = 10;
 
 	sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
 	mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH 1/1 mmc:sdhci: Fix card ready status timeout.

Hi Przemyslaw,

Could you give me the test-case?
I want to test this problem.

Quoted 25 lines · Przemyslaw Marczak

According to JEDEC eMMC specification, after data transfer (multiple or single block) host must wait for card ready status. This is done by waiting for command and data lines to be at idle state after transfer. JEDEC does not specify maximum timeout.

Before this change max timeout was 10 ms but in case of UMS
- when system do multiple read/write operations on random card blocks - timeout causes I/O errors.
The timeout has been increased to 200ms after data transfer. For other transfers it stays unchanged.

Tested on Goni and Trats.

---
 drivers/mmc/sdhci.c |    6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
drivers/mmc/sdhci.c +0 -0
index 4261991..22c18d1 100644

drivers/mmc/sdhci.c int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, · line 127

Quoted 9 lines
drivers/mmc/sdhci.c +4 -2
@@ -121,8 +121,10 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 	unsigned int timeout, start_addr = 0;
 	unsigned int retry = 10000;
 
-	/* Wait max 10 ms */
-	timeout = 10;
+	if (!data)
+		timeout = 200;
+	else
+		timeout = 10;

And timeout = data ? 10 : 200; ?

Best Regards,
Jaehoon Chung

Quoted 4 lines
drivers/mmc/sdhci.c +0 -0
 	sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
 	mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
 
#2 lore raw

PATCH 1/1 mmc:sdhci: Fix card ready status timeout.

Quoted 22 lines · Jaehoon Chung

Hi Przemyslaw,

Could you give me the test-case?
I want to test this problem.

Quoted 16 lines · Przemyslaw Marczak

According to JEDEC eMMC specification, after data transfer (multiple or single block) host must wait for card ready status. This is done by waiting for command and data lines to be at idle state after transfer. JEDEC does not specify maximum timeout.

Before this change max timeout was 10 ms but in case of UMS
- when system do multiple read/write operations on random card blocks - timeout causes I/O errors.
The timeout has been increased to 200ms after data transfer. For other transfers it stays unchanged.

Tested on Goni and Trats.

Hello,

You can ease reproduce this problem by typing "ums" on prompt(Trats). If you are using Goni (without ums config), the problem is hard to reproduce in this case. Sometimes read one block from mmc just after start causes error and then you can see information "Controller never released inhibit bit(s)".
Patch will be completed with some code comment.

Thank you

Signature · 4 lines
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marczak at samsung.com