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pm80xx: Phy settings support for motherboard controller.

PATCH New Anand 1 participant 1 message Oct 1, 2013

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SCSI PMC sierra PM8001 driver
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PATCH v3 9/10 pm80xx: Phy settings support for motherboard controller.

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From 8dd505680728f054ebca875e00cf4218e1105ab5 Mon Sep 17 00:00:00 2001

From: Anand Kumar Santhanam <[email protected]>
Date: Wed, 18 Sep 2013 13:02:44 +0530
Subject: [PATCH V3 09/10] pm80xx: Phy settings support for motherboard controller.

Phy profile implementation to support phy settings feature for motherboard controllers.

Signed-off-by [email protected]
Reviewed-by Jack Wang <[email protected]>
---
 drivers/scsi/pm8001/pm8001_hwi.c  |   10 ++++++
 drivers/scsi/pm8001/pm8001_init.c |   29 +++++++++++++++++
 drivers/scsi/pm8001/pm8001_sas.h  |    3 +-
 drivers/scsi/pm8001/pm80xx_hwi.c  |   61 +++++++++++++++++++++++++++++++++++-
 drivers/scsi/pm8001/pm80xx_hwi.h  |    4 ++
 5 files changed, 104 insertions(+), 3 deletions(-)
drivers/scsi/pm8001/pm8001_hwi.c +10 -0
index 600e61e..d1d52e2 100644
@@ -4831,6 +4831,16 @@ int pm8001_chip_get_nvmd_req(struct pm8001_hba_info *pm8001_ha,
 		    cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_lo);
 		break;
 	}
+	case IOP_RDUMP: {
+		nvmd_req.len_ir_vpdd = cpu_to_le32(IPMode | IOP_RDUMP);
+		nvmd_req.resp_len = cpu_to_le32(ioctl_payload->length);
+		nvmd_req.vpd_offset = cpu_to_le32(ioctl_payload->offset);
+		nvmd_req.resp_addr_hi =
+		cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi);
+		nvmd_req.resp_addr_lo =
+		cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_lo);
+		break;
+	}
 	default:
 		break;
 	}
drivers/scsi/pm8001/pm8001_init.c +29 -0
index a862fd1..87d3a2e 100644
@@ -667,6 +667,31 @@ static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
 #endif
 }
 
+/*
+ * pm8001_get_phy_settings_info : Read phy setting values.
+ * @pm8001_ha : our hba.
+ */
+void pm8001_get_phy_settings_info(struct pm8001_hba_info *pm8001_ha)
+{
+
+#ifdef PM8001_READ_VPD
+	/*OPTION ROM FLASH read for the SPC cards */
+	DECLARE_COMPLETION_ONSTACK(completion);
+	struct pm8001_ioctl_payload payload;
+
+	pm8001_ha->nvmd_completion = &completion;
+	/* SAS ADDRESS read from flash / EEPROM */
+	payload.minor_function = 6;
+	payload.offset = 0;
+	payload.length = 4096;
+	payload.func_specific = kzalloc(4096, GFP_KERNEL);
+	/* Read phy setting values from flash */
+	PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload);
+	wait_for_completion(&completion);
+	pm8001_set_phy_profile(pm8001_ha, sizeof(u8), payload.func_specific);
+#endif
+}
+
 #ifdef PM8001_USE_MSIX
 /**
  * pm8001_setup_msix - enable MSI-X interrupt

@@ -847,6 +872,10 @@ static int pm8001_pci_probe(struct pci_dev *pdev,
 	}
 
 	pm8001_init_sas_add(pm8001_ha);
+	/* phy setting support for motherboard controller */
+	if (pdev->subsystem_vendor != PCI_VENDOR_ID_ADAPTEC2 &&
+		pdev->subsystem_vendor != 0)
+		pm8001_get_phy_settings_info(pm8001_ha);
 	pm8001_post_sas_ha_init(shost, chip);
 	rc = sas_register_ha(SHOST_TO_SAS_HA(shost));
 	if (rc)
drivers/scsi/pm8001/pm8001_sas.h +2 -1
index 68e1147..cbde11a 100644
@@ -632,7 +632,8 @@ struct pm8001_device *pm8001_find_dev(struct pm8001_hba_info *pm8001_ha,
 int pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha);
 
 int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
-
+void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha,
+	u32 length, u8 *buf);
 /* ctl shared API */
 extern struct device_attribute *pm8001_host_attrs[];
drivers/scsi/pm8001/pm80xx_hwi.c +59 -2

74 lines not on this page · raw message

drivers/scsi/pm8001/pm80xx_hwi.h +4 -0
index 9a9116d..872d5cf 100644
@@ -170,6 +170,10 @@
 #define LINKRATE_60			(0x06 << 8)
 #define LINKRATE_120			(0x08 << 8)
 
+/* phy_profile */
+#define SAS_PHY_ANALOG_SETTINGS_PAGE	0x04
+#define PHY_DWORD_LENGTH		0xC
+
 /* Thermal related */
 #define	THERMAL_ENABLE			0x1
 #define	THERMAL_LOG_ENABLE		0x1
Signature · 1 line
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