ARM: tegra: Correct the length of AHB register space

arch/arm/boot/dts/tegra114.dtsi line 89

Quoted 9 lines · Mark Zhang

On Tegra114 it should be 0x12c.

arch/arm/boot/dts/tegra114.dtsi +1 -1

 
 	ahb: ahb {
 		compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb";
-		reg = <0x6000c004 0x14c>;
+		reg = <0x6000c004 0x12c>;
 	};

I don't think this is correct.

0x12c /is/ the address of the last defined register that exists. However, the system memory map table in the TRM indicates that 336 bytes of address space are allocated for this module, so the value should be 0x150 (minus 4 due to the base address offset of 4, so 0x14c) for all of Tegra30/114/124. That matches what's already in DT.

For Tegra20, the TRM says that 268 bytes of address space are allocated (which already takes account of the 4-byte base address offset) yielding a size of 0x10c, which matches what's already in the DT.

Quoted 13 lines · Stephen Warren

arch/arm/boot/dts/tegra114.dtsi line 89

Quoted 9 lines · Mark Zhang

On Tegra114 it should be 0x12c.

arch/arm/boot/dts/tegra114.dtsi +1 -1

 
 	ahb: ahb {
 		compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb";
-		reg = <0x6000c004 0x14c>;
+		reg = <0x6000c004 0x12c>;
 	};

I don't think this is correct.

Quoted 6 lines

0x12c /is/ the address of the last defined register that exists. However, the system memory map table in the TRM indicates that 336 bytes of address space are allocated for this module, so the value should be 0x150 (minus 4 due to the base address offset of 4, so 0x14c) for all of Tegra30/114/124. That matches what's already in DT.

Yeah, but the 0x12c - 0x14c is not defined in TRM, despite the address space in memory map is 336 bytes. So if you add this section into register map, that implies writing into this section is OK but this is undefined behaviour.

Quoted 21 lines · Mark Zhang

Quoted 19 lines · Stephen Warren

arch/arm/boot/dts/tegra114.dtsi

Quoted 9 lines · Mark Zhang

On Tegra114 it should be 0x12c.

arch/arm/boot/dts/tegra114.dtsi +1 -1

 
 	ahb: ahb {
 		compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb";
-		reg = <0x6000c004 0x14c>;
+		reg = <0x6000c004 0x12c>;
 	};

I don't think this is correct.

0x12c /is/ the address of the last defined register that exists. However, the system memory map table in the TRM indicates that 336 bytes of address space are allocated for this module, so the value should be 0x150 (minus 4 due to the base address offset of 4, so 0x14c) for all of Tegra30/114/124. That matches what's already in DT.

Quoted 4 lines

Yeah, but the 0x12c - 0x14c is not defined in TRM, despite the address space in memory map is 336 bytes. So if you add this section into register map, that implies writing into this section is OK but this is undefined behaviour.

I'm sure there are plenty of undefined register addresses in all the HW modules in Tegra.