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zynq: Do not explicitely enable icache

PATCH New Michal Simek 4 participants 5 messages Jan 3, 2014

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#0 lore raw

PATCH 1/2 zynq: Do not explicitely enable icache

icache is already enabled by default.

---

 board/xilinx/zynq/board.c | 2 --
 1 file changed, 2 deletions(-)
board/xilinx/zynq/board.c +0 -2
index 5119c09..7c1632f 100644
@@ -49,8 +49,6 @@ int board_init(void)
 	}
 #endif
 
-	icache_enable();
-
 #ifdef CONFIG_FPGA
 	fpga_init();
 	fpga_add(fpga_xilinx, &fpga);

--
1.8.2.3

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#1 lore raw

PATCH 2/2 zynq: Enable dcache support

Enable dcache.

---

 arch/arm/cpu/armv7/zynq/cpu.c | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/cpu/armv7/zynq/cpu.c +8 -0
index 9af340e..c771759 100644
@@ -46,3 +46,11 @@ void reset_cpu(ulong addr)
 	while (1)
 		;
 }
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+	/* Enable D-cache. I-cache is already enabled in start.S */
+	dcache_enable();
+}
+#endif

--
1.8.2.3

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#2 lore raw

PATCH 1/2 zynq: Do not explicitely enable icache

In reply to Michal Simek
Quoted 7 lines · Michal Simek

icache is already enabled by default.

---

 board/xilinx/zynq/board.c | 2 --
 1 file changed, 2 deletions(-)

You had me confused for a bit. Please mark u-boot patches as such when you send them to the kernel mailing list, and vice-versa.

Arnd

#3 lore raw

PATCH 1/2 zynq: Do not explicitely enable icache

Quoted 11 lines · Arnd Bergmann
Quoted 7 lines · Michal Simek

icache is already enabled by default.

---

 board/xilinx/zynq/board.c | 2 --
 1 file changed, 2 deletions(-)

You had me confused for a bit. Please mark u-boot patches as such when you send them to the kernel mailing list, and vice-versa.

oou. Patman (tools I use for sending patches to mailing list) took arm prefix because of my bad setting.

Sorry for that.

Thanks,
Michal

Signature · 14 lines
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


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#4 lore raw

PATCH 1/2 zynq: Do not explicitely enable icache

In reply to Arnd Bergmann
Quoted 11 lines · Arnd Bergmann
Quoted 7 lines · Michal Simek

icache is already enabled by default.

---

 board/xilinx/zynq/board.c | 2 --
 1 file changed, 2 deletions(-)

You had me confused for a bit. Please mark u-boot patches as such when you send them to the kernel mailing list, and vice-versa.

Better still, they shouldn't be sent to the kernel mailing lists in the first place - they're off-topic here.

Signature · 3 lines
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up.  Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".