board: delete unused header files

Signed-off-by Masahiro Yamada <[email protected]>

---

 board/cogent/kbm.h                       |  79 -----------------
 board/cray/L1/L1.h                       |  28 ------
 board/esd/common/s1d13806_640_480_8bpp.h | 120 -------------------------
 board/etin/debris/speed.h                |  38 --------
 board/genietv/genietv.h                  |  25 ------
 board/hidden_dragon/speed.h              |  38 --------
 board/inka4x0/hyb25d512160bf-5.h         |  16 ----
 board/prodrive/p3mx/ppc_error_no.h       | 148 -------------------------------
 board/sandpoint/speed.h                  |  38 --------
 9 files changed, 530 deletions(-)
 delete mode 100644 board/cogent/kbm.h

 delete mode 100644 board/cray/L1/L1.h
 delete mode 100644 board/esd/common/s1d13806_640_480_8bpp.h
 delete mode 100644 board/etin/debris/speed.h
 delete mode 100644 board/genietv/genietv.h
 delete mode 100644 board/hidden_dragon/speed.h
 delete mode 100644 board/inka4x0/hyb25d512160bf-5.h
 delete mode 100644 board/prodrive/p3mx/ppc_error_no.h
 delete mode 100644 board/sandpoint/speed.h

Signed-off-by Masahiro Yamada <[email protected]>

---

 board/cogent/kbm.h                       |  79 -----------------
 board/cray/L1/L1.h                       |  28 ------
 board/esd/common/s1d13806_640_480_8bpp.h | 120 -------------------------
 board/etin/debris/speed.h                |  38 --------
 board/genietv/genietv.h                  |  25 ------
 board/hidden_dragon/speed.h              |  38 --------
 board/inka4x0/hyb25d512160bf-5.h         |  16 ----
 board/prodrive/p3mx/ppc_error_no.h       | 148 -------------------------------
 board/sandpoint/speed.h                  |  38 --------
 9 files changed, 530 deletions(-)
 delete mode 100644 board/cogent/kbm.h
 delete mode 100644 board/cray/L1/L1.h
 delete mode 100644 board/esd/common/s1d13806_640_480_8bpp.h
 delete mode 100644 board/etin/debris/speed.h
 delete mode 100644 board/genietv/genietv.h
 delete mode 100644 board/hidden_dragon/speed.h
 delete mode 100644 board/inka4x0/hyb25d512160bf-5.h
 delete mode 100644 board/prodrive/p3mx/ppc_error_no.h
 delete mode 100644 board/sandpoint/speed.h

board/cogent/kbm.h deleted +0 -79

deleted file mode 100644
index 7eb419c..0000000
@@ -1,79 +0,0 @@
-/* keyboard/mouse not implemented yet */
-
-extern int cma_kbm_not_implemented;
-
-/**************** DEFINES for H8542B Keyboard/Mouse Controller ***************/
-
-/*
- * note the auxillary port is used to control the mouse
- */
-
-/* 8542B Commands (Sent to the Command Port) */
-#define HT8542_CMD_SET_BYTE    0x60    /* Set the command byte */
-#define HT8542_CMD_GET_BYTE    0x20    /* Get the command byte */
-#define HT8542_CMD_KBD_OBUFF   0xD2    /* Write to HT8542 Kbd Output Buffer */
-#define HT8542_CMD_AUX_OBUFF   0xD3    /* Write to HT8542 Mse Output Buffer */
-#define HT8542_CMD_AUX_WRITE   0xD4    /* Write to Mouse Port */
-#define HT8542_CMD_AUX_OFF     0xA7    /* Disable Mouse Port */
-#define HT8542_CMD_AUX_ON      0xA8    /* Re-Enable Mouse Port */
-#define HT8542_CMD_AUX_TEST    0xA9    /* Test for the presence of a Mouse */
-#define HT8542_CMD_DIAG                0xAA    /* Start Diagnostics */
-#define HT8542_CMD_KBD_TEST    0xAB    /* Test for presence of a keyboard */
-#define HT8542_CMD_KBD_OFF     0xAD    /* Disable Kbd Port (use KBD_DAT_ON) */
-#define HT8542_CMD_KBD_ON      0xAE    /* Enable Kbd Port (use KBD_DAT_OFF) */
-
-/* HT8542B cmd byte set by KBD_CMD_SET_BYTE and retrieved by KBD_CMD_GET_BYTE */
-#define HT8542_CMD_BYTE_TRANS  0x40
-#define HT8542_CMD_BYTE_AUX_OFF        0x20    /* 1 = mse port disabled, 0 = enabled */
-#define HT8542_CMD_BYTE_KBD_OFF        0x10    /* 1 = kbd port disabled, 0 = enabled */
-#define HT8542_CMD_BYTE_OVER   0x08    /* 1 = override keyboard lock */
-#define HT8542_CMD_BYTE_RES    0x04    /* reserved */
-#define HT8542_CMD_BYTE_AUX_INT        0x02    /* 1 = enable mouse interrupt */
-#define HT8542_CMD_BYTE_KBD_INT        0x01    /* 1 = enable keyboard interrupt */
-
-/* Keyboard Commands (Sent to the Data Port) */
-#define KBD_CMD_LED            0xED    /* Set Keyboard LEDS with next byte */
-#define KBD_CMD_ECHO           0xEE    /* Echo - we get 0xFA, 0xEE back */
-#define KBD_CMD_MODE           0xF0    /* set scan code mode with next byte */
-#define KBD_CMD_ID             0xF2    /* get keyboard/mouse ID */
-#define KBD_CMD_RPT            0xF3    /* Set Repeat Rate and Delay 2nd Byte */
-#define KBD_CMD_ON             0xF4    /* Enable keyboard */
-#define KBD_CMD_OFF            0xF5    /* Disables Scanning, Resets to Def */
-#define KBD_CMD_DEF            0xF6    /* Reverts kbd to default settings */
-#define KBD_CMD_RST            0xFF    /* Reset - should get 0xFA, 0xAA back */
-
-/* Set LED second bit defines */
-#define KBD_CMD_LED_SCROLL     0x01    /* Set SCROLL LOCK LED on */
-#define KBD_CMD_LED_NUM                0x02    /* Set NUM LOCK LED on */
-#define KBD_CMD_LED_CAPS       0x04    /* Set CAPS LOCK LED on */
-
-/* Set Mode second byte defines */
-#define KBD_CMD_MODE_STAT      0x00    /* get current scan code mode */
-#define KBD_CMD_MODE_SCAN1     0x01    /* set mode to scan code 1 */
-#define KBD_CMD_MODE_SCAN2     0x02    /* set mode to scan code 2 */
-#define KBD_CMD_MODE_SCAN3     0x03    /* set mode to scan code 3 */
-
-/* Keyboard/Mouse ID Codes */
-#define KBD_CMD_ID_1ST         0xAB    /* 1st byte is 0xAB, 2nd is actual ID */
-#define KBD_CMD_ID_KBD         0x83    /* Keyboard */
-#define KBD_CMD_ID_MOUSE       0x00    /* Mouse */
-
-/* Keyboard Data Return Defines */
-#define KBD_STAT_OVER          0x00    /* Buffer Overrun */
-#define KBD_STAT_DIAG_OK       0x55    /* Internal Self Test OK */
-#define KBD_STAT_RST_OK                0xAA    /* Reset Complete */
-#define KBD_STAT_ECHO          0xEE    /* Echo Command Return */
-#define KBD_STAT_BRK           0xF0    /* Prefix for Break Key Code */
-#define KBD_STAT_ACK           0xFA    /* Received after all commands */
-#define KBD_STAT_DIAG_FAIL     0xFD    /* Internal Self Test Failed */
-#define KBD_STAT_RESEND                0xFE    /* Resend Last Command */
-
-/* HT8542B Status Register Bit Defines */
-#define HT8542_STAT_OBF                0x01    /* 1 = output buffer is full */
-#define HT8542_STAT_IBF                0x02    /* 1 = input buffer is full */
-#define HT8542_STAT_SYS                0x04    /* system flag - unused */
-#define HT8542_STAT_CMD                0x08    /* 1 = cmd in input buffer, 0 = data */
-#define HT8542_STAT_INH                0x10    /* 1 = Inhibit - unused */
-#define HT8542_STAT_TX         0x20    /* 1 = Transmit Timeout has occured */
-#define HT8542_STAT_RX         0x40    /* 1 = Receive Timeout has occured */
-#define HT8542_STAT_PERR       0x80    /* 1 = Parity Error from Keyboard */

board/cray/L1/L1.h deleted +0 -28

deleted file mode 100644
index 42c34dd..0000000
@@ -1,28 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-/****************************************************************************
- * FLASH Memory Map as used by CRAY L1, 4MB AMD29F032B flash chip
- *
- *                          Start Address    Length
- * +++++++++++++++++++++++++ 0xFFC0_0000     Start of Flash -----------------
- * | Failsafe Linux Image  |   (1M)
- * +=======================+ 0xFFD0_0000
- * | (Reserved FlashFiles) |   (1M)
- * +=======================+ 0xFFE0_0000
- * | Failsafe RootFS       |   (1M)
- * +=======================+ 0xFFF0_0000
- * |                       |
- * | U N U S E D           |
- * |                       |
- * +-----------------------+ 0xFFFD_0000       U-Boot image header (64 bytes)
- * | environment settings  |   (64k)
- * +-----------------------+ 0xFFFE_0000       U-Boot image header (64 bytes)
- * | U-Boot                | 0xFFFE_0040    _start of U-Boot
- * |                       | 0xFFFE_FFFC    reset vector - branch to _start
- * +++++++++++++++++++++++++ 0xFFFF_FFFF     End of Flash -----------------
- *****************************************************************************/

board/esd/common/s1d13806_640_480_8bpp.h deleted +0 -120

deleted file mode 100644
index ddc0289..0000000
@@ -1,120 +0,0 @@
-/*
- * Copyright (c) 2000,2001 Epson Research and Development, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- *
- * File generated by S1D13806CFG.EXE
- * Panel:  (active)   640x480 59Hz TFT Single 18-bit (PCLK=CLKI2=25.000MHz)
- * Memory: Embedded SDRAM (MCLK=CLKI=49.152MHz) (BUSCLK=33.333MHz)
- */
-
-static S1D_REGS regs_13806_640_320_16bpp[] =
-{
-       {0x0001,0x00},   /* Miscellaneous Register */
-       {0x01FC,0x00},   /* Display Mode Register */
-       {0x0004,0x18},   /* General IO Pins Configuration Register 0 */
-       {0x0005,0x00},   /* General IO Pins Configuration Register 1 */
-       {0x0008,0x18},   /* General IO Pins Control Register 0 */
-       {0x0009,0x00},   /* General IO Pins Control Register 1 */
-       {0x0010,0x00},   /* Memory Clock Configuration Register */
-       {0x0014,0x02},   /* LCD Pixel Clock Configuration Register */
-       {0x0018,0x02},   /* CRT/TV Pixel Clock Configuration Register */
-       {0x001C,0x02},   /* MediaPlug Clock Configuration Register */
-       {0x001E,0x01},   /* CPU To Memory Wait State Select Register */
-       {0x0021,0x03},   /* DRAM Refresh Rate Register */
-       {0x002A,0x00},   /* DRAM Timings Control Register 0 */
-       {0x002B,0x01},   /* DRAM Timings Control Register 1 */
-       {0x0020,0x80},   /* Memory Configuration Register */
-       {0x0030,0x25},   /* Panel Type Register */
-       {0x0031,0x00},   /* MOD Rate Register */
-       {0x0032,0x4F},   /* LCD Horizontal Display Width Register */
-       {0x0034,0x13},   /* LCD Horizontal Non-Display Period Register */
-       {0x0035,0x00},   /* TFT FPLINE Start Position Register */
-       {0x0036,0x0B},   /* TFT FPLINE Pulse Width Register */
-       {0x0038,0xDF},   /* LCD Vertical Display Height Register 0 */
-       {0x0039,0x01},   /* LCD Vertical Display Height Register 1 */
-       {0x003A,0x24},   /* LCD Vertical Non-Display Period Register */
-       {0x003B,0x00},   /* TFT FPFRAME Start Position Register */
-       {0x003C,0x01},   /* TFT FPFRAME Pulse Width Register */
-       {0x0040,0x03},   /* LCD Display Mode Register (8bpp) */
-       {0x0041,0x00},   /* LCD Miscellaneous Register */
-       {0x0042,0x00},   /* LCD Display Start Address Register 0 */
-       {0x0043,0x00},   /* LCD Display Start Address Register 1 */
-       {0x0044,0x00},   /* LCD Display Start Address Register 2 */
-       {0x0046,0x80},   /* LCD Memory Address Offset Register 0 */
-       {0x0047,0x02},   /* LCD Memory Address Offset Register 1 */
-       {0x0048,0x00},   /* LCD Pixel Panning Register */
-       {0x004A,0x00},   /* LCD Display FIFO High Threshold Control Register */
-       {0x004B,0x00},   /* LCD Display FIFO Low Threshold Control Register */
-       {0x0050,0x4F},   /* CRT/TV Horizontal Display Width Register */
-       {0x0052,0x13},   /* CRT/TV Horizontal Non-Display Period Register */
-       {0x0053,0x01},   /* CRT/TV HRTC Start Position Register */
-       {0x0054,0x0B},   /* CRT/TV HRTC Pulse Width Register */
-       {0x0056,0xDF},   /* CRT/TV Vertical Display Height Register 0 */
-       {0x0057,0x01},   /* CRT/TV Vertical Display Height Register 1 */
-       {0x0058,0x2B},   /* CRT/TV Vertical Non-Display Period Register */
-       {0x0059,0x09},   /* CRT/TV VRTC Start Position Register */
-       {0x005A,0x01},   /* CRT/TV VRTC Pulse Width Register */
-       {0x005B,0x10},   /* TV Output Control Register */
-       {0x0060,0x05},   /* CRT/TV Display Mode Register */
-       {0x0062,0x00},   /* CRT/TV Display Start Address Register 0 */
-       {0x0063,0x00},   /* CRT/TV Display Start Address Register 1 */
-       {0x0064,0x00},   /* CRT/TV Display Start Address Register 2 */
-       {0x0066,0x80},   /* CRT/TV Memory Address Offset Register 0 */
-       {0x0067,0x02},   /* CRT/TV Memory Address Offset Register 1 */
-       {0x0068,0x00},   /* CRT/TV Pixel Panning Register */
-       {0x006A,0x00},   /* CRT/TV Display FIFO High Threshold Control Register */
-       {0x006B,0x00},   /* CRT/TV Display FIFO Low Threshold Control Register */
-       {0x0070,0x00},   /* LCD Ink/Cursor Control Register */
-       {0x0071,0x01},   /* LCD Ink/Cursor Start Address Register */
-       {0x0072,0x00},   /* LCD Cursor X Position Register 0 */
-       {0x0073,0x00},   /* LCD Cursor X Position Register 1 */
-       {0x0074,0x00},   /* LCD Cursor Y Position Register 0 */
-       {0x0075,0x00},   /* LCD Cursor Y Position Register 1 */
-       {0x0076,0x00},   /* LCD Ink/Cursor Blue Color 0 Register */
-       {0x0077,0x00},   /* LCD Ink/Cursor Green Color 0 Register */
-       {0x0078,0x00},   /* LCD Ink/Cursor Red Color 0 Register */
-       {0x007A,0x1F},   /* LCD Ink/Cursor Blue Color 1 Register */
-       {0x007B,0x3F},   /* LCD Ink/Cursor Green Color 1 Register */
-       {0x007C,0x1F},   /* LCD Ink/Cursor Red Color 1 Register */
-       {0x007E,0x00},   /* LCD Ink/Cursor FIFO Threshold Register */
-       {0x0080,0x00},   /* CRT/TV Ink/Cursor Control Register */
-       {0x0081,0x01},   /* CRT/TV Ink/Cursor Start Address Register */
-       {0x0082,0x00},   /* CRT/TV Cursor X Position Register 0 */
-       {0x0083,0x00},   /* CRT/TV Cursor X Position Register 1 */
-       {0x0084,0x00},   /* CRT/TV Cursor Y Position Register 0 */
-       {0x0085,0x00},   /* CRT/TV Cursor Y Position Register 1 */
-       {0x0086,0x00},   /* CRT/TV Ink/Cursor Blue Color 0 Register */
-       {0x0087,0x00},   /* CRT/TV Ink/Cursor Green Color 0 Register */
-       {0x0088,0x00},   /* CRT/TV Ink/Cursor Red Color 0 Register */
-       {0x008A,0x1F},   /* CRT/TV Ink/Cursor Blue Color 1 Register */
-       {0x008B,0x3F},   /* CRT/TV Ink/Cursor Green Color 1 Register */
-       {0x008C,0x1F},   /* CRT/TV Ink/Cursor Red Color 1 Register */
-       {0x008E,0x00},   /* CRT/TV Ink/Cursor FIFO Threshold Register */
-       {0x0100,0x00},   /* BitBlt Control Register 0 */
-       {0x0101,0x00},   /* BitBlt Control Register 1 */
-       {0x0102,0x00},   /* BitBlt ROP Code/Color Expansion Register */
-       {0x0103,0x00},   /* BitBlt Operation Register */
-       {0x0104,0x00},   /* BitBlt Source Start Address Register 0 */
-       {0x0105,0x00},   /* BitBlt Source Start Address Register 1 */
-       {0x0106,0x00},   /* BitBlt Source Start Address Register 2 */
-       {0x0108,0x00},   /* BitBlt Destination Start Address Register 0 */
-       {0x0109,0x00},   /* BitBlt Destination Start Address Register 1 */
-       {0x010A,0x00},   /* BitBlt Destination Start Address Register 2 */
-       {0x010C,0x00},   /* BitBlt Memory Address Offset Register 0 */
-       {0x010D,0x00},   /* BitBlt Memory Address Offset Register 1 */
-       {0x0110,0x00},   /* BitBlt Width Register 0 */
-       {0x0111,0x00},   /* BitBlt Width Register 1 */
-       {0x0112,0x00},   /* BitBlt Height Register 0 */
-       {0x0113,0x00},   /* BitBlt Height Register 1 */
-       {0x0114,0x00},   /* BitBlt Background Color Register 0 */
-       {0x0115,0x00},   /* BitBlt Background Color Register 1 */
-       {0x0118,0x00},   /* BitBlt Foreground Color Register 0 */
-       {0x0119,0x00},   /* BitBlt Foreground Color Register 1 */
-       {0x01E0,0x00},   /* Look-Up Table Mode Register */
-       {0x01E2,0x00},   /* Look-Up Table Address Register */
-       {0x01F0,0x10},   /* Power Save Configuration Register */
-       {0x01F1,0x00},   /* Power Save Status Register */
-       {0x01F4,0x00},   /* CPU-to-Memory Access Watchdog Timer Register */
-       {0x01FC,0x01},   /* Display Mode Register */
-};

board/etin/debris/speed.h deleted +0 -38

deleted file mode 100644
index f1b10bf..0000000
@@ -1,38 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-/*-----------------------------------------------------------------------
- * Timer value for timer 2, ICLK = 10
- *
- * SPEED_FCOUNT2 =  GCLK / (16 * (TIMER_TMR_PS + 1))
- * SPEED_TMR3_PS = (GCLK / (16 * SPEED_FCOUNT3)) - 1
- *
- * SPEED_FCOUNT2       timer 2 counting frequency
- * GCLK                        CPU clock
- * SPEED_TMR2_PS       prescaler
- */
-#define SPEED_TMR2_PS  (250 - 1)       /* divide by 250        */
-
-/*-----------------------------------------------------------------------
- * Timer value for PIT
- *
- * PIT_TIME = SPEED_PITC / PITRTCLK
- * PITRTCLK = 8192
- */
-#define SPEED_PITC     (82 << 16)      /* start counting from 82       */
-
-/*
- * The new value for PTA is calculated from
- *
- *     PTA = (gclk * Trefresh) / (2 ^ (2 * DFBRG) * PTP * NCS)
- *
- * gclk                CPU clock (not bus clock !)
- * Trefresh    Refresh cycle * 4 (four word bursts used)
- * DFBRG       For normal mode (no clock reduction) always 0
- * PTP         Prescaler (already adjusted for no. of banks and 4K / 8K refresh)
- * NCS         Number of SDRAM banks (chip selects) on this UPM.
- */

board/genietv/genietv.h deleted +0 -25

deleted file mode 100644
index 7c95b56..0000000
@@ -1,25 +0,0 @@
-/*
- * The GENIETV is using the following physical memorymap (copied from
- * the FADS configuration):
- *
- * ff020000 -> ff02ffff : pcmcia
- * ff010000 -> ff01ffff : BCSR       connected to CS1, setup by 8xxROM
- * ff000000 -> ff00ffff : IMAP       internal in the cpu
- * 02800000 -> 0287ffff : flash      connected to CS0
- * 00000000 -> nnnnnnnn : sdram      setup by U-Boot
- *
- * CS pins are connected as follows:
- *
- * CS0 -512Kb boot flash
- * CS1 - SDRAM #1
- * CS2 - SDRAM #2
- * CS3 - Flash #1
- * CS4 - Flash #2
- * CS5 - LON (if present)
- * CS6 - PCMCIA #1
- * CS7 - PCMCIA #2
- *
- * Ports are configured as follows:
- *
- * PA7 - SDRAM banks enable
- */

board/hidden_dragon/speed.h deleted +0 -38

deleted file mode 100644
index f1b10bf..0000000
@@ -1,38 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-/*-----------------------------------------------------------------------
- * Timer value for timer 2, ICLK = 10
- *
- * SPEED_FCOUNT2 =  GCLK / (16 * (TIMER_TMR_PS + 1))
- * SPEED_TMR3_PS = (GCLK / (16 * SPEED_FCOUNT3)) - 1
- *
- * SPEED_FCOUNT2       timer 2 counting frequency
- * GCLK                        CPU clock
- * SPEED_TMR2_PS       prescaler
- */
-#define SPEED_TMR2_PS  (250 - 1)       /* divide by 250        */
-
-/*-----------------------------------------------------------------------
- * Timer value for PIT
- *
- * PIT_TIME = SPEED_PITC / PITRTCLK
- * PITRTCLK = 8192
- */
-#define SPEED_PITC     (82 << 16)      /* start counting from 82       */
-
-/*
- * The new value for PTA is calculated from
- *
- *     PTA = (gclk * Trefresh) / (2 ^ (2 * DFBRG) * PTP * NCS)
- *
- * gclk                CPU clock (not bus clock !)
- * Trefresh    Refresh cycle * 4 (four word bursts used)
- * DFBRG       For normal mode (no clock reduction) always 0
- * PTP         Prescaler (already adjusted for no. of banks and 4K / 8K refresh)
- * NCS         Number of SDRAM banks (chip selects) on this UPM.
- */

board/inka4x0/hyb25d512160bf-5.h deleted +0 -16

deleted file mode 100644
index f16f450..0000000
@@ -1,16 +0,0 @@
-/*
- * Copyright (C) 2007 Semihalf
- * Written by Marian Balakowicz <[email protected]>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#define SDRAM_DDR      1               /* is DDR */
-
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE     0x018D0000
-#define SDRAM_EMODE    0x40090000
-#define SDRAM_CONTROL  0x714F0F00
-#define SDRAM_CONFIG1  0x73711930
-#define SDRAM_CONFIG2  0x46770000
-#define SDRAM_TAPDELAY 0x10000000

board/prodrive/p3mx/ppc_error_no.h deleted +0 -148

deleted file mode 100644
index 58a68b5..0000000
@@ -1,148 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <[email protected]>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-/*
- * BK Id: SCCS/s.errno.h 1.9 06/05/01 21:45:21 paulus
- */
-#ifndef _MV_PPC_ERRNO_H
-#define _MV_PPC_ERRNO_H
-
-#define        EPERM            1      /* Operation not permitted */
-#define        ENOENT           2      /* No such file or directory */
-#define        ESRCH            3      /* No such process */
-#define        EINTR            4      /* Interrupted system call */
-#define        EIO              5      /* I/O error */
-#define        ENXIO            6      /* No such device or address */
-#define        E2BIG            7      /* Arg list too long */
-#define        ENOEXEC          8      /* Exec format error */
-#define        EBADF            9      /* Bad file number */
-#define        ECHILD          10      /* No child processes */
-#define        EAGAIN          11      /* Try again */
-#define        ENOMEM          12      /* Out of memory */
-#define        EACCES          13      /* Permission denied */
-#define        EFAULT          14      /* Bad address */
-#define        ENOTBLK         15      /* Block device required */
-#define        EBUSY           16      /* Device or resource busy */
-#define        EEXIST          17      /* File exists */
-#define        EXDEV           18      /* Cross-device link */
-#define        ENODEV          19      /* No such device */
-#define        ENOTDIR         20      /* Not a directory */
-#define        EISDIR          21      /* Is a directory */
-#define        EINVAL          22      /* Invalid argument */
-#define        ENFILE          23      /* File table overflow */
-#define        EMFILE          24      /* Too many open files */
-#define        ENOTTY          25      /* Not a typewriter */
-#define        ETXTBSY         26      /* Text file busy */
-#define        EFBIG           27      /* File too large */
-#define        ENOSPC          28      /* No space left on device */
-#define        ESPIPE          29      /* Illegal seek */
-#define        EROFS           30      /* Read-only file system */
-#define        EMLINK          31      /* Too many links */
-#define        EPIPE           32      /* Broken pipe */
-#define        EDOM            33      /* Math argument out of domain of func */
-#define        ERANGE          34      /* Math result not representable */
-#define        EDEADLK         35      /* Resource deadlock would occur */
-#define        ENAMETOOLONG    36      /* File name too long */
-#define        ENOLCK          37      /* No record locks available */
-#define        ENOSYS          38      /* Function not implemented */
-#define        ENOTEMPTY       39      /* Directory not empty */
-#define        ELOOP           40      /* Too many symbolic links encountered */
-#define        EWOULDBLOCK     EAGAIN  /* Operation would block */
-#define        ENOMSG          42      /* No message of desired type */
-#define        EIDRM           43      /* Identifier removed */
-#define        ECHRNG          44      /* Channel number out of range */
-#define        EL2NSYNC        45      /* Level 2 not synchronized */
-#define        EL3HLT          46      /* Level 3 halted */
-#define        EL3RST          47      /* Level 3 reset */
-#define        ELNRNG          48      /* Link number out of range */
-#define        EUNATCH         49      /* Protocol driver not attached */
-#define        ENOCSI          50      /* No CSI structure available */
-#define        EL2HLT          51      /* Level 2 halted */
-#define        EBADE           52      /* Invalid exchange */
-#define        EBADR           53      /* Invalid request descriptor */
-#define        EXFULL          54      /* Exchange full */
-#define        ENOANO          55      /* No anode */
-#define        EBADRQC         56      /* Invalid request code */
-#define        EBADSLT         57      /* Invalid slot */
-#define        EDEADLOCK       58      /* File locking deadlock error */
-#define        EBFONT          59      /* Bad font file format */
-#define        ENOSTR          60      /* Device not a stream */
-#define        ENODATA         61      /* No data available */
-#define        ETIME           62      /* Timer expired */
-#define        ENOSR           63      /* Out of streams resources */
-#define        ENONET          64      /* Machine is not on the network */
-#define        ENOPKG          65      /* Package not installed */
-#define        EREMOTE         66      /* Object is remote */
-#define        ENOLINK         67      /* Link has been severed */
-#define        EADV            68      /* Advertise error */
-#define        ESRMNT          69      /* Srmount error */
-#define        ECOMM           70      /* Communication error on send */
-#define        EPROTO          71      /* Protocol error */
-#define        EMULTIHOP       72      /* Multihop attempted */
-#define        EDOTDOT         73      /* RFS specific error */
-#define        EBADMSG         74      /* Not a data message */
-#define        EOVERFLOW       75      /* Value too large for defined data type */
-#define        ENOTUNIQ        76      /* Name not unique on network */
-#define        EBADFD          77      /* File descriptor in bad state */
-#define        EREMCHG         78      /* Remote address changed */
-#define        ELIBACC         79      /* Can not access a needed shared library */
-#define        ELIBBAD         80      /* Accessing a corrupted shared library */
-#define        ELIBSCN         81      /* .lib section in a.out corrupted */
-#define        ELIBMAX         82      /* Attempting to link in too many shared libraries */
-#define        ELIBEXEC        83      /* Cannot exec a shared library directly */
-#define        EILSEQ          84      /* Illegal byte sequence */
-#define        ERESTART        85      /* Interrupted system call should be restarted */
-#define        ESTRPIPE        86      /* Streams pipe error */
-#define        EUSERS          87      /* Too many users */
-#define        ENOTSOCK        88      /* Socket operation on non-socket */
-#define        EDESTADDRREQ    89      /* Destination address required */
-#define        EMSGSIZE        90      /* Message too long */
-#define        EPROTOTYPE      91      /* Protocol wrong type for socket */
-#define        ENOPROTOOPT     92      /* Protocol not available */
-#define        EPROTONOSUPPORT 93      /* Protocol not supported */
-#define        ESOCKTNOSUPPORT 94      /* Socket type not supported */
-#define        EOPNOTSUPP      95      /* Operation not supported on transport endpoint */
-#define        EPFNOSUPPORT    96      /* Protocol family not supported */
-#define        EAFNOSUPPORT    97      /* Address family not supported by protocol */
-#define        EADDRINUSE      98      /* Address already in use */
-#define        EADDRNOTAVAIL   99      /* Cannot assign requested address */
-#define        ENETDOWN        100     /* Network is down */
-#define        ENETUNREACH     101     /* Network is unreachable */
-#define        ENETRESET       102     /* Network dropped connection because of reset */
-#define        ECONNABORTED    103     /* Software caused connection abort */
-#define        ECONNRESET      104     /* Connection reset by peer */
-#define        ENOBUFS         105     /* No buffer space available */
-#define        EISCONN         106     /* Transport endpoint is already connected */
-#define        ENOTCONN        107     /* Transport endpoint is not connected */
-#define        ESHUTDOWN       108     /* Cannot send after transport endpoint shutdown */
-#define        ETOOMANYREFS    109     /* Too many references: cannot splice */
-#define        ETIMEDOUT       110     /* Connection timed out */
-#define        ECONNREFUSED    111     /* Connection refused */
-#define        EHOSTDOWN       112     /* Host is down */
-#define        EHOSTUNREACH    113     /* No route to host */
-#define        EALREADY        114     /* Operation already in progress */
-#define        EINPROGRESS     115     /* Operation now in progress */
-#define        ESTALE          116     /* Stale NFS file handle */
-#define        EUCLEAN         117     /* Structure needs cleaning */
-#define        ENOTNAM         118     /* Not a XENIX named type file */
-#define        ENAVAIL         119     /* No XENIX semaphores available */
-#define        EISNAM          120     /* Is a named type file */
-#define        EREMOTEIO       121     /* Remote I/O error */
-#define        EDQUOT          122     /* Quota exceeded */
-
-#define        ENOMEDIUM       123     /* No medium found */
-#define        EMEDIUMTYPE     124     /* Wrong medium type */
-
-/* Should never be seen by user programs */
-#define ERESTARTSYS    512
-#define ERESTARTNOINTR 513
-#define ERESTARTNOHAND 514     /* restart if no handler.. */
-#define ENOIOCTLCMD    515     /* No ioctl command */
-
-#define _LAST_ERRNO    515
-
-#endif

board/sandpoint/speed.h deleted +0 -39

deleted file mode 100644
index f1b10bf..0000000
@@ -1,38 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-/*-----------------------------------------------------------------------
- * Timer value for timer 2, ICLK = 10
- *
- * SPEED_FCOUNT2 =  GCLK / (16 * (TIMER_TMR_PS + 1))
- * SPEED_TMR3_PS = (GCLK / (16 * SPEED_FCOUNT3)) - 1
- *
- * SPEED_FCOUNT2       timer 2 counting frequency
- * GCLK                        CPU clock
- * SPEED_TMR2_PS       prescaler
- */
-#define SPEED_TMR2_PS  (250 - 1)       /* divide by 250        */
-
-/*-----------------------------------------------------------------------
- * Timer value for PIT
- *
- * PIT_TIME = SPEED_PITC / PITRTCLK
- * PITRTCLK = 8192
- */
-#define SPEED_PITC     (82 << 16)      /* start counting from 82       */
-
-/*
- * The new value for PTA is calculated from
- *
- *     PTA = (gclk * Trefresh) / (2 ^ (2 * DFBRG) * PTP * NCS)
- *
- * gclk                CPU clock (not bus clock !)
- * Trefresh    Refresh cycle * 4 (four word bursts used)
- * DFBRG       For normal mode (no clock reduction) always 0
- * PTP         Prescaler (already adjusted for no. of banks and 4K / 8K refresh)
- * NCS         Number of SDRAM banks (chip selects) on this UPM.
- */
--

1.8.3.2

Signed-off-by Masahiro Yamada <[email protected]>

Acked-by Stefan Roese <[email protected]>

Acked-by Matthias Fuchs <[email protected]>