Further support for the kmp204x architecture

index f02642a..b41929a 100644
@@ -134,22 +134,25 @@ void qrio_prstcfg(u8 bit, u8 mode)
 }
 
 
-#define BOOTCOUNT_OFF	0x12
+#define BOOTCOUNT_OFF	0x20
 
 void bootcount_store(ulong counter)
 {
-	u8 val;
 	void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
 
-	val = (counter <= 255) ? (u8)counter : 255;
-	out_8(qrio_base + BOOTCOUNT_OFF, val);
+	out_be32(qrio_base + BOOTCOUNT_OFF, counter);
 }
 
 ulong bootcount_load(void)
 {
-	u8 val;
+	u32 val;
 	void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
-	val = in_8(qrio_base + BOOTCOUNT_OFF);
+	val = in_be32(qrio_base + BOOTCOUNT_OFF + 4);
+
+	if (val == BOOTCOUNT_MAGIC)
+		val = in_be32(qrio_base + BOOTCOUNT_OFF);
+	else
+		val = 0;
 	return val;
 }
 

63 lines not on this page · raw message

index b6ba672..0267596 100644
@@ -5,6 +5,16 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+/* QRIO GPIO ports */
+#define GPIO_A			0x40
+#define GPIO_B			0x60
+
+int qrio_get_gpio(u8 port_off, u8 gpio_nr);
+void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val);
+void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value);
+void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value);
+void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr);
+
 #define PRSTCFG_POWUP_UNIT_CORE_RST	0x0
 #define PRSTCFG_POWUP_UNIT_RST		0x1
 #define PRSTCFG_POWUP_RST		0x3

147 lines not on this page · raw message

index dae5378..141d7ee 100644
@@ -33,12 +33,51 @@ int checkboard(void)
 	return 0;
 }
 
-/* TODO: implement the I2C deblocking function */
-int i2c_make_abort(void)
+/* I2C deblocking uses the algorithm defined in ../common/common.c, which
+ * makes use of 2 QRIO GPIOs to act on the SCL and SDA signals of an I2C bus.
+ * According to the standard I2C IOs must not drive HI-Levels, so the
+ * QRIO GPIOs are used in open-drain fashion:
+ *  -> 0 GPIO configured as output that drives low
+ *  -> 1 GPIO configured as input pull-up ties high
+ */
+
+/* GPIOs used for deblocking I2C bus 1 */
+#define DBLK_PORT1	GPIO_A
+#define DBLK_SCL1	16
+#define DBLK_SDA1	17
+
+/* By default deblock GPIOs are floating */
+static void i2c_deblock_gpio_cfg(void)
+{
+	/* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */
+	qrio_gpio_direction_input(DBLK_PORT1, DBLK_SCL1);
+	qrio_gpio_direction_input(DBLK_PORT1, DBLK_SDA1);
+
+	qrio_set_gpio(DBLK_PORT1, DBLK_SCL1, 0);
+	qrio_set_gpio(DBLK_PORT1, DBLK_SDA1, 0);
+}
+
+void set_sda(int state)
+{
+	qrio_set_opendrain_gpio(DBLK_PORT1, DBLK_SDA1, state);
+}
+
+void set_scl(int state)
+{
+	qrio_set_opendrain_gpio(DBLK_PORT1, DBLK_SCL1, state);
+}
+
+int get_sda(void)
+{
+	return qrio_get_gpio(DBLK_PORT1, DBLK_SDA1);
+}
+
+int get_scl(void)
 {
-	return 1;
+	return qrio_get_gpio(DBLK_PORT1, DBLK_SCL1);
 }
 
+
 #define ZL30158_RST	8
 #define ZL30343_RST	9
 

@@ -77,6 +116,14 @@ unsigned long get_board_sys_clk(unsigned long dummy)
 	return 66666666;
 }
 
+int misc_init_f(void)
+{
+	/* configure QRIO pis for i2c deblocking */
+	i2c_deblock_gpio_cfg();
+
+	return 0;
+}
+
 #define BOOTCOUNT_OFF	0x20
 
 void bootcount_store(ulong counter)

index 50330cc..b4242e5 100644
@@ -209,6 +209,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_EARLY_INIT_R	/* call board_early_init_r function */
+#define CONFIG_MISC_INIT_F
 #define CONFIG_MISC_INIT_R
 #define CONFIG_LAST_STAGE_INIT
 

@@ -264,7 +265,10 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_FIT_VERBOSE	/* enable fit_format_{error,warning}() */
 
 /* I2C */
+
 #define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_SYS_I2C_SPEED		100000 /* deblocking */
 #define CONFIG_SYS_NUM_I2C_BUSES	3
 #define CONFIG_SYS_I2C_MAX_HOPS		1
 #define CONFIG_SYS_I2C_FSL		/* Use FSL I2C driver */

@@ -277,6 +281,12 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 					{0, {{I2C_MUX_PCA9547, 0x70, 1 } } }, \
 					{0, {{I2C_MUX_PCA9547, 0x70, 2 } } }, \
 				}
+#ifndef __ASSEMBLY__
+void set_sda(int state);
+void set_scl(int state);
+int get_sda(void);
+int get_scl(void);
+#endif
 
 #define CONFIG_KM_IVM_BUS		1	/* I2C1 (Mux-Port 1)*/
 

index 4158c8d..8bb3571 100644
@@ -13,6 +13,11 @@
 #define CONFIG_HOSTNAME		kmlion1
 #define CONFIG_KM_BOARD_NAME	"kmlion1"
 
+/* KMCOGE4 */
+#elif defined(CONFIG_KMCOGE4)
+#define CONFIG_HOSTNAME		kmcoge4
+#define CONFIG_KM_BOARD_NAME	"kmcoge4"
+
 #else
 #error ("Board not supported")
 #endif

@@ -42,6 +47,7 @@
 #define CONFIG_SYS_BR2_PRELIM  CONFIG_SYS_LBAPP1_BR_PRELIM
 /* Local bus app1 Options */
 #define CONFIG_SYS_OR2_PRELIM  CONFIG_SYS_LBAPP1_OR_PRELIM
+#endif
 
 /* App2 Local bus */
 #define CONFIG_SYS_LBAPP2_BASE		0xE0000000

@@ -63,6 +69,5 @@
 #define CONFIG_SYS_BR3_PRELIM  CONFIG_SYS_LBAPP2_BR_PRELIM
 /* Local bus app2 Options */
 #define CONFIG_SYS_OR3_PRELIM  CONFIG_SYS_LBAPP2_OR_PRELIM
-#endif
 
 #endif	/* __CONFIG_H */

index 2a15ad4..a4e0f7c 100644
@@ -99,11 +99,16 @@
 #define CONFIG_KM_UBI_PARTITION_NAME_BOOT	"ubi0"
 #endif /* CONFIG_KM_UBI_PARTITION_NAME_BOOT */
 
+#ifndef CONFIG_KM_UBI_PART_BOOT_OPTS
+#define CONFIG_KM_UBI_PART_BOOT_OPTS		""
+#endif /* CONFIG_KM_UBI_PART_BOOT_OPTS */
+
 #ifndef CONFIG_KM_UBI_PARTITION_NAME_APP
 /* one flash chip only called boot */
 /* boot: CONFIG_KM_UBI_PARTITION_NAME_BOOT */
 # define CONFIG_KM_UBI_LINUX_MTD					\
-	"ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT
+	"ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT			\
+	CONFIG_KM_UBI_PART_BOOT_OPTS
 # define CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI				\
 	"ubiattach=ubi part " CONFIG_KM_UBI_PARTITION_NAME_BOOT "\0"
 #else /* CONFIG_KM_UBI_PARTITION_NAME_APP */

@@ -111,7 +116,8 @@
 /* boot: CONFIG_KM_UBI_PARTITION_NAME_BOOT */
 /* app:  CONFIG_KM_UBI_PARTITION_NAME_APP */
 # define CONFIG_KM_UBI_LINUX_MTD					\
-	"ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT " "		\
+	"ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT			\
+	CONFIG_KM_UBI_PART_BOOT_OPTS " "				\
 	"ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_APP
 # define CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI				\
 	"ubiattach=if test ${boot_bank} -eq 0; then; "			\

index b4242e5..935aa7e 100644
@@ -15,6 +15,10 @@
 
 #define CONFIG_KM_DEF_NETDEV	"netdev=eth0\0"
 
+/* an additionnal option is required for UBI as subpage access is
+ * supported in u-boot */
+#define CONFIG_KM_UBI_PART_BOOT_OPTS		",2048"
+
 #define CONFIG_NAND_ECC_BCH
 
 /* common KM defines */

index 935aa7e..f0e7d15 100644
@@ -301,6 +301,7 @@ int get_scl(void);
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_BAR	/* 4 byte-addressing */
 #define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_SPANSION
 #define CONFIG_CMD_SF
 #define CONFIG_SF_DEFAULT_SPEED         20000000
 #define CONFIG_SF_DEFAULT_MODE          0

index 141d7ee..4814efb 100644
@@ -101,6 +101,7 @@ int board_early_init_f(void)
 
 int board_early_init_r(void)
 {
+	int ret = 0;
 	/* Flush d-cache and invalidate i-cache of any FLASH data */
 	flush_dcache();
 	invalidate_icache();

@@ -108,7 +109,11 @@ int board_early_init_r(void)
 	set_liodns();
 	setup_portals();
 
-	return 0;
+	ret = trigger_fpga_config();
+	if (ret)
+		printf("error triggering PCIe FPGA config\n");
+
+	return ret;
 }
 
 unsigned long get_board_sys_clk(unsigned long dummy)

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