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T10-PI RDMA offload

LSF/MM TOPIC Sagi Grimberg 4 participants 4 messages Jan 16, 2014 – Jan 20, 2014 SCSI

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#0 lore raw

Hey SCSI (and LSF) folks,

I'd like to propose the following topic for upcoming LSF-MM:

T10-PI standard is becoming more and more appealing for storage and cloud solutions. Since error-detection coding comes with its cost of CPU computation overhead, state-of-the-art ASICs offer the ability to offload T10-PI operations (DIF/DIX), examples are SAS & FC controllers. Recently, the support for T10-PI offload over RDMA transactions was introduced in the Mellanox Connect-IB HCA.

The first building block, RDMA verbs API supporting T10-PI offload was submitted over Linux-rdma (see http://marc.info/?l=linux-rdma&m=138719320307936&w=2). Moreover, we have seen first seeds of T10-PI support in Linux SCSI target entering v3.14 (see
http://lwn.net/Articles/579708/) and RDMA offload implementation in iSER transport (see http://www.spinics.net/lists/linux-scsi/msg71128.html). There is still some ground to fill to get protection information support to a full solution over all backend devices.

We would like to use LSF-MM platform to to push forward T10-PI support end-to-end which requires Linux SCSI Target core level support along with transport level support in iSER and SRP (and also FCoE in the future) and over to the Initiator side transports.

Discussion topics:
- Introduce T10-PI offload RDMA verbs and how are used in storage applications.
- Discuss effects of DIX1.1 (currently a draft) in Target implementation (core level -> transport level -> HW level).
- Discuss T10-PI Type 4 (16-byte DIF) status and possible implications on Target & Initiator implementation down to HW level.
- Discuss Current Limitations that T10-PI RDMA offload poses on iSCSI protocol (ImmediateData, UnsolDataOut) and if/how they can be solved.
- What-ever else comes to mind...

Thanks,
Sagi.

#1 lore raw
Quoted 33 lines · Sagi Grimberg

Hey SCSI (and LSF) folks,

I'd like to propose the following topic for upcoming LSF-MM:

T10-PI standard is becoming more and more appealing for storage and cloud solutions.
Since error-detection coding comes with its cost of CPU computation overhead,
state-of-the-art ASICs offer the ability to offload T10-PI operations (DIF/DIX), examples
are SAS & FC controllers. Recently, the support for T10-PI offload over RDMA transactions
was introduced in the Mellanox Connect-IB HCA.

The first building block, RDMA verbs API supporting T10-PI offload was submitted over
Linux-rdma (see http://marc.info/?l=linux-rdma&m=138719320307936&w=2).
Moreover,
we have seen first seeds of T10-PI support in Linux SCSI target entering v3.14 (see
http://lwn.net/Articles/579708/) and RDMA offload implementation in iSER transport
(see http://www.spinics.net/lists/linux-scsi/msg71128.html). There is still some ground to
fill to get protection information support to a full solution over all backend devices.

We would like to use LSF-MM platform to to push forward T10-PI support end-to-end which
requires Linux SCSI Target core level support along with transport level support in iSER and SRP
(and also FCoE in the future) and over to the Initiator side transports.

Quoted 11 lines

Discussion topics:
- Introduce T10-PI offload RDMA verbs and how are used in storage applications.
- Discuss effects of DIX1.1 (currently a draft) in Target implementation (core level -> transport level -> HW level).
- Discuss T10-PI Type 4 (16-byte DIF) status and possible implications on Target & Initiator implementation down to HW level.
- Discuss Current Limitations that T10-PI RDMA offload poses on iSCSI protocol (ImmediateData, UnsolDataOut) and if/how
they can be solved.
- What-ever else comes to mind...

+1 (CC'ing Roland + MKP)

Looking forward to seeing protection information enabled within iser initiator code, and perhaps even an optional software emulation for traditional iscsi fabric code.

--nab

#2 lore raw
In reply to Sagi Grimberg
Quoted 33 lines · Sagi Grimberg

Hey SCSI (and LSF) folks,

I'd like to propose the following topic for upcoming LSF-MM:

T10-PI standard is becoming more and more appealing for storage and cloud solutions.
Since error-detection coding comes with its cost of CPU computation overhead,
state-of-the-art ASICs offer the ability to offload T10-PI operations (DIF/DIX), examples
are SAS & FC controllers. Recently, the support for T10-PI offload over RDMA transactions
was introduced in the Mellanox Connect-IB HCA.

The first building block, RDMA verbs API supporting T10-PI offload was submitted over
Linux-rdma (see http://marc.info/?l=linux-rdma&m=138719320307936&w=2).
Moreover,
we have seen first seeds of T10-PI support in Linux SCSI target entering v3.14 (see
http://lwn.net/Articles/579708/) and RDMA offload implementation in iSER transport
(see http://www.spinics.net/lists/linux-scsi/msg71128.html). There is still some ground to
fill to get protection information support to a full solution over all backend devices.

We would like to use LSF-MM platform to to push forward T10-PI support end-to-end which
requires Linux SCSI Target core level support along with transport level support in iSER and SRP
(and also FCoE in the future) and over to the Initiator side transports.

Quoted 11 lines

Discussion topics:
- Introduce T10-PI offload RDMA verbs and how are used in storage applications.
- Discuss effects of DIX1.1 (currently a draft) in Target implementation (core level -> transport level -> HW level).
- Discuss T10-PI Type 4 (16-byte DIF) status and possible implications on Target & Initiator implementation down to HW level.
- Discuss Current Limitations that T10-PI RDMA offload poses on iSCSI protocol (ImmediateData, UnsolDataOut) and if/how
they can be solved.
- What-ever else comes to mind...

+1

Would like to hear this discussion and see how this implementation can expand to Fibre Channel HW offload(Target mode storage).

Regards,
Quinn Tran

Quoted 7 lines

Thanks,
Sagi.
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#3 lore raw
In reply to Sagi Grimberg
Quoted 33 lines · Sagi Grimberg

Hey SCSI (and LSF) folks,

I'd like to propose the following topic for upcoming LSF-MM:

T10-PI standard is becoming more and more appealing for storage and cloud solutions.
Since error-detection coding comes with its cost of CPU computation overhead,
state-of-the-art ASICs offer the ability to offload T10-PI operations (DIF/DIX), examples
are SAS & FC controllers. Recently, the support for T10-PI offload over RDMA transactions
was introduced in the Mellanox Connect-IB HCA.

The first building block, RDMA verbs API supporting T10-PI offload was submitted over
Linux-rdma (see http://marc.info/?l=linux-rdma&m=138719320307936&w=2).
Moreover,
we have seen first seeds of T10-PI support in Linux SCSI target entering v3.14 (see
http://lwn.net/Articles/579708/) and RDMA offload implementation in iSER transport
(see http://www.spinics.net/lists/linux-scsi/msg71128.html). There is still some ground to
fill to get protection information support to a full solution over all backend devices.

We would like to use LSF-MM platform to to push forward T10-PI support end-to-end which
requires Linux SCSI Target core level support along with transport level support in iSER and SRP
(and also FCoE in the future) and over to the Initiator side transports.

Quoted 11 lines

Discussion topics:
- Introduce T10-PI offload RDMA verbs and how are used in storage applications.
- Discuss effects of DIX1.1 (currently a draft) in Target implementation (core level -> transport level -> HW level).
- Discuss T10-PI Type 4 (16-byte DIF) status and possible implications on Target & Initiator implementation down to HW level.
- Discuss Current Limitations that T10-PI RDMA offload poses on iSCSI protocol (ImmediateData, UnsolDataOut) and if/how
they can be solved.
- What-ever else comes to mind...

+1 for this topic.

As a contributor to the SRP protocol implementation I'm interested in this discussion. Having an API for T10-PI offload in the RDMA core is a prerequisite before T10-PI support can be added in the SRP initiator and target drivers.

Bart.