Skip to contentSkip to conversation

ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

RFC PATCH Superseded Hans de Goede 4 participants 18 messages Jan 20, 2014 – Feb 3, 2014 2 messages not in the archive

Subsystems (9)

v4 of 7 Superseded Latest is v7 →

lore
Share & tools
lore
#0 lore raw

v4 cover ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

Hi All,

Here is v4 of my patchset for adding ahci-sunxi support. It has grown quite a bit since I've been going for a more generic approach this time and I've also cleaned up the ahci-imx driver to use the same generic approach.

History:

v1, by Olliver Schinagl:
This was using the approach of having a platform device which probe method creates a new child platform device which gets driven by ahci_platform.c, as done by ahci_imx.c .

v2, by Hans de Goede:
Stand-alone platform driver based on Olliver's work

v3, by Hans de Goede:
patch-series, with 4 different parts
a) Make ahci_platform.c more generic, handle more then 1 clk, target pwr regulator
b) New ahci-sunxi code only populating ahci_platform_data, passed to ahci_platform.c to of_device_id matching.
c) Refactor ahci-imx code to work the same as the new ahci-sunxi code, this is the reason why v3 is an RFC, I'm waiting for the wandboard I ordered to arrive so that I can actually test this.
d) dts bindings for the sunxi ahci parts

v4, by Hans de Goede:
patch-series, with 5 different parts:
a) Make ahci_platform.c more generic, handle more then 1 clk, target pwr regulator
b) Turn parts of ahci_platform.c into a library for use by other drivers
c) New ahci-sunxi driver using the ahci_platform.c library functionality
d) Refactor ahci-imx code to work the same as the new ahci-sunxi code
e) dts bindings for the sunxi ahci parts

Parts a-d are intended for merging through the ata tree, the dts bindings will be merged to Maxime Ripard's sunxi-dts tree.

Regards,

Hans

#1 lore raw

RFC PATCH v4 1/10 libahci: Allow drivers to override start_engine

Allwinner A10 and A20 ARM SoCs have an AHCI sata controller which needs a special register to be poked before starting the DMA engine.

This register gets reset on an ahci_stop_engine call, so there is no other place then ahci_start_engine where this poking can be done.

This commit allows drivers to override ahci_start_engine behavior for use by the Allwinner AHCI driver (and potentially other drivers in the future).

---
 drivers/ata/ahci.c          |  6 ++++--
 drivers/ata/ahci.h          |  3 ++-
 drivers/ata/libahci.c       | 27 ++++++++++++++++++---------
 drivers/ata/sata_highbank.c |  3 ++-
 4 files changed, 26 insertions(+), 13 deletions(-)
drivers/ata/ahci.c +4 -2
index c0ed4f27..bb4c903 100644
@@ -559,6 +559,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
 				 unsigned long deadline)
 {
 	struct ata_port *ap = link->ap;
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	bool online;
 	int rc;
 
@@ -569,7 +570,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
 	rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
 				 deadline, &online, NULL);
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 
 	DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
 
@@ -584,6 +585,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
 {
 	struct ata_port *ap = link->ap;
 	struct ahci_port_priv *pp = ap->private_data;
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
 	struct ata_taskfile tf;
 	bool online;
@@ -599,7 +601,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
 	rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
 				 deadline, &online, NULL);
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 
 	/* The pseudo configuration device on SIMG4726 attached to
 	 * ASUS P5W-DH Deluxe doesn't send signature FIS after
drivers/ata/ahci.h +2 -1
index 2289efd..2c04211 100644
@@ -323,6 +323,8 @@ struct ahci_host_priv {
 	u32			em_msg_type;	/* EM message type */
 	struct clk		*clk;		/* Only for platforms supporting clk */
 	void			*plat_data;	/* Other platform data */
+	/* Optional ahci_start_engine override */
+	void			(*start_engine)(struct ata_port *ap);
 };
 
 extern int ahci_ignore_sss;
@@ -357,7 +359,6 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class,
 		      int (*check_ready)(struct ata_link *link));
 
 int ahci_stop_engine(struct ata_port *ap);
-void ahci_start_engine(struct ata_port *ap);
 int ahci_check_ready(struct ata_link *link);
 int ahci_kick_engine(struct ata_port *ap);
 int ahci_port_resume(struct ata_port *ap);
drivers/ata/libahci.c +18 -9
index c482f8c..96d128c 100644
@@ -69,6 +69,7 @@ static ssize_t ahci_transmit_led_message(struct ata_port *ap, u32 state,
 
 static int ahci_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
 static int ahci_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
+static void ahci_start_engine(struct ata_port *ap);
 static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
 static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc);
 static int ahci_port_start(struct ata_port *ap);
@@ -500,6 +501,9 @@ void ahci_save_initial_config(struct device *dev,
 	hpriv->cap = cap;
 	hpriv->cap2 = cap2;
 	hpriv->port_map = port_map;
+
+	if (!hpriv->start_engine)
+		hpriv->start_engine = ahci_start_engine;
 }
 EXPORT_SYMBOL_GPL(ahci_save_initial_config);
 
@@ -565,7 +569,7 @@ static int ahci_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
 	return -EINVAL;
 }
 
-void ahci_start_engine(struct ata_port *ap)
+static void ahci_start_engine(struct ata_port *ap)
 {
 	void __iomem *port_mmio = ahci_port_base(ap);
 	u32 tmp;
@@ -576,7 +580,6 @@ void ahci_start_engine(struct ata_port *ap)
 	writel(tmp, port_mmio + PORT_CMD);
 	readl(port_mmio + PORT_CMD); /* flush */
 }
-EXPORT_SYMBOL_GPL(ahci_start_engine);
 
 int ahci_stop_engine(struct ata_port *ap)
 {
@@ -766,7 +769,7 @@ static void ahci_start_port(struct ata_port *ap)
 
 	/* enable DMA */
 	if (!(hpriv->flags & AHCI_HFLAG_DELAY_ENGINE))
-		ahci_start_engine(ap);
+		hpriv->start_engine(ap);
 
 	/* turn on LEDs */
 	if (ap->flags & ATA_FLAG_EM) {
@@ -1234,7 +1237,7 @@ int ahci_kick_engine(struct ata_port *ap)
 
 	/* restart engine */
  out_restart:
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 	return rc;
 }
 EXPORT_SYMBOL_GPL(ahci_kick_engine);
@@ -1426,6 +1429,7 @@ static int ahci_hardreset(struct ata_link *link, unsigned int *class,
 	const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
 	struct ata_port *ap = link->ap;
 	struct ahci_port_priv *pp = ap->private_data;
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
 	struct ata_taskfile tf;
 	bool online;
@@ -1443,7 +1447,7 @@ static int ahci_hardreset(struct ata_link *link, unsigned int *class,
 	rc = sata_link_hardreset(link, timing, deadline, &online,
 				 ahci_check_ready);
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 
 	if (online)
 		*class = ahci_dev_classify(ap);
@@ -2007,10 +2011,12 @@ static void ahci_thaw(struct ata_port *ap)
 
 void ahci_error_handler(struct ata_port *ap)
 {
+	struct ahci_host_priv *hpriv = ap->host->private_data;
+
 	if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
 		/* restart engine */
 		ahci_stop_engine(ap);
-		ahci_start_engine(ap);
+		hpriv->start_engine(ap);
 	}
 
 	sata_pmp_error_handler(ap);
@@ -2031,6 +2037,7 @@ static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
 
 static void ahci_set_aggressive_devslp(struct ata_port *ap, bool sleep)
 {
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	void __iomem *port_mmio = ahci_port_base(ap);
 	struct ata_device *dev = ap->link.device;
 	u32 devslp, dm, dito, mdat, deto;
@@ -2094,7 +2101,7 @@ static void ahci_set_aggressive_devslp(struct ata_port *ap, bool sleep)
 		   PORT_DEVSLP_ADSE);
 	writel(devslp, port_mmio + PORT_DEVSLP);
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 
 	/* enable device sleep feature for the drive */
 	err_mask = ata_dev_set_feature(dev,
@@ -2106,6 +2113,7 @@ static void ahci_set_aggressive_devslp(struct ata_port *ap, bool sleep)
 
 static void ahci_enable_fbs(struct ata_port *ap)
 {
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	struct ahci_port_priv *pp = ap->private_data;
 	void __iomem *port_mmio = ahci_port_base(ap);
 	u32 fbs;
@@ -2134,11 +2142,12 @@ static void ahci_enable_fbs(struct ata_port *ap)
 	} else
 		dev_err(ap->host->dev, "Failed to enable FBS\n");
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 }
 
 static void ahci_disable_fbs(struct ata_port *ap)
 {
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	struct ahci_port_priv *pp = ap->private_data;
 	void __iomem *port_mmio = ahci_port_base(ap);
 	u32 fbs;
@@ -2166,7 +2175,7 @@ static void ahci_disable_fbs(struct ata_port *ap)
 		pp->fbs_enabled = false;
 	}
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 }
 
 static void ahci_pmp_attach(struct ata_port *ap)
drivers/ata/sata_highbank.c +2 -1
index ea3b3dc..30aa9c1 100644
@@ -404,6 +404,7 @@ static int ahci_highbank_hardreset(struct ata_link *link, unsigned int *class,
 	static const unsigned long timing[] = { 5, 100, 500};
 	struct ata_port *ap = link->ap;
 	struct ahci_port_priv *pp = ap->private_data;
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
 	struct ata_taskfile tf;
 	bool online;
@@ -432,7 +433,7 @@ static int ahci_highbank_hardreset(struct ata_link *link, unsigned int *class,
 			break;
 	} while (!online && retry--);
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 
 	if (online)
 		*class = ahci_dev_classify(ap);
Signature · 1 line
1.8.5.3
#2 lore raw

RFC PATCH v4 2/10 libahci: Move ahci_host_priv declaration to include/linux/ahci.h

In reply to Hans de Goede

With the ahci-platform.c changes later in this patch-set, some arch/arm/mach-foo/*.c sata drivers need access to ahci_host_priv, so move its declaration outside of drivers/ata.

---
 drivers/ata/ahci.h   | 20 +-------------------
 include/linux/ahci.h | 46 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 47 insertions(+), 19 deletions(-)
 create mode 100644 include/linux/ahci.h
drivers/ata/ahci.h +1 -19
index 2c04211..0f80129 100644
@@ -35,7 +35,7 @@
 #ifndef _AHCI_H
 #define _AHCI_H
 
-#include <linux/clk.h>
+#include <linux/ahci.h>
 #include <linux/libata.h>
 
 /* Enclosure Management Control */
@@ -309,24 +309,6 @@ struct ahci_port_priv {
 	char			*irq_desc;	/* desc in /proc/interrupts */
 };
 
-struct ahci_host_priv {
-	void __iomem *		mmio;		/* bus-independent mem map */
-	unsigned int		flags;		/* AHCI_HFLAG_* */
-	u32			cap;		/* cap to use */
-	u32			cap2;		/* cap2 to use */
-	u32			port_map;	/* port map to use */
-	u32			saved_cap;	/* saved initial cap */
-	u32			saved_cap2;	/* saved initial cap2 */
-	u32			saved_port_map;	/* saved initial port_map */
-	u32 			em_loc; /* enclosure management location */
-	u32			em_buf_sz;	/* EM buffer size in byte */
-	u32			em_msg_type;	/* EM message type */
-	struct clk		*clk;		/* Only for platforms supporting clk */
-	void			*plat_data;	/* Other platform data */
-	/* Optional ahci_start_engine override */
-	void			(*start_engine)(struct ata_port *ap);
-};
-
 extern int ahci_ignore_sss;
 
 extern struct device_attribute *ahci_shost_attrs[];
include/linux/ahci.h new file +46 -0

46 lines not on this page · raw message

Signature · 1 line
1.8.5.3
#3 lore raw

RFC PATCH v4 3/10 ahci-platform: Pass ahci_host_priv ptr to ahci_platform_data init method

In reply to Hans de Goede

Some ahci_platform_data->init methods need access to the ahci_host_priv data.

When calling ahci_platform_data->init the ata_host has not been allocated yet, so access to ahci_host_priv through the dev argument is not possible.

---
 arch/arm/mach-davinci/devices-da8xx.c |  5 +++--
 arch/arm/mach-spear/spear1340.c       |  2 +-
 drivers/ata/ahci_imx.c                | 12 ++++++------
 drivers/ata/ahci_platform.c           |  2 +-
 include/linux/ahci_platform.h         |  3 ++-
 5 files changed, 13 insertions(+), 11 deletions(-)
arch/arm/mach-davinci/devices-da8xx.c +3 -2
index 78829c5..28e7c4c 100644
@@ -14,6 +14,7 @@
 #include <linux/platform_device.h>
 #include <linux/dma-contiguous.h>
 #include <linux/serial_8250.h>
+#include <linux/ahci.h>
 #include <linux/ahci_platform.h>
 #include <linux/clk.h>
 #include <linux/reboot.h>
@@ -1061,7 +1062,7 @@ static unsigned long da850_sata_xtal[] = {
 	KHZ_TO_HZ(60000),
 };
 
-static int da850_sata_init(struct device *dev, void __iomem *addr)
+static int da850_sata_init(struct device *dev, struct ahci_host_priv *hpriv)
 {
 	int i, ret;
 	unsigned int val;
@@ -1096,7 +1097,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr)
 		SATA_PHY_TXSWING(3) |
 		SATA_PHY_ENPLL(1);
 
-	__raw_writel(val, addr + SATA_P0PHYCR_REG);
+	__raw_writel(val, hpriv->mmio + SATA_P0PHYCR_REG);
 
 	return 0;
 
arch/arm/mach-spear/spear1340.c +1 -1
index 3fb6834..9e2f3ac 100644
@@ -77,7 +77,7 @@
 			SPEAR1340_MIPHY_PLL_RATIO_TOP(25))
 
 /* SATA device registration */
-static int sata_miphy_init(struct device *dev, void __iomem *addr)
+static int sata_miphy_init(struct device *dev, struct ahci_host_priv *hpriv)
 {
 	writel(SPEAR1340_SATA_CFG_VAL, SPEAR1340_PCIE_SATA_CFG);
 	writel(SPEAR1340_PCIE_SATA_MIPHY_CFG_SATA_25M_CRYSTAL_CLK,
drivers/ata/ahci_imx.c +6 -6
index 3e23e99..49fa0ca 100644
@@ -91,7 +91,7 @@ static const struct ata_port_info ahci_imx_port_info = {
 	.port_ops	= &ahci_imx_ops,
 };
 
-static int imx6q_sata_init(struct device *dev, void __iomem *mmio)
+static int imx6q_sata_init(struct device *dev, struct ahci_host_priv *hpriv)
 {
 	int ret = 0;
 	unsigned int reg_val;
@@ -145,19 +145,19 @@ static int imx6q_sata_init(struct device *dev, void __iomem *mmio)
 	 * Implement the port0.
 	 * Get the ahb clock rate, and configure the TIMER1MS register.
 	 */
-	reg_val = readl(mmio + HOST_CAP);
+	reg_val = readl(hpriv->mmio + HOST_CAP);
 	if (!(reg_val & HOST_CAP_SSS)) {
 		reg_val |= HOST_CAP_SSS;
-		writel(reg_val, mmio + HOST_CAP);
+		writel(reg_val, hpriv->mmio + HOST_CAP);
 	}
-	reg_val = readl(mmio + HOST_PORTS_IMPL);
+	reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL);
 	if (!(reg_val & 0x1)) {
 		reg_val |= 0x1;
-		writel(reg_val, mmio + HOST_PORTS_IMPL);
+		writel(reg_val, hpriv->mmio + HOST_PORTS_IMPL);
 	}
 
 	reg_val = clk_get_rate(imxpriv->ahb_clk) / 1000;
-	writel(reg_val, mmio + HOST_TIMER1MS);
+	writel(reg_val, hpriv->mmio + HOST_TIMER1MS);
 
 	return 0;
 }
drivers/ata/ahci_platform.c +1 -1
index 4b231ba..434ab89 100644
@@ -149,7 +149,7 @@ static int ahci_probe(struct platform_device *pdev)
 	 * returned successfully.
 	 */
 	if (pdata && pdata->init) {
-		rc = pdata->init(dev, hpriv->mmio);
+		rc = pdata->init(dev, hpriv);
 		if (rc)
 			goto disable_unprepare_clk;
 	}
include/linux/ahci_platform.h +2 -1
index 73a2500..737fe38 100644
@@ -19,9 +19,10 @@
 
 struct device;
 struct ata_port_info;
+struct ahci_host_priv;
 
 struct ahci_platform_data {
-	int (*init)(struct device *dev, void __iomem *addr);
+	int (*init)(struct device *dev, struct ahci_host_priv *hpriv);
 	void (*exit)(struct device *dev);
 	int (*suspend)(struct device *dev);
 	int (*resume)(struct device *dev);
Signature · 1 line
1.8.5.3
#4 lore raw

RFC PATCH v4 4/10 ahci-platform: Add support for devices with more then 1 clock

In reply to Hans de Goede

The allwinner-sun4i AHCI controller needs 2 clocks to be enabled and the imx AHCI controller needs 3 clocks to be enabled.

---
 .../devicetree/bindings/ata/ahci-platform.txt      |  1 +
 drivers/ata/ahci_platform.c                        | 97 +++++++++++++++-------
 include/linux/ahci.h                               |  4 +-
 include/linux/ahci_platform.h                      |  3 +
 4 files changed, 73 insertions(+), 32 deletions(-)
Documentation/devicetree/bindings/ata/ahci-platform.txt +1 -0
index 89de156..3ced07d 100644
@@ -10,6 +10,7 @@ Required properties:
 
 Optional properties:
 - dma-coherent      : Present if dma operations are coherent
+- clocks            : a list of phandle + clock specifier pairs
 
 Example:
         sata at ffe08000 {
drivers/ata/ahci_platform.c +66 -31

149 lines not on this page · raw message

include/linux/ahci.h +3 -1
index 3499d44..19970b0 100644
@@ -23,6 +23,8 @@
 
 #include <linux/clk.h>
 
+#define AHCI_MAX_CLKS		3
+
 struct ata_port;
 
 struct ahci_host_priv {
@@ -37,7 +39,7 @@ struct ahci_host_priv {
 	u32			em_loc; /* enclosure management location */
 	u32			em_buf_sz;	/* EM buffer size in byte */
 	u32			em_msg_type;	/* EM message type */
-	struct clk		*clk;		/* Optional */
+	struct clk		*clks[AHCI_MAX_CLKS]; /* Optional */
 	void			*plat_data;	/* Other platform data */
 	/* Optional ahci_start_engine override */
 	void			(*start_engine)(struct ata_port *ap);
include/linux/ahci_platform.h +3 -0
index 737fe38..0071d0b 100644
@@ -31,4 +31,7 @@ struct ahci_platform_data {
 	unsigned int mask_port_map;
 };
 
+int ahci_platform_enable_clks(struct ahci_host_priv *hpriv);
+void ahci_platform_disable_clks(struct ahci_host_priv *hpriv);
+
 #endif /* _AHCI_PLATFORM_H */
Signature · 1 line
1.8.5.3
#5 lore raw

RFC PATCH v4 5/10 ahci-platform: Add support for an optional regulator for sata-target power

In reply to Hans de Goede
---
 .../devicetree/bindings/ata/ahci-platform.txt      |  1 +
 drivers/ata/ahci_platform.c                        | 35 ++++++++++++++++++++--
 include/linux/ahci.h                               |  2 ++
 3 files changed, 36 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/ata/ahci-platform.txt +1 -0
index 3ced07d..1ac807f 100644
@@ -11,6 +11,7 @@ Required properties:
 Optional properties:
 - dma-coherent      : Present if dma operations are coherent
 - clocks            : a list of phandle + clock specifier pairs
+- target-supply     : regulator for SATA target power
 
 Example:
         sata at ffe08000 {
drivers/ata/ahci_platform.c +33 -2
index aaa0c08..2f319e9 100644
@@ -167,6 +167,13 @@ static int ahci_probe(struct platform_device *pdev)
 		return -ENOMEM;
 	}
 
+	hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
+	if (IS_ERR(hpriv->target_pwr)) {
+		if (PTR_ERR(hpriv->target_pwr) == -EPROBE_DEFER)
+			return -EPROBE_DEFER;
+		hpriv->target_pwr = NULL;
+	}
+
 	max_clk = dev->of_node ? AHCI_MAX_CLKS : 1;
 	for (i = 0; i < max_clk; i++) {
 		if (i == 0)
@@ -183,9 +190,15 @@ static int ahci_probe(struct platform_device *pdev)
 		hpriv->clks[i] = clk;
 	}
 
+	if (hpriv->target_pwr) {
+		rc = regulator_enable(hpriv->target_pwr);
+		if (rc)
+			goto free_clk;
+	}
+
 	rc = ahci_enable_clks(dev, hpriv);
 	if (rc)
-		goto free_clk;
+		goto disable_regulator;
 
 	/*
 	 * Some platforms might need to prepare for mmio region access,
@@ -268,6 +281,9 @@ pdata_exit:
 		pdata->exit(dev);
 disable_unprepare_clk:
 	ahci_disable_clks(hpriv);
+disable_regulator:
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
 free_clk:
 	ahci_put_clks(hpriv);
 	return rc;
@@ -284,6 +300,9 @@ static void ahci_host_stop(struct ata_host *host)
 
 	ahci_disable_clks(hpriv);
 	ahci_put_clks(hpriv);
+
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
 }
 
 #ifdef CONFIG_PM_SLEEP
@@ -320,6 +339,9 @@ static int ahci_suspend(struct device *dev)
 
 	ahci_disable_clks(hpriv);
 
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
+
 	return 0;
 }
 
@@ -330,9 +352,15 @@ static int ahci_resume(struct device *dev)
 	struct ahci_host_priv *hpriv = host->private_data;
 	int rc;
 
+	if (hpriv->target_pwr) {
+		rc = regulator_enable(hpriv->target_pwr);
+		if (rc)
+			return rc;
+	}
+
 	rc = ahci_enable_clks(dev, hpriv);
 	if (rc)
-		return rc;
+		goto disable_regulator;
 
 	if (pdata && pdata->resume) {
 		rc = pdata->resume(dev);
@@ -354,6 +382,9 @@ static int ahci_resume(struct device *dev)
 
 disable_unprepare_clk:
 	ahci_disable_clks(hpriv);
+disable_regulator:
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
 
 	return rc;
 }
include/linux/ahci.h +2 -0
index 19970b0..ac69cdc 100644
@@ -22,6 +22,7 @@
 #define __LINUX_AHCI_H__
 
 #include <linux/clk.h>
+#include <linux/regulator/consumer.h>
 
 #define AHCI_MAX_CLKS		3
 
@@ -40,6 +41,7 @@ struct ahci_host_priv {
 	u32			em_buf_sz;	/* EM buffer size in byte */
 	u32			em_msg_type;	/* EM message type */
 	struct clk		*clks[AHCI_MAX_CLKS]; /* Optional */
+	struct regulator	*target_pwr;	/* Optional */
 	void			*plat_data;	/* Other platform data */
 	/* Optional ahci_start_engine override */
 	void			(*start_engine)(struct ata_port *ap);
Signature · 1 line
1.8.5.3
#6 lore raw

RFC PATCH v4 6/10 ahci-platform: Add enable_ / disable_resources helper functions

In reply to Hans de Goede
---
 drivers/ata/ahci_platform.c   | 83 ++++++++++++++++++++++++-------------------
 include/linux/ahci_platform.h |  2 ++
 2 files changed, 48 insertions(+), 37 deletions(-)
drivers/ata/ahci_platform.c +46 -37
index 2f319e9..1cce7a2 100644
@@ -117,6 +117,39 @@ void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
 EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
 
 
+int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
+{
+	int rc;
+
+	if (hpriv->target_pwr) {
+		rc = regulator_enable(hpriv->target_pwr);
+		if (rc)
+			return rc;
+	}
+
+	rc = ahci_platform_enable_clks(hpriv);
+	if (rc)
+		goto disable_regulator;
+
+	return 0;
+
+disable_regulator:
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
+	return rc;
+}
+EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
+
+void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
+{
+	ahci_platform_disable_clks(hpriv);
+
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
+
+
 static void ahci_put_clks(struct ahci_host_priv *hpriv)
 {
 	int c;
@@ -190,15 +223,9 @@ static int ahci_probe(struct platform_device *pdev)
 		hpriv->clks[i] = clk;
 	}
 
-	if (hpriv->target_pwr) {
-		rc = regulator_enable(hpriv->target_pwr);
-		if (rc)
-			goto free_clk;
-	}
-
-	rc = ahci_enable_clks(dev, hpriv);
+	rc = ahci_platform_enable_resources(hpriv);
 	if (rc)
-		goto disable_regulator;
+		goto free_clk;
 
 	/*
 	 * Some platforms might need to prepare for mmio region access,
@@ -209,7 +236,7 @@ static int ahci_probe(struct platform_device *pdev)
 	if (pdata && pdata->init) {
 		rc = pdata->init(dev, hpriv);
 		if (rc)
-			goto disable_unprepare_clk;
+			goto disable_resources;
 	}
 
 	ahci_save_initial_config(dev, hpriv,
@@ -279,11 +306,8 @@ static int ahci_probe(struct platform_device *pdev)
 pdata_exit:
 	if (pdata && pdata->exit)
 		pdata->exit(dev);
-disable_unprepare_clk:
-	ahci_disable_clks(hpriv);
-disable_regulator:
-	if (hpriv->target_pwr)
-		regulator_disable(hpriv->target_pwr);
+disable_resources:
+	ahci_platform_disable_resources(hpriv);
 free_clk:
 	ahci_put_clks(hpriv);
 	return rc;
@@ -298,11 +322,8 @@ static void ahci_host_stop(struct ata_host *host)
 	if (pdata && pdata->exit)
 		pdata->exit(dev);
 
-	ahci_disable_clks(hpriv);
+	ahci_platform_disable_resources(hpriv);
 	ahci_put_clks(hpriv);
-
-	if (hpriv->target_pwr)
-		regulator_disable(hpriv->target_pwr);
 }
 
 #ifdef CONFIG_PM_SLEEP
@@ -337,10 +358,7 @@ static int ahci_suspend(struct device *dev)
 	if (pdata && pdata->suspend)
 		return pdata->suspend(dev);
 
-	ahci_disable_clks(hpriv);
-
-	if (hpriv->target_pwr)
-		regulator_disable(hpriv->target_pwr);
+	ahci_platform_disable_resources(hpriv);
 
 	return 0;
 }
@@ -352,26 +370,20 @@ static int ahci_resume(struct device *dev)
 	struct ahci_host_priv *hpriv = host->private_data;
 	int rc;
 
-	if (hpriv->target_pwr) {
-		rc = regulator_enable(hpriv->target_pwr);
-		if (rc)
-			return rc;
-	}
-
-	rc = ahci_enable_clks(dev, hpriv);
+	rc = ahci_platform_enable_resources(hpriv);
 	if (rc)
-		goto disable_regulator;
+		return rc;
 
 	if (pdata && pdata->resume) {
 		rc = pdata->resume(dev);
 		if (rc)
-			goto disable_unprepare_clk;
+			goto disable_resources;
 	}
 
 	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
 		rc = ahci_reset_controller(host);
 		if (rc)
-			goto disable_unprepare_clk;
+			goto disable_resources;
 
 		ahci_init_controller(host);
 	}
@@ -380,11 +392,8 @@ static int ahci_resume(struct device *dev)
 
 	return 0;
 
-disable_unprepare_clk:
-	ahci_disable_clks(hpriv);
-disable_regulator:
-	if (hpriv->target_pwr)
-		regulator_disable(hpriv->target_pwr);
+disable_resources:
+	ahci_platform_disable_resources(hpriv);
 
 	return rc;
 }
include/linux/ahci_platform.h +2 -0
index 0071d0b..5e5f85e 100644
@@ -33,5 +33,7 @@ struct ahci_platform_data {
 
 int ahci_platform_enable_clks(struct ahci_host_priv *hpriv);
 void ahci_platform_disable_clks(struct ahci_host_priv *hpriv);
+int ahci_platform_enable_resources(struct ahci_host_priv *hpriv);
+void ahci_platform_disable_resources(struct ahci_host_priv *hpriv);
 
 #endif /* _AHCI_PLATFORM_H */
Signature · 1 line
1.8.5.3
#7 lore raw

RFC PATCH v4 7/10 ahci-platform: "Library-ise" ahci_probe functionality

In reply to Hans de Goede

ahci_probe consists of 3 steps:
1) Get resources (get mmio, clks, regulator)
2) Enable resources, handled by ahci_platform_enable_resouces
3) The more or less standard ahci-host controller init sequence

This commit refactors step 1 and 3 into separate functions, so the platform drivers for AHCI implementations which need a specific order in step 2, and / or need to do some custom register poking at some time, can re-use ahci-platform.c code without needing to copy and paste it.

Note that ahci_platform_init_host's prototype takes the 3 non function members of ahci_platform_data as arguments, the idea is that drivers using the new exported utility functions will not use ahci_platform_data at all, and hopefully in the future ahci_platform_data can go away entirely.

---
 drivers/ata/ahci_platform.c   | 158 ++++++++++++++++++++++++------------------
 include/linux/ahci_platform.h |  14 ++++
 2 files changed, 106 insertions(+), 66 deletions(-)
drivers/ata/ahci_platform.c +92 -66
index 1cce7a2..b260ebe 100644
@@ -150,60 +150,31 @@ void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
 EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
 
 
-static void ahci_put_clks(struct ahci_host_priv *hpriv)
-{
-	int c;
-
-	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
-		clk_put(hpriv->clks[c]);
-}
-
-static int ahci_probe(struct platform_device *pdev)
+struct ahci_host_priv *ahci_platform_get_resources(
+	struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
-	struct ahci_platform_data *pdata = dev_get_platdata(dev);
-	const struct platform_device_id *id = platform_get_device_id(pdev);
-	struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
-	const struct ata_port_info *ppi[] = { &pi, NULL };
 	struct ahci_host_priv *hpriv;
-	struct ata_host *host;
-	struct resource *mem;
 	struct clk *clk;
-	int i, irq, max_clk, n_ports, rc;
-
-	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (!mem) {
-		dev_err(dev, "no mmio space\n");
-		return -EINVAL;
-	}
-
-	irq = platform_get_irq(pdev, 0);
-	if (irq <= 0) {
-		dev_err(dev, "no irq\n");
-		return -EINVAL;
-	}
-
-	if (pdata && pdata->ata_port_info)
-		pi = *pdata->ata_port_info;
+	int i, max_clk, rc;
 
 	hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
 	if (!hpriv) {
 		dev_err(dev, "can't alloc ahci_host_priv\n");
-		return -ENOMEM;
+		return ERR_PTR(-ENOMEM);
 	}
 
-	hpriv->flags |= (unsigned long)pi.private_data;
-
-	hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
+	hpriv->mmio = devm_ioremap_resource(dev,
+			      platform_get_resource(pdev, IORESOURCE_MEM, 0));
 	if (!hpriv->mmio) {
-		dev_err(dev, "can't map %pR\n", mem);
-		return -ENOMEM;
+		dev_err(dev, "no mmio space\n");
+		return ERR_PTR(-EINVAL);
 	}
 
 	hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
 	if (IS_ERR(hpriv->target_pwr)) {
 		if (PTR_ERR(hpriv->target_pwr) == -EPROBE_DEFER)
-			return -EPROBE_DEFER;
+			return ERR_PTR(-EPROBE_DEFER);
 		hpriv->target_pwr = NULL;
 	}
 
@@ -223,27 +194,48 @@ static int ahci_probe(struct platform_device *pdev)
 		hpriv->clks[i] = clk;
 	}
 
-	rc = ahci_platform_enable_resources(hpriv);
-	if (rc)
-		goto free_clk;
+	return hpriv;
 
-	/*
-	 * Some platforms might need to prepare for mmio region access,
-	 * which could be done in the following init call. So, the mmio
-	 * region shouldn't be accessed before init (if provided) has
-	 * returned successfully.
-	 */
-	if (pdata && pdata->init) {
-		rc = pdata->init(dev, hpriv);
-		if (rc)
-			goto disable_resources;
-	}
+free_clk:
+	while (--i >= 0)
+		clk_put(hpriv->clks[i]);
+	return ERR_PTR(rc);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
+
+void ahci_platform_put_resources(struct ahci_host_priv *hpriv)
+{
+	int c;
+
+	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
+		clk_put(hpriv->clks[c]);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_put_resources);
+
+
+int ahci_platform_init_host(struct platform_device *pdev,
+			    struct ahci_host_priv *hpriv,
+			    const struct ata_port_info *pi_template,
+			    unsigned int force_port_map,
+			    unsigned int mask_port_map)
+{
+	struct device *dev = &pdev->dev;
+	struct ata_port_info pi = *pi_template;
+	const struct ata_port_info *ppi[] = { &pi, NULL };
+	struct ata_host *host;
+	int i, irq, n_ports, rc;
 
-	ahci_save_initial_config(dev, hpriv,
-		pdata ? pdata->force_port_map : 0,
-		pdata ? pdata->mask_port_map  : 0);
+	irq = platform_get_irq(pdev, 0);
+	if (irq <= 0) {
+		dev_err(dev, "no irq\n");
+		return -EINVAL;
+	}
 
 	/* prepare host */
+	hpriv->flags |= (unsigned long)pi.private_data;
+
+	ahci_save_initial_config(dev, hpriv, force_port_map, mask_port_map);
+
 	if (hpriv->cap & HOST_CAP_NCQ)
 		pi.flags |= ATA_FLAG_NCQ;
 
@@ -260,10 +252,8 @@ static int ahci_probe(struct platform_device *pdev)
 	n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
 
 	host = ata_host_alloc_pinfo(dev, ppi, n_ports);
-	if (!host) {
-		rc = -ENOMEM;
-		goto pdata_exit;
-	}
+	if (!host)
+		return -ENOMEM;
 
 	host->private_data = hpriv;
 
@@ -278,7 +268,8 @@ static int ahci_probe(struct platform_device *pdev)
 	for (i = 0; i < host->n_ports; i++) {
 		struct ata_port *ap = host->ports[i];
 
-		ata_port_desc(ap, "mmio %pR", mem);
+		ata_port_desc(ap, "mmio %pR",
+			      platform_get_resource(pdev, IORESOURCE_MEM, 0));
 		ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
 
 		/* set enclosure management message type */
@@ -292,13 +283,48 @@ static int ahci_probe(struct platform_device *pdev)
 
 	rc = ahci_reset_controller(host);
 	if (rc)
-		goto pdata_exit;
+		return rc;
 
 	ahci_init_controller(host);
 	ahci_print_info(host, "platform");
 
-	rc = ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
-			       &ahci_platform_sht);
+	return ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
+				 &ahci_platform_sht);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_init_host);
+
+static int ahci_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct ahci_platform_data *pdata = dev_get_platdata(dev);
+	const struct platform_device_id *id = platform_get_device_id(pdev);
+	struct ahci_host_priv *hpriv;
+	int rc;
+
+	hpriv = ahci_platform_get_resources(pdev);
+	if (IS_ERR(hpriv))
+		return PTR_ERR(hpriv);
+
+	rc = ahci_platform_enable_resources(hpriv);
+	if (rc)
+		goto put_resources;
+
+	/*
+	 * Some platforms might need to prepare for mmio region access,
+	 * which could be done in the following init call. So, the mmio
+	 * region shouldn't be accessed before init (if provided) has
+	 * returned successfully.
+	 */
+	if (pdata && pdata->init) {
+		rc = pdata->init(dev, hpriv);
+		if (rc)
+			goto disable_resources;
+	}
+
+	rc = ahci_platform_init_host(pdev, hpriv,
+				     &ahci_port_info[id ? id->driver_data : 0],
+				     pdata ? pdata->force_port_map : 0,
+				     pdata ? pdata->mask_port_map  : 0);
 	if (rc)
 		goto pdata_exit;
 
@@ -308,8 +334,8 @@ pdata_exit:
 		pdata->exit(dev);
 disable_resources:
 	ahci_platform_disable_resources(hpriv);
-free_clk:
-	ahci_put_clks(hpriv);
+put_resources:
+	ahci_platform_put_resources(hpriv);
 	return rc;
 }
 
@@ -323,7 +349,7 @@ static void ahci_host_stop(struct ata_host *host)
 		pdata->exit(dev);
 
 	ahci_platform_disable_resources(hpriv);
-	ahci_put_clks(hpriv);
+	ahci_platform_put_resources(hpriv);
 }
 
 #ifdef CONFIG_PM_SLEEP
include/linux/ahci_platform.h +14 -0
index 5e5f85e..1dc7602 100644
@@ -20,7 +20,13 @@
 struct device;
 struct ata_port_info;
 struct ahci_host_priv;
+struct platform_device;
 
+/*
+ * Note ahci_platform_data is deprecated. New drivers which need to override
+ * any of these, should instead declare there own platform_driver struct, and
+ * use ahci_platform* functions in their own probe, suspend and resume methods.
+ */
 struct ahci_platform_data {
 	int (*init)(struct device *dev, struct ahci_host_priv *hpriv);
 	void (*exit)(struct device *dev);
@@ -35,5 +41,13 @@ int ahci_platform_enable_clks(struct ahci_host_priv *hpriv);
 void ahci_platform_disable_clks(struct ahci_host_priv *hpriv);
 int ahci_platform_enable_resources(struct ahci_host_priv *hpriv);
 void ahci_platform_disable_resources(struct ahci_host_priv *hpriv);
+struct ahci_host_priv *ahci_platform_get_resources(
+	struct platform_device *pdev);
+void ahci_platform_put_resources(struct ahci_host_priv *hpriv);
+int ahci_platform_init_host(struct platform_device *pdev,
+			    struct ahci_host_priv *hpriv,
+			    const struct ata_port_info *pi_template,
+			    unsigned int force_port_map,
+			    unsigned int mask_port_map);
 
 #endif /* _AHCI_PLATFORM_H */
Signature · 1 line
1.8.5.3
#8 lore raw

RFC PATCH v4 8/10 ahci-platform: "Library-ise" suspend / resume functionality

In reply to Hans de Goede

Split suspend / resume code into host suspend / resume functionality and resource enable / disabling phases, and export the new suspend_ / resume_host functions.

---
 drivers/ata/ahci_platform.c   | 55 +++++++++++++++++++++++++++++++------------
 include/linux/ahci_platform.h |  7 ++++++
 2 files changed, 47 insertions(+), 15 deletions(-)
drivers/ata/ahci_platform.c +40 -15
index b260ebe..ba93930 100644
@@ -353,14 +353,12 @@ static void ahci_host_stop(struct ata_host *host)
 }
 
 #ifdef CONFIG_PM_SLEEP
-static int ahci_suspend(struct device *dev)
+int ahci_platform_suspend_host(struct device *dev)
 {
-	struct ahci_platform_data *pdata = dev_get_platdata(dev);
 	struct ata_host *host = dev_get_drvdata(dev);
 	struct ahci_host_priv *hpriv = host->private_data;
 	void __iomem *mmio = hpriv->mmio;
 	u32 ctl;
-	int rc;
 
 	if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
 		dev_err(dev, "firmware update required for suspend/resume\n");
@@ -377,7 +375,37 @@ static int ahci_suspend(struct device *dev)
 	writel(ctl, mmio + HOST_CTL);
 	readl(mmio + HOST_CTL); /* flush */
 
-	rc = ata_host_suspend(host, PMSG_SUSPEND);
+	return ata_host_suspend(host, PMSG_SUSPEND);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
+
+int ahci_platform_resume_host(struct device *dev)
+{
+	struct ata_host *host = dev_get_drvdata(dev);
+	int rc;
+
+	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
+		rc = ahci_reset_controller(host);
+		if (rc)
+			return rc;
+
+		ahci_init_controller(host);
+	}
+
+	ata_host_resume(host);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
+
+int ahci_platform_suspend(struct device *dev)
+{
+	struct ahci_platform_data *pdata = dev_get_platdata(dev);
+	struct ata_host *host = dev_get_drvdata(dev);
+	struct ahci_host_priv *hpriv = host->private_data;
+	int rc;
+
+	rc = ahci_platform_suspend_host(dev);
 	if (rc)
 		return rc;
 
@@ -388,8 +416,9 @@ static int ahci_suspend(struct device *dev)
 
 	return 0;
 }
+EXPORT_SYMBOL_GPL(ahci_platform_suspend);
 
-static int ahci_resume(struct device *dev)
+int ahci_platform_resume(struct device *dev)
 {
 	struct ahci_platform_data *pdata = dev_get_platdata(dev);
 	struct ata_host *host = dev_get_drvdata(dev);
@@ -406,15 +435,9 @@ static int ahci_resume(struct device *dev)
 			goto disable_resources;
 	}
 
-	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
-		rc = ahci_reset_controller(host);
-		if (rc)
-			goto disable_resources;
-
-		ahci_init_controller(host);
-	}
-
-	ata_host_resume(host);
+	rc = ahci_platform_resume_host(dev);
+	if (rc)
+		goto disable_resources;
 
 	return 0;
 
@@ -423,9 +446,11 @@ disable_resources:
 
 	return rc;
 }
+EXPORT_SYMBOL_GPL(ahci_platform_resume);
 #endif
 
-static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);
+static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_platform_suspend,
+			 ahci_platform_resume);
 
 static const struct of_device_id ahci_of_match[] = {
 	{ .compatible = "snps,spear-ahci", },
include/linux/ahci_platform.h +7 -0
index 1dc7602..b484ac0 100644
@@ -50,4 +50,11 @@ int ahci_platform_init_host(struct platform_device *pdev,
 			    unsigned int force_port_map,
 			    unsigned int mask_port_map);
 
+#ifdef CONFIG_PM_SLEEP
+int ahci_platform_suspend_host(struct device *dev);
+int ahci_platform_resume_host(struct device *dev);
+int ahci_platform_suspend(struct device *dev);
+int ahci_platform_resume(struct device *dev);
+#endif
+
 #endif /* _AHCI_PLATFORM_H */
Signature · 1 line
1.8.5.3
#9 lore raw

RFC PATCH v4 9/10 ARM: sunxi: Add support for Allwinner SUNXi SoCs sata to ahci_platform

In reply to Hans de Goede

From: Olliver Schinagl <[email protected]>

This patch adds support for the ahci sata controler found on Allwinner A10 and A20 SoCs to the ahci_platform driver.

Orignally written by Olliver Schinagl using the approach of having a platform device which probe method creates a new child platform device which gets driven by ahci_platform.c, as done by ahci_imx.c .

Refactored by Hans de Goede to add most of the non sunxi specific functionality to ahci_platform.c and use a platform_data pointer from of_device_id for the sunxi specific bits.

---
 .../devicetree/bindings/ata/ahci-platform.txt      |  18 +-
 drivers/ata/Kconfig                                |   9 +
 drivers/ata/Makefile                               |   1 +
 drivers/ata/ahci_sunxi.c                           | 242 +++++++++++++++++++++
 4 files changed, 267 insertions(+), 3 deletions(-)
 create mode 100644 drivers/ata/ahci_sunxi.c
Documentation/devicetree/bindings/ata/ahci-platform.txt +15 -3
index 1ac807f..f036e786 100644
@@ -4,7 +4,9 @@ SATA nodes are defined to describe on-chip Serial ATA controllers.
 Each SATA controller should have its own node.
 
 Required properties:
-- compatible        : compatible list, contains "snps,spear-ahci"
+- compatible        : compatible list, one of "snps,spear-ahci",
+                      "snps,exynos5440-ahci", "ibm,476gtr-ahci", or
+                      "allwinner,sun4i-a10-ahci"
 - interrupts        : <interrupt mapping for SATA IRQ>
 - reg               : <registers mapping>
 
@@ -13,10 +15,20 @@ Optional properties:
 - clocks            : a list of phandle + clock specifier pairs
 - target-supply     : regulator for SATA target power
 
-Example:
+allwinner,sun4i-a10-ahci required properties:
+- clocks            : index 0 must point to the sata_ref clk, 1 to the ahb clk
+
+Examples:
         sata at ffe08000 {
 		compatible = "snps,spear-ahci";
 		reg = <0xffe08000 0x1000>;
 		interrupts = <115>;
-
         };
+
+	sata: ahci at 01c18000 {
+		compatible = "allwinner,sun4i-a10-ahci";
+		reg = <0x01c18000 0x1000>;
+		interrupts = <56>;
+		clocks = <&pll6 0>, <&ahb_gates 25>;
+		target-supply = <&reg_ahci_5v>;
+	};
drivers/ata/Kconfig +9 -0
index 4e73772..cc67cc0 100644
@@ -106,6 +106,15 @@ config AHCI_IMX
 
 	  If unsure, say N.
 
+config AHCI_SUNXI
+	tristate "Allwinner sunxi AHCI SATA support"
+	depends on ARCH_SUNXI && SATA_AHCI_PLATFORM
+	help
+	  This option enables support for the Allwinner sunxi SoC's
+	  onboard AHCI SATA.
+
+	  If unsure, say N.
+
 config SATA_FSL
 	tristate "Freescale 3.0Gbps SATA support"
 	depends on FSL_SOC
drivers/ata/Makefile +1 -0
index 46518c6..246050b 100644
@@ -11,6 +11,7 @@ obj-$(CONFIG_SATA_SIL24)	+= sata_sil24.o
 obj-$(CONFIG_SATA_DWC)		+= sata_dwc_460ex.o
 obj-$(CONFIG_SATA_HIGHBANK)	+= sata_highbank.o libahci.o
 obj-$(CONFIG_AHCI_IMX)		+= ahci_imx.o
+obj-$(CONFIG_AHCI_SUNXI)	+= ahci_sunxi.o
 
 # SFF w/ custom DMA
 obj-$(CONFIG_PDC_ADMA)		+= pdc_adma.o
drivers/ata/ahci_sunxi.c new file +242 -0

242 lines not on this page · raw message

Signature · 1 line
1.8.5.3
#10 lore raw

RFC PATCH v4 10/10 ahci_imx: Port to library-ised ahci_platform

In reply to Hans de Goede

This avoids the ugliness of creating a nested platform device from probe.

Note untested, I've ordered a wandboard to be able to test these changes.

---
 .../devicetree/bindings/ata/ahci-platform.txt      |   8 +-
 drivers/ata/ahci_imx.c                             | 199 ++++++++-------------
 2 files changed, 80 insertions(+), 127 deletions(-)
Documentation/devicetree/bindings/ata/ahci-platform.txt +6 -2
index f036e786..ee3a127 100644
@@ -5,8 +5,8 @@ Each SATA controller should have its own node.
 
 Required properties:
 - compatible        : compatible list, one of "snps,spear-ahci",
-                      "snps,exynos5440-ahci", "ibm,476gtr-ahci", or
-                      "allwinner,sun4i-a10-ahci"
+                      "snps,exynos5440-ahci", "ibm,476gtr-ahci",
+                      "allwinner,sun4i-a10-ahci" or "fsl,imx6q-ahci"
 - interrupts        : <interrupt mapping for SATA IRQ>
 - reg               : <registers mapping>
 
@@ -18,6 +18,10 @@ Optional properties:
 allwinner,sun4i-a10-ahci required properties:
 - clocks            : index 0 must point to the sata_ref clk, 1 to the ahb clk
 
+fsl,imx6q-ahci required properties:
+- clocks            : index 0 must point to the sataf clk, 1 to the sata_ref
+		      clk and 2 to the ahb clk
+
 Examples:
         sata at ffe08000 {
 		compatible = "snps,spear-ahci";
drivers/ata/ahci_imx.c +74 -125

297 lines not on this page · raw message

Signature · 1 line
1.8.5.3
maintainer
#11 lore raw

RFC PATCH v4 10/10 ahci_imx: Port to library-ised ahci_platform

Hi Hans,

Quoted 3 lines · Hans de Goede

This avoids the ugliness of creating a nested platform device from probe.

Note untested, I've ordered a wandboard to be able to test these changes.

Looks much better now, thanks. I could test this patch aswell, no need to buy new hardware for this.

Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#12 lore raw

RFC PATCH v4 10/10 ahci_imx: Port to library-ised ahci_platform

Hi,

Quoted 9 lines · Sascha Hauer

Hi Hans,

Quoted 3 lines · Hans de Goede

This avoids the ugliness of creating a nested platform device from probe.

Note untested, I've ordered a wandboard to be able to test these changes.

Looks much better now, thanks. I could test this patch aswell, no need to buy new hardware for this.

Thanks for the offer, but the wandboard arrived yesterday. Having a bit more variety in the arm hardware I've to test with is good to have anyways.

Regards,

Hans

A message that is not in the archive (sent off-list or not yet received): 1390236303-22538-1-git-send-email-hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org

#14 lore raw

hi Hans

First wanted to thank his work with sunxi ... as they say here in Brazil you're the guy !

I noticed the following after your upgrade .. 01/20/2014 my ATA does not look rose more !
# # # # Here before UP ! # # # # #

Image Name : Linux - 3.13.0 - rc7

[ 1.150317 ] 8021Q : 802.1Q VLAN Support v1.8
[ 1.154585 ] Key type dns_resolver registered
[ 1.159130 ] Registering SWP / SWPB emulation handler
[ 1.165146 ] ahci - 5v : 5000 mV
[ 1.168509 ] usb1 - VBUS : 5000 mV
[ 1.172082 ] usb2 - VBUS : 5000 mV
[ 1.200799 ] ahci sunxi - 1c18000.ahci : controller can not do PMP , turning off CAP_PMP
[ 1.208303 ] sunxi 1c18000.ahci - ahci : forcing PORTS_IMPL to 0x1 [ 1.214179 ] sunxi 1c18000.ahci - ahci : AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl sunxi mode
[ 1.222903 ] sunxi 1c18000.ahci - ahci : flags : NCQ SNTF pm led clo pio slum part ccc only
[ 1.231594 ] scsi0 : sunxi_ahci
[ 1.234955 ] ATA1 : SATA max UDMA/133 irq 88
[ 1.239639 ] ehci - sunxi 1c14000.ehci0 : EHCI Host Controller [ 1.245171 ] ehci - sunxi 1c14000.ehci0 : new USB bus registered , assigned bus number 2
[ 1.252978 ] ehci - sunxi 1c14000.ehci0 : irq 71 , io mem 0x01c14000 [ 1.269124 ] ehci - sunxi 1c14000.ehci0 : USB 2.0 started , EHCI 1:00 [ 1.275924 ] hub 2-0:1.0 : USB hub found
[ 1.279773 ] hub 2-0:1.0 : 1 port detected
[ 1.284455 ] ehci - sunxi 1c1c000.ehci1 : EHCI Host Controller [ 1.290026 ] ehci - sunxi 1c1c000.ehci1 : new USB bus registered , assigned bus number 3
[ 1.297789 ] ehci - sunxi 1c1c000.ehci1 : irq 72 , io mem 0x01c1c000 [ 1.319118 ] ehci - sunxi 1c1c000.ehci1 : USB 2.0 started , EHCI 1:00 [ 1.325805 ] hub 3-0:1.0 : USB hub found
[ 1.329639 ] hub 3-0:1.0 : 1 port detected
[ 1.333894 ] rtc - sunxi 1c20d00.rtc : setting system clock to 1970-01-01 00:00:08 UTC ( 8 )
[ 1.584180 ] mmc0 : new high speed SDHC card at address E624
[ 1.590049 ] isa bounce pool size: 16 pages
[ 1.594297 ] mmcblk0 : mmc0 : E624 SU08G 7:40 GiB
[ 1.600605 ] mmcblk0 : p1
[ 4.889135 ] ATA1 : SATA link up 3.0 Gbps ( sstatus 123 SControl 300 ) [ 4.904967 ] ata1.00 : ATA - 8 : SAMSUNG HM320II , 2AC101C4 , max UDMA/133 [ 4.911260 ] ata1.00 : 625142448 sectors , multi 0 : LBA48 NCQ (depth 31/32 )
[ 4.927633 ] ata1.00 : configured for UDMA/133
[ 4.932311 ] scsi 0:0:0:0 : Direct -Access ATA SAMSUNG HM320II 2AC1 PQ : 0 ANSI : 5
[ 4.941156 ] sd 0:0:0:0 : [ sda ] 625142448 512 - byte logical blocks : ( 320 GB/298 GiB )
[ 4.948875 ] sd 0:0:0:0 : [ sda ] Write Protect is off
[ 4.953822 ] sd 0:0:0:0 : [ sda ] Write cache : enabled , read cache :
enabled , does not support DPO or FUA
[ 4.975349 ] sda : sda1
[ 4.978721 ] sd 0:0:0:0 : [ sda ] Attached SCSI disk
[ 5.000798 ] EXT4 - fs ( mmcblk0p1 ) : mounted filesystem with ordered data mode . Opts : ( null)
[ 5.008962 ] VFS : Mounted root ( ext4 filesystem ) readonly on device 179:1 .
[ 5.016841 ] devtmpfs : mounted
[ 5.020432 ] Freeing unused kernel memory: 528k ( c0922000 - c09a6000 ) INIT : version 2.88 booting

# # # # NOW AFTER UP # # # # # # # # # # #

Even . Config
git pull

[ 1.183099 ] ip6_tables : ( C ) 2000-2006 Netfilter Core Team
[ 1.188522 ] sit : IPv6 over IPv4 tunneling driver
[ 1.193777 ] NET : Registered protocol family 17
[ 1.198369 ] Bridge firewalling registered
[ 1.202495 ] l2tp_core : L2TP core driver , V2.0
[ 1.206861 ] 8021Q : 802.1Q VLAN Support v1.8
[ 1.210139 ] ATA1 : SATA link down ( sstatus 0 SControl 300 )
[ 1.216491 ] lib80211 : common routines for IEEE802.11 drivers [ 1.222231 ] Key type dns_resolver registered
[ 1.226770 ] Registering SWP / SWPB emulation handler
[ 1.232696 ] ahci - 5v : 5000 mV
[ 1.236057 ] usb1 - VBUS : 5000 mV
[ 1.239504 ] usb2 - VBUS : 5000 mV
[ 1.243904 ] rtc - sunxi 1c20d00.rtc : setting system clock to 1970-01-01 00:00:08 UTC ( 8 )
[ 1.252615 ] Waiting for device / dev/mmcblk0p1 root ...
[ 1.599045 ] mmc0 : new high speed SDHC card at address E624
[ 1.604917 ] isa bounce pool size: 16 pages
[ 1.609178 ] mmcblk0 : mmc0 : E624 SU08G 7:40 GiB
[ 1.615470 ] mmcblk0 : p1
[ 1.692426 ] EXT4 - fs ( mmcblk0p1 ) : INFO : recovery required on readonly filesystem
[ 1.699757 ] EXT4 - fs ( mmcblk0p1 ) : write access will be enabled During recovery
[ 2.423617 ] random: nonblocking pool is initialized
[ 3.274181 ] EXT4 - fs ( mmcblk0p1 ) : recovery complete
[ 3.286043 ] EXT4 - fs ( mmcblk0p1 ) : mounted filesystem with ordered data mode . Opts : ( null)
[ 3.294229 ] VFS : Mounted root ( ext4 filesystem ) readonly on device 179:1 .
[ 3.302179 ] devtmpfs : mounted
[ 3.305714 ] Freeing unused kernel memory: 524K ( c0959000 - c09dc000 ) INIT : version 2.88 booting

What could it be? says Down !
Copy your old uImage UP
new uImage DOWN

Signature · 3 lines
You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/[email protected]
For more options, visit https://groups.google.com/groups/opt_out.
#15 lore raw

Hi,

Quoted 92 lines · Ezaul Zillmer

hi Hans

First wanted to thank his work with sunxi ... as they say here in Brazil you're the guy !

I noticed the following after your upgrade .. 01/20/2014 my ATA does not look rose more ! # # # # Here before UP ! # # # # #

Image Name : Linux - 3.13.0 - rc7

[ 1.150317 ] 8021Q : 802.1Q VLAN Support v1.8
[ 1.154585 ] Key type dns_resolver registered
[ 1.159130 ] Registering SWP / SWPB emulation handler
[ 1.165146 ] ahci - 5v : 5000 mV
[ 1.168509 ] usb1 - VBUS : 5000 mV
[ 1.172082 ] usb2 - VBUS : 5000 mV
[ 1.200799 ] ahci sunxi - 1c18000.ahci : controller can not do PMP , turning off CAP_PMP
[ 1.208303 ] sunxi 1c18000.ahci - ahci : forcing PORTS_IMPL to 0x1
[ 1.214179 ] sunxi 1c18000.ahci - ahci : AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl sunxi mode [ 1.222903 ] sunxi 1c18000.ahci - ahci : flags : NCQ SNTF pm led clo pio slum part ccc only [ 1.231594 ] scsi0 : sunxi_ahci
[ 1.234955 ] ATA1 : SATA max UDMA/133 irq 88
[ 1.239639 ] ehci - sunxi 1c14000.ehci0 : EHCI Host Controller
[ 1.245171 ] ehci - sunxi 1c14000.ehci0 : new USB bus registered , assigned bus number 2
[ 1.252978 ] ehci - sunxi 1c14000.ehci0 : irq 71 , io mem 0x01c14000
[ 1.269124 ] ehci - sunxi 1c14000.ehci0 : USB 2.0 started , EHCI 1:00
[ 1.275924 ] hub 2-0:1.0 : USB hub found
[ 1.279773 ] hub 2-0:1.0 : 1 port detected
[ 1.284455 ] ehci - sunxi 1c1c000.ehci1 : EHCI Host Controller
[ 1.290026 ] ehci - sunxi 1c1c000.ehci1 : new USB bus registered , assigned bus number 3
[ 1.297789 ] ehci - sunxi 1c1c000.ehci1 : irq 72 , io mem 0x01c1c000
[ 1.319118 ] ehci - sunxi 1c1c000.ehci1 : USB 2.0 started , EHCI 1:00
[ 1.325805 ] hub 3-0:1.0 : USB hub found
[ 1.329639 ] hub 3-0:1.0 : 1 port detected
[ 1.333894 ] rtc - sunxi 1c20d00.rtc : setting system clock to 1970-01-01 00:00:08 UTC ( 8 ) [ 1.584180 ] mmc0 : new high speed SDHC card at address E624
[ 1.590049 ] isa bounce pool size: 16 pages
[ 1.594297 ] mmcblk0 : mmc0 : E624 SU08G 7:40 GiB
[ 1.600605 ] mmcblk0 : p1
[ 4.889135 ] ATA1 : SATA link up 3.0 Gbps ( sstatus 123 SControl 300 )
[ 4.904967 ] ata1.00 : ATA - 8 : SAMSUNG HM320II , 2AC101C4 , max UDMA/133
[ 4.911260 ] ata1.00 : 625142448 sectors , multi 0 : LBA48 NCQ (depth 31/32 )
[ 4.927633 ] ata1.00 : configured for UDMA/133
[ 4.932311 ] scsi 0:0:0:0 : Direct -Access ATA SAMSUNG HM320II 2AC1 PQ : 0 ANSI : 5
[ 4.941156 ] sd 0:0:0:0 : [ sda ] 625142448 512 - byte logical blocks : ( 320 GB/298 GiB ) [ 4.948875 ] sd 0:0:0:0 : [ sda ] Write Protect is off
[ 4.953822 ] sd 0:0:0:0 : [ sda ] Write cache : enabled , read cache : enabled , does not support DPO or FUA [ 4.975349 ] sda : sda1
[ 4.978721 ] sd 0:0:0:0 : [ sda ] Attached SCSI disk
[ 5.000798 ] EXT4 - fs ( mmcblk0p1 ) : mounted filesystem with ordered data mode . Opts : ( null) [ 5.008962 ] VFS : Mounted root ( ext4 filesystem ) readonly on device 179:1 .
[ 5.016841 ] devtmpfs : mounted
[ 5.020432 ] Freeing unused kernel memory: 528k ( c0922000 - c09a6000 )
INIT : version 2.88 booting

# # # # NOW AFTER UP # # # # # # # # # # #

Even . Config
git pull

[ 1.183099 ] ip6_tables : ( C ) 2000-2006 Netfilter Core Team
[ 1.188522 ] sit : IPv6 over IPv4 tunneling driver
[ 1.193777 ] NET : Registered protocol family 17
[ 1.198369 ] Bridge firewalling registered
[ 1.202495 ] l2tp_core : L2TP core driver , V2.0
[ 1.206861 ] 8021Q : 802.1Q VLAN Support v1.8
[ 1.210139 ] ATA1 : SATA link down ( sstatus 0 SControl 300 )
[ 1.216491 ] lib80211 : common routines for IEEE802.11 drivers
[ 1.222231 ] Key type dns_resolver registered
[ 1.226770 ] Registering SWP / SWPB emulation handler
[ 1.232696 ] ahci - 5v : 5000 mV
[ 1.236057 ] usb1 - VBUS : 5000 mV
[ 1.239504 ] usb2 - VBUS : 5000 mV
[ 1.243904 ] rtc - sunxi 1c20d00.rtc : setting system clock to 1970-01-01 00:00:08 UTC ( 8 ) [ 1.252615 ] Waiting for device / dev/mmcblk0p1 root ...
[ 1.599045 ] mmc0 : new high speed SDHC card at address E624
[ 1.604917 ] isa bounce pool size: 16 pages
[ 1.609178 ] mmcblk0 : mmc0 : E624 SU08G 7:40 GiB
[ 1.615470 ] mmcblk0 : p1
[ 1.692426 ] EXT4 - fs ( mmcblk0p1 ) : INFO : recovery required on readonly filesystem [ 1.699757 ] EXT4 - fs ( mmcblk0p1 ) : write access will be enabled During recovery [ 2.423617 ] random: nonblocking pool is initialized
[ 3.274181 ] EXT4 - fs ( mmcblk0p1 ) : recovery complete
[ 3.286043 ] EXT4 - fs ( mmcblk0p1 ) : mounted filesystem with ordered data mode . Opts : ( null) [ 3.294229 ] VFS : Mounted root ( ext4 filesystem ) readonly on device 179:1 .
[ 3.302179 ] devtmpfs : mounted
[ 3.305714 ] Freeing unused kernel memory: 524K ( c0959000 - c09dc000 )
INIT : version 2.88 booting

Quoted 3 lines

What could it be? says Down !
Copy your old uImage UP
new uImage DOWN

Which kernel tree are you using ? Did you not only update the uImage but also the dtb? I'm not seeing any ahci related messages at all in the new dmesg output, so it seems that either your dtb does not have an ahci node (or not with the proper compatible= string), or sunxi-ahci is not build into your kernel.

Regards,

Hans

A message that is not in the archive (sent off-list or not yet received): [email protected]

#17 lore raw

LINUX-SUNXI
[core]
repositoryformatversion = 0
filemode = true
bare = false
logallrefupdates = true
[remote "origin"]
fetch = +refs/heads/*:refs/remotes/origin/* url = https://github.com/jwrdegoede/linux-sunxi.git
[branch "sunxi-devel"]
remote = origin
merge = refs/heads/sunxi-devel

U-BOOT
[core]
repositoryformatversion = 0
filemode = true
bare = false
logallrefupdates = true
[remote "origin"]
fetch = +refs/heads/*:refs/remotes/origin/* url = https://github.com/jwrdegoede/u-boot-sunxi.git
[branch "sunxi-next"]
remote = origin
merge = refs/heads/sunxi-next

CONFIG_AHCI_SUNXI=y

Just took a git pull recompiled the kernel, modules and dtb sent MicroSD pro
and not simply booted the Sata UP more ... al had a copy before the git pull recompiled sent to regular MicroSD he recognizes the HD and do nothing except change the dtb and former Kernek! what could it be?

Hug!

## Booting kernel from Legacy Image at 46000000 ...

   Image Name:   Linux-3.13.0-rc7-52420-g41aabcc
   Created:      2014-01-21  11:58:18 UTC
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    5404880 Bytes = 5.2 MiB

Load Address: 40008000
Entry Point: 40008000
Verifying Checksum ... OK
## Flattened Device Tree blob at 49000000
Booting using the fdt blob at 0x49000000 Loading Kernel Image ... OK
Using Device Tree in place at 49000000, end 49007097

Em terça-feira, 21 de janeiro de 2014 05h58min04s UTC-2, Hans de Goede escreveu:

Quoted 131 lines

Hi,

Quoted 3 lines · Ezaul Zillmer

hi Hans

First wanted to thank his work with sunxi ... as they say here in Brazil

you're the guy !

Quoted 2 lines

I noticed the following after your upgrade .. 01/20/2014 my ATA does not

look rose more !

Quoted 11 lines

# # # # Here before UP ! # # # # #

Image Name : Linux - 3.13.0 - rc7

[ 1.150317 ] 8021Q : 802.1Q VLAN Support v1.8
[ 1.154585 ] Key type dns_resolver registered
[ 1.159130 ] Registering SWP / SWPB emulation handler
[ 1.165146 ] ahci - 5v : 5000 mV
[ 1.168509 ] usb1 - VBUS : 5000 mV
[ 1.172082 ] usb2 - VBUS : 5000 mV
[ 1.200799 ] ahci sunxi - 1c18000.ahci : controller can not do PMP ,

turning off CAP_PMP

Quoted 2 lines

[ 1.208303 ] sunxi 1c18000.ahci - ahci : forcing PORTS_IMPL to 0x1 [ 1.214179 ] sunxi 1c18000.ahci - ahci : AHCI 0001.0100 32 slots 1 ports

3 Gbps 0x1 impl sunxi mode

Quoted 1 line

[ 1.222903 ] sunxi 1c18000.ahci - ahci : flags : NCQ SNTF pm led clo pio

slum part ccc only

Quoted 4 lines

[ 1.231594 ] scsi0 : sunxi_ahci
[ 1.234955 ] ATA1 : SATA max UDMA/133 irq 88
[ 1.239639 ] ehci - sunxi 1c14000.ehci0 : EHCI Host Controller [ 1.245171 ] ehci - sunxi 1c14000.ehci0 : new USB bus registered ,

assigned bus number 2

Quoted 6 lines

[ 1.252978 ] ehci - sunxi 1c14000.ehci0 : irq 71 , io mem 0x01c14000 [ 1.269124 ] ehci - sunxi 1c14000.ehci0 : USB 2.0 started , EHCI 1:00 [ 1.275924 ] hub 2-0:1.0 : USB hub found
[ 1.279773 ] hub 2-0:1.0 : 1 port detected
[ 1.284455 ] ehci - sunxi 1c1c000.ehci1 : EHCI Host Controller [ 1.290026 ] ehci - sunxi 1c1c000.ehci1 : new USB bus registered ,

assigned bus number 3

Quoted 5 lines

[ 1.297789 ] ehci - sunxi 1c1c000.ehci1 : irq 72 , io mem 0x01c1c000 [ 1.319118 ] ehci - sunxi 1c1c000.ehci1 : USB 2.0 started , EHCI 1:00 [ 1.325805 ] hub 3-0:1.0 : USB hub found
[ 1.329639 ] hub 3-0:1.0 : 1 port detected
[ 1.333894 ] rtc - sunxi 1c20d00.rtc : setting system clock to

1970-01-01 00:00:08 UTC ( 8 ) 
Quoted 6 lines

[ 1.584180 ] mmc0 : new high speed SDHC card at address E624 [ 1.590049 ] isa bounce pool size: 16 pages
[ 1.594297 ] mmcblk0 : mmc0 : E624 SU08G 7:40 GiB
[ 1.600605 ] mmcblk0 : p1
[ 4.889135 ] ATA1 : SATA link up 3.0 Gbps ( sstatus 123 SControl 300 ) [ 4.904967 ] ata1.00 : ATA - 8 : SAMSUNG HM320II , 2AC101C4 , max

UDMA/133

Quoted 1 line

[ 4.911260 ] ata1.00 : 625142448 sectors , multi 0 : LBA48 NCQ (depth

31/32 )

Quoted 2 lines

[ 4.927633 ] ata1.00 : configured for UDMA/133
[ 4.932311 ] scsi 0:0:0:0 : Direct -Access ATA SAMSUNG HM320II 2AC1 PQ :

0 ANSI : 5

Quoted 1 line

[ 4.941156 ] sd 0:0:0:0 : [ sda ] 625142448 512 - byte logical blocks :

( 320 GB/298 GiB )

Quoted 2 lines

[ 4.948875 ] sd 0:0:0:0 : [ sda ] Write Protect is off
[ 4.953822 ] sd 0:0:0:0 : [ sda ] Write cache : enabled , read cache :

enabled , does not support DPO or FUA

Quoted 3 lines

[ 4.975349 ] sda : sda1
[ 4.978721 ] sd 0:0:0:0 : [ sda ] Attached SCSI disk
[ 5.000798 ] EXT4 - fs ( mmcblk0p1 ) : mounted filesystem with ordered

data mode . Opts : ( null)

Quoted 1 line

[ 5.008962 ] VFS : Mounted root ( ext4 filesystem ) readonly on device

179:1 .

Quoted 12 lines

[ 5.016841 ] devtmpfs : mounted
[ 5.020432 ] Freeing unused kernel memory: 528k ( c0922000 - c09a6000 ) INIT : version 2.88 booting

# # # # NOW AFTER UP # # # # # # # # # # #

Even . Config
git pull

Quoted 14 lines

[ 1.183099 ] ip6_tables : ( C ) 2000-2006 Netfilter Core Team [ 1.188522 ] sit : IPv6 over IPv4 tunneling driver
[ 1.193777 ] NET : Registered protocol family 17
[ 1.198369 ] Bridge firewalling registered
[ 1.202495 ] l2tp_core : L2TP core driver , V2.0
[ 1.206861 ] 8021Q : 802.1Q VLAN Support v1.8
[ 1.210139 ] ATA1 : SATA link down ( sstatus 0 SControl 300 ) [ 1.216491 ] lib80211 : common routines for IEEE802.11 drivers [ 1.222231 ] Key type dns_resolver registered
[ 1.226770 ] Registering SWP / SWPB emulation handler [ 1.232696 ] ahci - 5v : 5000 mV
[ 1.236057 ] usb1 - VBUS : 5000 mV
[ 1.239504 ] usb2 - VBUS : 5000 mV
[ 1.243904 ] rtc - sunxi 1c20d00.rtc : setting system clock to

1970-01-01 00:00:08 UTC ( 8 ) 
Quoted 6 lines

[ 1.252615 ] Waiting for device / dev/mmcblk0p1 root ... [ 1.599045 ] mmc0 : new high speed SDHC card at address E624 [ 1.604917 ] isa bounce pool size: 16 pages
[ 1.609178 ] mmcblk0 : mmc0 : E624 SU08G 7:40 GiB
[ 1.615470 ] mmcblk0 : p1
[ 1.692426 ] EXT4 - fs ( mmcblk0p1 ) : INFO : recovery required on

readonly filesystem

Quoted 1 line

[ 1.699757 ] EXT4 - fs ( mmcblk0p1 ) : write access will be enabled

During recovery

Quoted 3 lines

[ 2.423617 ] random: nonblocking pool is initialized
[ 3.274181 ] EXT4 - fs ( mmcblk0p1 ) : recovery complete
[ 3.286043 ] EXT4 - fs ( mmcblk0p1 ) : mounted filesystem with ordered

data mode . Opts : ( null)

Quoted 1 line

[ 3.294229 ] VFS : Mounted root ( ext4 filesystem ) readonly on device

179:1 .

Quoted 8 lines

[ 3.302179 ] devtmpfs : mounted
[ 3.305714 ] Freeing unused kernel memory: 524K ( c0959000 - c09dc000 ) INIT : version 2.88 booting

What could it be? says Down !
Copy your old uImage UP
new uImage DOWN

Which kernel tree are you using ? Did you not only update the uImage but also the dtb? I'm not seeing
any ahci related messages at all in the new dmesg output, so it seems that either your dtb does not have
an ahci node (or not with the proper compatible= string), or sunxi-ahci is not build into your kernel.

Regards,

Hans

Signature · 3 lines
You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/[email protected]
For more options, visit https://groups.google.com/groups/opt_out.
#18 lore raw

v4 cover ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

In reply to Hans de Goede
Quoted 5 lines · Hans de Goede

Hi All,

Here is v4 of my patchset for adding ahci-sunxi support. It has grown quite a bit since I've been going for a more generic approach this time and I've also cleaned up the ahci-imx driver to use the same generic approach.

I don't know if you missed it or just don't intend to refactor all AHCI drivers, but the highbank driver could benefit from this as well.

Rob

Quoted 42 lines

History:

v1, by Olliver Schinagl:
This was using the approach of having a platform device which probe method creates a new child platform device which gets driven by ahci_platform.c, as done by ahci_imx.c .

v2, by Hans de Goede:
Stand-alone platform driver based on Olliver's work

v3, by Hans de Goede:
patch-series, with 4 different parts
a) Make ahci_platform.c more generic, handle more then 1 clk, target pwr regulator
b) New ahci-sunxi code only populating ahci_platform_data, passed to ahci_platform.c to of_device_id matching.
c) Refactor ahci-imx code to work the same as the new ahci-sunxi code, this is the reason why v3 is an RFC, I'm waiting for the wandboard I ordered to arrive so that I can actually test this.
d) dts bindings for the sunxi ahci parts

v4, by Hans de Goede:
patch-series, with 5 different parts:
a) Make ahci_platform.c more generic, handle more then 1 clk, target pwr regulator
b) Turn parts of ahci_platform.c into a library for use by other drivers
c) New ahci-sunxi driver using the ahci_platform.c library functionality
d) Refactor ahci-imx code to work the same as the new ahci-sunxi code
e) dts bindings for the sunxi ahci parts

Parts a-d are intended for merging through the ata tree, the dts bindings will be merged to Maxime Ripard's sunxi-dts tree.

Regards,

Hans

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

#19 lore raw

v4 cover ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

Hi,

Quoted 9 lines · Rob Herring
Quoted 5 lines · Hans de Goede

Hi All,

Here is v4 of my patchset for adding ahci-sunxi support. It has grown quite a bit since I've been going for a more generic approach this time and I've also cleaned up the ahci-imx driver to use the same generic approach.

I don't know if you missed it or just don't intend to refactor all AHCI drivers, but the highbank driver could benefit from this as well.

I don't intend to refactor all of them, esp. not the ones for which I don't have hardware to test.

As they say: patches welcome :)

Regards,

Hans