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ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

PATCH Superseded Hans de Goede 6 participants 31 messages Jan 22, 2014 – Feb 4, 2014

Subsystems (9)

v5 of 7 Superseded Latest is v7 →

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#0 lore raw

v5 cover ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

Hi all,

Here is v4 of my patchset for adding ahci-sunxi support. It has grown quite a bit since I've been going for a more generic approach this time and I've also cleaned up the ahci-imx driver to use the same generic approach.

History:

v1, by Olliver Schinagl:
This was using the approach of having a platform device which probe method creates a new child platform device which gets driven by ahci_platform.c, as done by ahci_imx.c .

v2, by Hans de Goede:
Stand-alone platform driver based on Olliver's work

v3, by Hans de Goede:
patch-series, with 4 different parts
a) Make ahci_platform.c more generic, handle more then 1 clk, target pwr regulator
b) New ahci-sunxi code only populating ahci_platform_data, passed to ahci_platform.c to of_device_id matching.
c) Refactor ahci-imx code to work the same as the new ahci-sunxi code, this is the reason why v3 is an RFC, I'm waiting for the wandboard I ordered to arrive so that I can actually test this.
d) dts bindings for the sunxi ahci parts

v4, by Hans de Goede:
patch-series, with 5 different parts:
a) Make ahci_platform.c more generic, handle more then 1 clk, target pwr regulator
b) Turn parts of ahci_platform.c into a library for use by other drivers
c) New ahci-sunxi driver using the ahci_platform.c library functionality
d) Refactor ahci-imx code to work the same as the new ahci-sunxi code
e) dts bindings for the sunxi ahci parts

v5:
v4 + the following changes:
1) fsl,imx6q driver is now tested
2) fixed suspend / resume on fsl,imx6q
3) Modifed devicetree node naming to match dt spec
4) Reworked the busy waiting code in the sunxi-phy handling as suggested by Russell King

Parts a-d are intended for merging through the ata tree, the dts bindings will be merged to Maxime Ripard's sunxi-dts tree.

Regards,

Hans

#1 lore raw

PATCH v5 1/14 libahci: Allow drivers to override start_engine

Allwinner A10 and A20 ARM SoCs have an AHCI sata controller which needs a special register to be poked before starting the DMA engine.

This register gets reset on an ahci_stop_engine call, so there is no other place then ahci_start_engine where this poking can be done.

This commit allows drivers to override ahci_start_engine behavior for use by the Allwinner AHCI driver (and potentially other drivers in the future).

---
 drivers/ata/ahci.c          |  6 ++++--
 drivers/ata/ahci.h          |  3 ++-
 drivers/ata/libahci.c       | 27 ++++++++++++++++++---------
 drivers/ata/sata_highbank.c |  3 ++-
 4 files changed, 26 insertions(+), 13 deletions(-)
drivers/ata/ahci.c +4 -2
index c0ed4f27..bb4c903 100644
@@ -559,6 +559,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
 				 unsigned long deadline)
 {
 	struct ata_port *ap = link->ap;
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	bool online;
 	int rc;
 
@@ -569,7 +570,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
 	rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
 				 deadline, &online, NULL);
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 
 	DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
 
@@ -584,6 +585,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
 {
 	struct ata_port *ap = link->ap;
 	struct ahci_port_priv *pp = ap->private_data;
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
 	struct ata_taskfile tf;
 	bool online;
@@ -599,7 +601,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
 	rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
 				 deadline, &online, NULL);
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 
 	/* The pseudo configuration device on SIMG4726 attached to
 	 * ASUS P5W-DH Deluxe doesn't send signature FIS after
drivers/ata/ahci.h +2 -1
index 2289efd..2c04211 100644
@@ -323,6 +323,8 @@ struct ahci_host_priv {
 	u32			em_msg_type;	/* EM message type */
 	struct clk		*clk;		/* Only for platforms supporting clk */
 	void			*plat_data;	/* Other platform data */
+	/* Optional ahci_start_engine override */
+	void			(*start_engine)(struct ata_port *ap);
 };
 
 extern int ahci_ignore_sss;
@@ -357,7 +359,6 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class,
 		      int (*check_ready)(struct ata_link *link));
 
 int ahci_stop_engine(struct ata_port *ap);
-void ahci_start_engine(struct ata_port *ap);
 int ahci_check_ready(struct ata_link *link);
 int ahci_kick_engine(struct ata_port *ap);
 int ahci_port_resume(struct ata_port *ap);
drivers/ata/libahci.c +18 -9
index c482f8c..96d128c 100644
@@ -69,6 +69,7 @@ static ssize_t ahci_transmit_led_message(struct ata_port *ap, u32 state,
 
 static int ahci_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
 static int ahci_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
+static void ahci_start_engine(struct ata_port *ap);
 static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
 static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc);
 static int ahci_port_start(struct ata_port *ap);
@@ -500,6 +501,9 @@ void ahci_save_initial_config(struct device *dev,
 	hpriv->cap = cap;
 	hpriv->cap2 = cap2;
 	hpriv->port_map = port_map;
+
+	if (!hpriv->start_engine)
+		hpriv->start_engine = ahci_start_engine;
 }
 EXPORT_SYMBOL_GPL(ahci_save_initial_config);
 
@@ -565,7 +569,7 @@ static int ahci_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
 	return -EINVAL;
 }
 
-void ahci_start_engine(struct ata_port *ap)
+static void ahci_start_engine(struct ata_port *ap)
 {
 	void __iomem *port_mmio = ahci_port_base(ap);
 	u32 tmp;
@@ -576,7 +580,6 @@ void ahci_start_engine(struct ata_port *ap)
 	writel(tmp, port_mmio + PORT_CMD);
 	readl(port_mmio + PORT_CMD); /* flush */
 }
-EXPORT_SYMBOL_GPL(ahci_start_engine);
 
 int ahci_stop_engine(struct ata_port *ap)
 {
@@ -766,7 +769,7 @@ static void ahci_start_port(struct ata_port *ap)
 
 	/* enable DMA */
 	if (!(hpriv->flags & AHCI_HFLAG_DELAY_ENGINE))
-		ahci_start_engine(ap);
+		hpriv->start_engine(ap);
 
 	/* turn on LEDs */
 	if (ap->flags & ATA_FLAG_EM) {
@@ -1234,7 +1237,7 @@ int ahci_kick_engine(struct ata_port *ap)
 
 	/* restart engine */
  out_restart:
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 	return rc;
 }
 EXPORT_SYMBOL_GPL(ahci_kick_engine);
@@ -1426,6 +1429,7 @@ static int ahci_hardreset(struct ata_link *link, unsigned int *class,
 	const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
 	struct ata_port *ap = link->ap;
 	struct ahci_port_priv *pp = ap->private_data;
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
 	struct ata_taskfile tf;
 	bool online;
@@ -1443,7 +1447,7 @@ static int ahci_hardreset(struct ata_link *link, unsigned int *class,
 	rc = sata_link_hardreset(link, timing, deadline, &online,
 				 ahci_check_ready);
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 
 	if (online)
 		*class = ahci_dev_classify(ap);
@@ -2007,10 +2011,12 @@ static void ahci_thaw(struct ata_port *ap)
 
 void ahci_error_handler(struct ata_port *ap)
 {
+	struct ahci_host_priv *hpriv = ap->host->private_data;
+
 	if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
 		/* restart engine */
 		ahci_stop_engine(ap);
-		ahci_start_engine(ap);
+		hpriv->start_engine(ap);
 	}
 
 	sata_pmp_error_handler(ap);
@@ -2031,6 +2037,7 @@ static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
 
 static void ahci_set_aggressive_devslp(struct ata_port *ap, bool sleep)
 {
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	void __iomem *port_mmio = ahci_port_base(ap);
 	struct ata_device *dev = ap->link.device;
 	u32 devslp, dm, dito, mdat, deto;
@@ -2094,7 +2101,7 @@ static void ahci_set_aggressive_devslp(struct ata_port *ap, bool sleep)
 		   PORT_DEVSLP_ADSE);
 	writel(devslp, port_mmio + PORT_DEVSLP);
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 
 	/* enable device sleep feature for the drive */
 	err_mask = ata_dev_set_feature(dev,
@@ -2106,6 +2113,7 @@ static void ahci_set_aggressive_devslp(struct ata_port *ap, bool sleep)
 
 static void ahci_enable_fbs(struct ata_port *ap)
 {
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	struct ahci_port_priv *pp = ap->private_data;
 	void __iomem *port_mmio = ahci_port_base(ap);
 	u32 fbs;
@@ -2134,11 +2142,12 @@ static void ahci_enable_fbs(struct ata_port *ap)
 	} else
 		dev_err(ap->host->dev, "Failed to enable FBS\n");
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 }
 
 static void ahci_disable_fbs(struct ata_port *ap)
 {
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	struct ahci_port_priv *pp = ap->private_data;
 	void __iomem *port_mmio = ahci_port_base(ap);
 	u32 fbs;
@@ -2166,7 +2175,7 @@ static void ahci_disable_fbs(struct ata_port *ap)
 		pp->fbs_enabled = false;
 	}
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 }
 
 static void ahci_pmp_attach(struct ata_port *ap)
drivers/ata/sata_highbank.c +2 -1
index ea3b3dc..30aa9c1 100644
@@ -404,6 +404,7 @@ static int ahci_highbank_hardreset(struct ata_link *link, unsigned int *class,
 	static const unsigned long timing[] = { 5, 100, 500};
 	struct ata_port *ap = link->ap;
 	struct ahci_port_priv *pp = ap->private_data;
+	struct ahci_host_priv *hpriv = ap->host->private_data;
 	u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
 	struct ata_taskfile tf;
 	bool online;
@@ -432,7 +433,7 @@ static int ahci_highbank_hardreset(struct ata_link *link, unsigned int *class,
 			break;
 	} while (!online && retry--);
 
-	ahci_start_engine(ap);
+	hpriv->start_engine(ap);
 
 	if (online)
 		*class = ahci_dev_classify(ap);
Signature · 1 line
1.8.5.3
#2 lore raw

PATCH v5 2/14 libahci: Move ahci_host_priv declaration to include/linux/ahci.h

In reply to Hans de Goede

With the ahci-platform.c changes later in this patch-set, some arch/arm/mach-foo/*.c sata drivers need access to ahci_host_priv, so move its declaration outside of drivers/ata.

---
 drivers/ata/ahci.h   | 20 +-------------------
 include/linux/ahci.h | 46 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 47 insertions(+), 19 deletions(-)
 create mode 100644 include/linux/ahci.h
drivers/ata/ahci.h +1 -19
index 2c04211..0f80129 100644
@@ -35,7 +35,7 @@
 #ifndef _AHCI_H
 #define _AHCI_H
 
-#include <linux/clk.h>
+#include <linux/ahci.h>
 #include <linux/libata.h>
 
 /* Enclosure Management Control */
@@ -309,24 +309,6 @@ struct ahci_port_priv {
 	char			*irq_desc;	/* desc in /proc/interrupts */
 };
 
-struct ahci_host_priv {
-	void __iomem *		mmio;		/* bus-independent mem map */
-	unsigned int		flags;		/* AHCI_HFLAG_* */
-	u32			cap;		/* cap to use */
-	u32			cap2;		/* cap2 to use */
-	u32			port_map;	/* port map to use */
-	u32			saved_cap;	/* saved initial cap */
-	u32			saved_cap2;	/* saved initial cap2 */
-	u32			saved_port_map;	/* saved initial port_map */
-	u32 			em_loc; /* enclosure management location */
-	u32			em_buf_sz;	/* EM buffer size in byte */
-	u32			em_msg_type;	/* EM message type */
-	struct clk		*clk;		/* Only for platforms supporting clk */
-	void			*plat_data;	/* Other platform data */
-	/* Optional ahci_start_engine override */
-	void			(*start_engine)(struct ata_port *ap);
-};
-
 extern int ahci_ignore_sss;
 
 extern struct device_attribute *ahci_shost_attrs[];
include/linux/ahci.h new file +46 -0

46 lines not on this page · raw message

Signature · 1 line
1.8.5.3
#3 lore raw

PATCH v5 3/14 ahci-platform: Pass ahci_host_priv ptr to ahci_platform_data init method

In reply to Hans de Goede

Some ahci_platform_data->init methods need access to the ahci_host_priv data.

When calling ahci_platform_data->init the ata_host has not been allocated yet, so access to ahci_host_priv through the dev argument is not possible.

---
 arch/arm/mach-davinci/devices-da8xx.c |  5 +++--
 arch/arm/mach-spear/spear1340.c       |  2 +-
 drivers/ata/ahci_imx.c                | 12 ++++++------
 drivers/ata/ahci_platform.c           |  2 +-
 include/linux/ahci_platform.h         |  3 ++-
 5 files changed, 13 insertions(+), 11 deletions(-)
arch/arm/mach-davinci/devices-da8xx.c +3 -2
index 78829c5..28e7c4c 100644
@@ -14,6 +14,7 @@
 #include <linux/platform_device.h>
 #include <linux/dma-contiguous.h>
 #include <linux/serial_8250.h>
+#include <linux/ahci.h>
 #include <linux/ahci_platform.h>
 #include <linux/clk.h>
 #include <linux/reboot.h>
@@ -1061,7 +1062,7 @@ static unsigned long da850_sata_xtal[] = {
 	KHZ_TO_HZ(60000),
 };
 
-static int da850_sata_init(struct device *dev, void __iomem *addr)
+static int da850_sata_init(struct device *dev, struct ahci_host_priv *hpriv)
 {
 	int i, ret;
 	unsigned int val;
@@ -1096,7 +1097,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr)
 		SATA_PHY_TXSWING(3) |
 		SATA_PHY_ENPLL(1);
 
-	__raw_writel(val, addr + SATA_P0PHYCR_REG);
+	__raw_writel(val, hpriv->mmio + SATA_P0PHYCR_REG);
 
 	return 0;
 
arch/arm/mach-spear/spear1340.c +1 -1
index 3fb6834..9e2f3ac 100644
@@ -77,7 +77,7 @@
 			SPEAR1340_MIPHY_PLL_RATIO_TOP(25))
 
 /* SATA device registration */
-static int sata_miphy_init(struct device *dev, void __iomem *addr)
+static int sata_miphy_init(struct device *dev, struct ahci_host_priv *hpriv)
 {
 	writel(SPEAR1340_SATA_CFG_VAL, SPEAR1340_PCIE_SATA_CFG);
 	writel(SPEAR1340_PCIE_SATA_MIPHY_CFG_SATA_25M_CRYSTAL_CLK,
drivers/ata/ahci_imx.c +6 -6
index 3e23e99..49fa0ca 100644
@@ -91,7 +91,7 @@ static const struct ata_port_info ahci_imx_port_info = {
 	.port_ops	= &ahci_imx_ops,
 };
 
-static int imx6q_sata_init(struct device *dev, void __iomem *mmio)
+static int imx6q_sata_init(struct device *dev, struct ahci_host_priv *hpriv)
 {
 	int ret = 0;
 	unsigned int reg_val;
@@ -145,19 +145,19 @@ static int imx6q_sata_init(struct device *dev, void __iomem *mmio)
 	 * Implement the port0.
 	 * Get the ahb clock rate, and configure the TIMER1MS register.
 	 */
-	reg_val = readl(mmio + HOST_CAP);
+	reg_val = readl(hpriv->mmio + HOST_CAP);
 	if (!(reg_val & HOST_CAP_SSS)) {
 		reg_val |= HOST_CAP_SSS;
-		writel(reg_val, mmio + HOST_CAP);
+		writel(reg_val, hpriv->mmio + HOST_CAP);
 	}
-	reg_val = readl(mmio + HOST_PORTS_IMPL);
+	reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL);
 	if (!(reg_val & 0x1)) {
 		reg_val |= 0x1;
-		writel(reg_val, mmio + HOST_PORTS_IMPL);
+		writel(reg_val, hpriv->mmio + HOST_PORTS_IMPL);
 	}
 
 	reg_val = clk_get_rate(imxpriv->ahb_clk) / 1000;
-	writel(reg_val, mmio + HOST_TIMER1MS);
+	writel(reg_val, hpriv->mmio + HOST_TIMER1MS);
 
 	return 0;
 }
drivers/ata/ahci_platform.c +1 -1
index 4b231ba..434ab89 100644
@@ -149,7 +149,7 @@ static int ahci_probe(struct platform_device *pdev)
 	 * returned successfully.
 	 */
 	if (pdata && pdata->init) {
-		rc = pdata->init(dev, hpriv->mmio);
+		rc = pdata->init(dev, hpriv);
 		if (rc)
 			goto disable_unprepare_clk;
 	}
include/linux/ahci_platform.h +2 -1
index 73a2500..737fe38 100644
@@ -19,9 +19,10 @@
 
 struct device;
 struct ata_port_info;
+struct ahci_host_priv;
 
 struct ahci_platform_data {
-	int (*init)(struct device *dev, void __iomem *addr);
+	int (*init)(struct device *dev, struct ahci_host_priv *hpriv);
 	void (*exit)(struct device *dev);
 	int (*suspend)(struct device *dev);
 	int (*resume)(struct device *dev);
Signature · 1 line
1.8.5.3
#4 lore raw

PATCH v5 4/14 ahci-platform: Add support for devices with more then 1 clock

In reply to Hans de Goede

The allwinner-sun4i AHCI controller needs 2 clocks to be enabled and the imx AHCI controller needs 3 clocks to be enabled.

---
 .../devicetree/bindings/ata/ahci-platform.txt      |  1 +
 drivers/ata/ahci_platform.c                        | 97 +++++++++++++++-------
 include/linux/ahci.h                               |  4 +-
 include/linux/ahci_platform.h                      |  3 +
 4 files changed, 73 insertions(+), 32 deletions(-)
Documentation/devicetree/bindings/ata/ahci-platform.txt +1 -0
index 89de156..3ced07d 100644
@@ -10,6 +10,7 @@ Required properties:
 
 Optional properties:
 - dma-coherent      : Present if dma operations are coherent
+- clocks            : a list of phandle + clock specifier pairs
 
 Example:
         sata at ffe08000 {
drivers/ata/ahci_platform.c +66 -31

149 lines not on this page · raw message

include/linux/ahci.h +3 -1
index 3499d44..19970b0 100644
@@ -23,6 +23,8 @@
 
 #include <linux/clk.h>
 
+#define AHCI_MAX_CLKS		3
+
 struct ata_port;
 
 struct ahci_host_priv {
@@ -37,7 +39,7 @@ struct ahci_host_priv {
 	u32			em_loc; /* enclosure management location */
 	u32			em_buf_sz;	/* EM buffer size in byte */
 	u32			em_msg_type;	/* EM message type */
-	struct clk		*clk;		/* Optional */
+	struct clk		*clks[AHCI_MAX_CLKS]; /* Optional */
 	void			*plat_data;	/* Other platform data */
 	/* Optional ahci_start_engine override */
 	void			(*start_engine)(struct ata_port *ap);
include/linux/ahci_platform.h +3 -0
index 737fe38..0071d0b 100644
@@ -31,4 +31,7 @@ struct ahci_platform_data {
 	unsigned int mask_port_map;
 };
 
+int ahci_platform_enable_clks(struct ahci_host_priv *hpriv);
+void ahci_platform_disable_clks(struct ahci_host_priv *hpriv);
+
 #endif /* _AHCI_PLATFORM_H */
Signature · 1 line
1.8.5.3
#5 lore raw

PATCH v5 5/14 ahci-platform: Add support for an optional regulator for sata-target power

In reply to Hans de Goede
---
 .../devicetree/bindings/ata/ahci-platform.txt      |  1 +
 drivers/ata/ahci_platform.c                        | 35 ++++++++++++++++++++--
 include/linux/ahci.h                               |  2 ++
 3 files changed, 36 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/ata/ahci-platform.txt +1 -0
index 3ced07d..1ac807f 100644
@@ -11,6 +11,7 @@ Required properties:
 Optional properties:
 - dma-coherent      : Present if dma operations are coherent
 - clocks            : a list of phandle + clock specifier pairs
+- target-supply     : regulator for SATA target power
 
 Example:
         sata at ffe08000 {
drivers/ata/ahci_platform.c +33 -2
index aaa0c08..2f319e9 100644
@@ -167,6 +167,13 @@ static int ahci_probe(struct platform_device *pdev)
 		return -ENOMEM;
 	}
 
+	hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
+	if (IS_ERR(hpriv->target_pwr)) {
+		if (PTR_ERR(hpriv->target_pwr) == -EPROBE_DEFER)
+			return -EPROBE_DEFER;
+		hpriv->target_pwr = NULL;
+	}
+
 	max_clk = dev->of_node ? AHCI_MAX_CLKS : 1;
 	for (i = 0; i < max_clk; i++) {
 		if (i == 0)
@@ -183,9 +190,15 @@ static int ahci_probe(struct platform_device *pdev)
 		hpriv->clks[i] = clk;
 	}
 
+	if (hpriv->target_pwr) {
+		rc = regulator_enable(hpriv->target_pwr);
+		if (rc)
+			goto free_clk;
+	}
+
 	rc = ahci_enable_clks(dev, hpriv);
 	if (rc)
-		goto free_clk;
+		goto disable_regulator;
 
 	/*
 	 * Some platforms might need to prepare for mmio region access,
@@ -268,6 +281,9 @@ pdata_exit:
 		pdata->exit(dev);
 disable_unprepare_clk:
 	ahci_disable_clks(hpriv);
+disable_regulator:
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
 free_clk:
 	ahci_put_clks(hpriv);
 	return rc;
@@ -284,6 +300,9 @@ static void ahci_host_stop(struct ata_host *host)
 
 	ahci_disable_clks(hpriv);
 	ahci_put_clks(hpriv);
+
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
 }
 
 #ifdef CONFIG_PM_SLEEP
@@ -320,6 +339,9 @@ static int ahci_suspend(struct device *dev)
 
 	ahci_disable_clks(hpriv);
 
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
+
 	return 0;
 }
 
@@ -330,9 +352,15 @@ static int ahci_resume(struct device *dev)
 	struct ahci_host_priv *hpriv = host->private_data;
 	int rc;
 
+	if (hpriv->target_pwr) {
+		rc = regulator_enable(hpriv->target_pwr);
+		if (rc)
+			return rc;
+	}
+
 	rc = ahci_enable_clks(dev, hpriv);
 	if (rc)
-		return rc;
+		goto disable_regulator;
 
 	if (pdata && pdata->resume) {
 		rc = pdata->resume(dev);
@@ -354,6 +382,9 @@ static int ahci_resume(struct device *dev)
 
 disable_unprepare_clk:
 	ahci_disable_clks(hpriv);
+disable_regulator:
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
 
 	return rc;
 }
include/linux/ahci.h +2 -0
index 19970b0..ac69cdc 100644
@@ -22,6 +22,7 @@
 #define __LINUX_AHCI_H__
 
 #include <linux/clk.h>
+#include <linux/regulator/consumer.h>
 
 #define AHCI_MAX_CLKS		3
 
@@ -40,6 +41,7 @@ struct ahci_host_priv {
 	u32			em_buf_sz;	/* EM buffer size in byte */
 	u32			em_msg_type;	/* EM message type */
 	struct clk		*clks[AHCI_MAX_CLKS]; /* Optional */
+	struct regulator	*target_pwr;	/* Optional */
 	void			*plat_data;	/* Other platform data */
 	/* Optional ahci_start_engine override */
 	void			(*start_engine)(struct ata_port *ap);
Signature · 1 line
1.8.5.3
#6 lore raw

PATCH v5 6/14 ahci-platform: Add enable_ / disable_resources helper functions

In reply to Hans de Goede
---
 drivers/ata/ahci_platform.c   | 83 ++++++++++++++++++++++++-------------------
 include/linux/ahci_platform.h |  2 ++
 2 files changed, 48 insertions(+), 37 deletions(-)
drivers/ata/ahci_platform.c +46 -37
index 2f319e9..1cce7a2 100644
@@ -117,6 +117,39 @@ void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
 EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
 
 
+int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
+{
+	int rc;
+
+	if (hpriv->target_pwr) {
+		rc = regulator_enable(hpriv->target_pwr);
+		if (rc)
+			return rc;
+	}
+
+	rc = ahci_platform_enable_clks(hpriv);
+	if (rc)
+		goto disable_regulator;
+
+	return 0;
+
+disable_regulator:
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
+	return rc;
+}
+EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
+
+void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
+{
+	ahci_platform_disable_clks(hpriv);
+
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
+
+
 static void ahci_put_clks(struct ahci_host_priv *hpriv)
 {
 	int c;
@@ -190,15 +223,9 @@ static int ahci_probe(struct platform_device *pdev)
 		hpriv->clks[i] = clk;
 	}
 
-	if (hpriv->target_pwr) {
-		rc = regulator_enable(hpriv->target_pwr);
-		if (rc)
-			goto free_clk;
-	}
-
-	rc = ahci_enable_clks(dev, hpriv);
+	rc = ahci_platform_enable_resources(hpriv);
 	if (rc)
-		goto disable_regulator;
+		goto free_clk;
 
 	/*
 	 * Some platforms might need to prepare for mmio region access,
@@ -209,7 +236,7 @@ static int ahci_probe(struct platform_device *pdev)
 	if (pdata && pdata->init) {
 		rc = pdata->init(dev, hpriv);
 		if (rc)
-			goto disable_unprepare_clk;
+			goto disable_resources;
 	}
 
 	ahci_save_initial_config(dev, hpriv,
@@ -279,11 +306,8 @@ static int ahci_probe(struct platform_device *pdev)
 pdata_exit:
 	if (pdata && pdata->exit)
 		pdata->exit(dev);
-disable_unprepare_clk:
-	ahci_disable_clks(hpriv);
-disable_regulator:
-	if (hpriv->target_pwr)
-		regulator_disable(hpriv->target_pwr);
+disable_resources:
+	ahci_platform_disable_resources(hpriv);
 free_clk:
 	ahci_put_clks(hpriv);
 	return rc;
@@ -298,11 +322,8 @@ static void ahci_host_stop(struct ata_host *host)
 	if (pdata && pdata->exit)
 		pdata->exit(dev);
 
-	ahci_disable_clks(hpriv);
+	ahci_platform_disable_resources(hpriv);
 	ahci_put_clks(hpriv);
-
-	if (hpriv->target_pwr)
-		regulator_disable(hpriv->target_pwr);
 }
 
 #ifdef CONFIG_PM_SLEEP
@@ -337,10 +358,7 @@ static int ahci_suspend(struct device *dev)
 	if (pdata && pdata->suspend)
 		return pdata->suspend(dev);
 
-	ahci_disable_clks(hpriv);
-
-	if (hpriv->target_pwr)
-		regulator_disable(hpriv->target_pwr);
+	ahci_platform_disable_resources(hpriv);
 
 	return 0;
 }
@@ -352,26 +370,20 @@ static int ahci_resume(struct device *dev)
 	struct ahci_host_priv *hpriv = host->private_data;
 	int rc;
 
-	if (hpriv->target_pwr) {
-		rc = regulator_enable(hpriv->target_pwr);
-		if (rc)
-			return rc;
-	}
-
-	rc = ahci_enable_clks(dev, hpriv);
+	rc = ahci_platform_enable_resources(hpriv);
 	if (rc)
-		goto disable_regulator;
+		return rc;
 
 	if (pdata && pdata->resume) {
 		rc = pdata->resume(dev);
 		if (rc)
-			goto disable_unprepare_clk;
+			goto disable_resources;
 	}
 
 	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
 		rc = ahci_reset_controller(host);
 		if (rc)
-			goto disable_unprepare_clk;
+			goto disable_resources;
 
 		ahci_init_controller(host);
 	}
@@ -380,11 +392,8 @@ static int ahci_resume(struct device *dev)
 
 	return 0;
 
-disable_unprepare_clk:
-	ahci_disable_clks(hpriv);
-disable_regulator:
-	if (hpriv->target_pwr)
-		regulator_disable(hpriv->target_pwr);
+disable_resources:
+	ahci_platform_disable_resources(hpriv);
 
 	return rc;
 }
include/linux/ahci_platform.h +2 -0
index 0071d0b..5e5f85e 100644
@@ -33,5 +33,7 @@ struct ahci_platform_data {
 
 int ahci_platform_enable_clks(struct ahci_host_priv *hpriv);
 void ahci_platform_disable_clks(struct ahci_host_priv *hpriv);
+int ahci_platform_enable_resources(struct ahci_host_priv *hpriv);
+void ahci_platform_disable_resources(struct ahci_host_priv *hpriv);
 
 #endif /* _AHCI_PLATFORM_H */
Signature · 1 line
1.8.5.3
#7 lore raw

PATCH v5 7/14 ahci-platform: "Library-ise" ahci_probe functionality

In reply to Hans de Goede

ahci_probe consists of 3 steps:
1) Get resources (get mmio, clks, regulator)
2) Enable resources, handled by ahci_platform_enable_resouces
3) The more or less standard ahci-host controller init sequence

This commit refactors step 1 and 3 into separate functions, so the platform drivers for AHCI implementations which need a specific order in step 2, and / or need to do some custom register poking at some time, can re-use ahci-platform.c code without needing to copy and paste it.

Note that ahci_platform_init_host's prototype takes the 3 non function members of ahci_platform_data as arguments, the idea is that drivers using the new exported utility functions will not use ahci_platform_data at all, and hopefully in the future ahci_platform_data can go away entirely.

---
 drivers/ata/ahci_platform.c   | 158 ++++++++++++++++++++++++------------------
 include/linux/ahci_platform.h |  14 ++++
 2 files changed, 106 insertions(+), 66 deletions(-)
drivers/ata/ahci_platform.c +92 -66
index 1cce7a2..b260ebe 100644
@@ -150,60 +150,31 @@ void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
 EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
 
 
-static void ahci_put_clks(struct ahci_host_priv *hpriv)
-{
-	int c;
-
-	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
-		clk_put(hpriv->clks[c]);
-}
-
-static int ahci_probe(struct platform_device *pdev)
+struct ahci_host_priv *ahci_platform_get_resources(
+	struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
-	struct ahci_platform_data *pdata = dev_get_platdata(dev);
-	const struct platform_device_id *id = platform_get_device_id(pdev);
-	struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
-	const struct ata_port_info *ppi[] = { &pi, NULL };
 	struct ahci_host_priv *hpriv;
-	struct ata_host *host;
-	struct resource *mem;
 	struct clk *clk;
-	int i, irq, max_clk, n_ports, rc;
-
-	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (!mem) {
-		dev_err(dev, "no mmio space\n");
-		return -EINVAL;
-	}
-
-	irq = platform_get_irq(pdev, 0);
-	if (irq <= 0) {
-		dev_err(dev, "no irq\n");
-		return -EINVAL;
-	}
-
-	if (pdata && pdata->ata_port_info)
-		pi = *pdata->ata_port_info;
+	int i, max_clk, rc;
 
 	hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
 	if (!hpriv) {
 		dev_err(dev, "can't alloc ahci_host_priv\n");
-		return -ENOMEM;
+		return ERR_PTR(-ENOMEM);
 	}
 
-	hpriv->flags |= (unsigned long)pi.private_data;
-
-	hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
+	hpriv->mmio = devm_ioremap_resource(dev,
+			      platform_get_resource(pdev, IORESOURCE_MEM, 0));
 	if (!hpriv->mmio) {
-		dev_err(dev, "can't map %pR\n", mem);
-		return -ENOMEM;
+		dev_err(dev, "no mmio space\n");
+		return ERR_PTR(-EINVAL);
 	}
 
 	hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
 	if (IS_ERR(hpriv->target_pwr)) {
 		if (PTR_ERR(hpriv->target_pwr) == -EPROBE_DEFER)
-			return -EPROBE_DEFER;
+			return ERR_PTR(-EPROBE_DEFER);
 		hpriv->target_pwr = NULL;
 	}
 
@@ -223,27 +194,48 @@ static int ahci_probe(struct platform_device *pdev)
 		hpriv->clks[i] = clk;
 	}
 
-	rc = ahci_platform_enable_resources(hpriv);
-	if (rc)
-		goto free_clk;
+	return hpriv;
 
-	/*
-	 * Some platforms might need to prepare for mmio region access,
-	 * which could be done in the following init call. So, the mmio
-	 * region shouldn't be accessed before init (if provided) has
-	 * returned successfully.
-	 */
-	if (pdata && pdata->init) {
-		rc = pdata->init(dev, hpriv);
-		if (rc)
-			goto disable_resources;
-	}
+free_clk:
+	while (--i >= 0)
+		clk_put(hpriv->clks[i]);
+	return ERR_PTR(rc);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
+
+void ahci_platform_put_resources(struct ahci_host_priv *hpriv)
+{
+	int c;
+
+	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
+		clk_put(hpriv->clks[c]);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_put_resources);
+
+
+int ahci_platform_init_host(struct platform_device *pdev,
+			    struct ahci_host_priv *hpriv,
+			    const struct ata_port_info *pi_template,
+			    unsigned int force_port_map,
+			    unsigned int mask_port_map)
+{
+	struct device *dev = &pdev->dev;
+	struct ata_port_info pi = *pi_template;
+	const struct ata_port_info *ppi[] = { &pi, NULL };
+	struct ata_host *host;
+	int i, irq, n_ports, rc;
 
-	ahci_save_initial_config(dev, hpriv,
-		pdata ? pdata->force_port_map : 0,
-		pdata ? pdata->mask_port_map  : 0);
+	irq = platform_get_irq(pdev, 0);
+	if (irq <= 0) {
+		dev_err(dev, "no irq\n");
+		return -EINVAL;
+	}
 
 	/* prepare host */
+	hpriv->flags |= (unsigned long)pi.private_data;
+
+	ahci_save_initial_config(dev, hpriv, force_port_map, mask_port_map);
+
 	if (hpriv->cap & HOST_CAP_NCQ)
 		pi.flags |= ATA_FLAG_NCQ;
 
@@ -260,10 +252,8 @@ static int ahci_probe(struct platform_device *pdev)
 	n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
 
 	host = ata_host_alloc_pinfo(dev, ppi, n_ports);
-	if (!host) {
-		rc = -ENOMEM;
-		goto pdata_exit;
-	}
+	if (!host)
+		return -ENOMEM;
 
 	host->private_data = hpriv;
 
@@ -278,7 +268,8 @@ static int ahci_probe(struct platform_device *pdev)
 	for (i = 0; i < host->n_ports; i++) {
 		struct ata_port *ap = host->ports[i];
 
-		ata_port_desc(ap, "mmio %pR", mem);
+		ata_port_desc(ap, "mmio %pR",
+			      platform_get_resource(pdev, IORESOURCE_MEM, 0));
 		ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
 
 		/* set enclosure management message type */
@@ -292,13 +283,48 @@ static int ahci_probe(struct platform_device *pdev)
 
 	rc = ahci_reset_controller(host);
 	if (rc)
-		goto pdata_exit;
+		return rc;
 
 	ahci_init_controller(host);
 	ahci_print_info(host, "platform");
 
-	rc = ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
-			       &ahci_platform_sht);
+	return ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
+				 &ahci_platform_sht);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_init_host);
+
+static int ahci_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct ahci_platform_data *pdata = dev_get_platdata(dev);
+	const struct platform_device_id *id = platform_get_device_id(pdev);
+	struct ahci_host_priv *hpriv;
+	int rc;
+
+	hpriv = ahci_platform_get_resources(pdev);
+	if (IS_ERR(hpriv))
+		return PTR_ERR(hpriv);
+
+	rc = ahci_platform_enable_resources(hpriv);
+	if (rc)
+		goto put_resources;
+
+	/*
+	 * Some platforms might need to prepare for mmio region access,
+	 * which could be done in the following init call. So, the mmio
+	 * region shouldn't be accessed before init (if provided) has
+	 * returned successfully.
+	 */
+	if (pdata && pdata->init) {
+		rc = pdata->init(dev, hpriv);
+		if (rc)
+			goto disable_resources;
+	}
+
+	rc = ahci_platform_init_host(pdev, hpriv,
+				     &ahci_port_info[id ? id->driver_data : 0],
+				     pdata ? pdata->force_port_map : 0,
+				     pdata ? pdata->mask_port_map  : 0);
 	if (rc)
 		goto pdata_exit;
 
@@ -308,8 +334,8 @@ pdata_exit:
 		pdata->exit(dev);
 disable_resources:
 	ahci_platform_disable_resources(hpriv);
-free_clk:
-	ahci_put_clks(hpriv);
+put_resources:
+	ahci_platform_put_resources(hpriv);
 	return rc;
 }
 
@@ -323,7 +349,7 @@ static void ahci_host_stop(struct ata_host *host)
 		pdata->exit(dev);
 
 	ahci_platform_disable_resources(hpriv);
-	ahci_put_clks(hpriv);
+	ahci_platform_put_resources(hpriv);
 }
 
 #ifdef CONFIG_PM_SLEEP
include/linux/ahci_platform.h +14 -0
index 5e5f85e..1dc7602 100644
@@ -20,7 +20,13 @@
 struct device;
 struct ata_port_info;
 struct ahci_host_priv;
+struct platform_device;
 
+/*
+ * Note ahci_platform_data is deprecated. New drivers which need to override
+ * any of these, should instead declare there own platform_driver struct, and
+ * use ahci_platform* functions in their own probe, suspend and resume methods.
+ */
 struct ahci_platform_data {
 	int (*init)(struct device *dev, struct ahci_host_priv *hpriv);
 	void (*exit)(struct device *dev);
@@ -35,5 +41,13 @@ int ahci_platform_enable_clks(struct ahci_host_priv *hpriv);
 void ahci_platform_disable_clks(struct ahci_host_priv *hpriv);
 int ahci_platform_enable_resources(struct ahci_host_priv *hpriv);
 void ahci_platform_disable_resources(struct ahci_host_priv *hpriv);
+struct ahci_host_priv *ahci_platform_get_resources(
+	struct platform_device *pdev);
+void ahci_platform_put_resources(struct ahci_host_priv *hpriv);
+int ahci_platform_init_host(struct platform_device *pdev,
+			    struct ahci_host_priv *hpriv,
+			    const struct ata_port_info *pi_template,
+			    unsigned int force_port_map,
+			    unsigned int mask_port_map);
 
 #endif /* _AHCI_PLATFORM_H */
Signature · 1 line
1.8.5.3
#8 lore raw

PATCH v5 7/14 ahci-platform: "Library-ise" ahci_probe functionality

Hi,

Quoted 275 lines · Hans de Goede

ahci_probe consists of 3 steps:
1) Get resources (get mmio, clks, regulator)
2) Enable resources, handled by ahci_platform_enable_resouces
3) The more or less standard ahci-host controller init sequence

This commit refactors step 1 and 3 into separate functions, so the platform drivers for AHCI implementations which need a specific order in step 2, and / or need to do some custom register poking at some time, can re-use ahci-platform.c code without needing to copy and paste it.

Note that ahci_platform_init_host's prototype takes the 3 non function members of ahci_platform_data as arguments, the idea is that drivers using the new exported utility functions will not use ahci_platform_data at all, and hopefully in the future ahci_platform_data can go away entirely.

---
 drivers/ata/ahci_platform.c   | 158 ++++++++++++++++++++++++------------------
 include/linux/ahci_platform.h |  14 ++++
 2 files changed, 106 insertions(+), 66 deletions(-)
drivers/ata/ahci_platform.c +92 -66
index 1cce7a2..b260ebe 100644
@@ -150,60 +150,31 @@ void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
 EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
 
 
-static void ahci_put_clks(struct ahci_host_priv *hpriv)
-{
-	int c;
-
-	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
-		clk_put(hpriv->clks[c]);
-}
-
-static int ahci_probe(struct platform_device *pdev)
+struct ahci_host_priv *ahci_platform_get_resources(
+	struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
-	struct ahci_platform_data *pdata = dev_get_platdata(dev);
-	const struct platform_device_id *id = platform_get_device_id(pdev);
-	struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
-	const struct ata_port_info *ppi[] = { &pi, NULL };
 	struct ahci_host_priv *hpriv;
-	struct ata_host *host;
-	struct resource *mem;
 	struct clk *clk;
-	int i, irq, max_clk, n_ports, rc;
-
-	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (!mem) {
-		dev_err(dev, "no mmio space\n");
-		return -EINVAL;
-	}
-
-	irq = platform_get_irq(pdev, 0);
-	if (irq <= 0) {
-		dev_err(dev, "no irq\n");
-		return -EINVAL;
-	}
-
-	if (pdata && pdata->ata_port_info)
-		pi = *pdata->ata_port_info;
+	int i, max_clk, rc;
 
 	hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
 	if (!hpriv) {
 		dev_err(dev, "can't alloc ahci_host_priv\n");
-		return -ENOMEM;
+		return ERR_PTR(-ENOMEM);
 	}
 
-	hpriv->flags |= (unsigned long)pi.private_data;
-
-	hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
+	hpriv->mmio = devm_ioremap_resource(dev,
+			      platform_get_resource(pdev, IORESOURCE_MEM, 0));
 	if (!hpriv->mmio) {
-		dev_err(dev, "can't map %pR\n", mem);
-		return -ENOMEM;
+		dev_err(dev, "no mmio space\n");
+		return ERR_PTR(-EINVAL);
 	}
 
 	hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
 	if (IS_ERR(hpriv->target_pwr)) {
 		if (PTR_ERR(hpriv->target_pwr) == -EPROBE_DEFER)
-			return -EPROBE_DEFER;
+			return ERR_PTR(-EPROBE_DEFER);
 		hpriv->target_pwr = NULL;
 	}
 
@@ -223,27 +194,48 @@ static int ahci_probe(struct platform_device *pdev)
 		hpriv->clks[i] = clk;
 	}
 
-	rc = ahci_platform_enable_resources(hpriv);
-	if (rc)
-		goto free_clk;
+	return hpriv;
 
-	/*
-	 * Some platforms might need to prepare for mmio region access,
-	 * which could be done in the following init call. So, the mmio
-	 * region shouldn't be accessed before init (if provided) has
-	 * returned successfully.
-	 */
-	if (pdata && pdata->init) {
-		rc = pdata->init(dev, hpriv);
-		if (rc)
-			goto disable_resources;
-	}
+free_clk:
+	while (--i >= 0)
+		clk_put(hpriv->clks[i]);
+	return ERR_PTR(rc);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
+
+void ahci_platform_put_resources(struct ahci_host_priv *hpriv)
+{
+	int c;
+
+	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
+		clk_put(hpriv->clks[c]);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_put_resources);
+
+
+int ahci_platform_init_host(struct platform_device *pdev,
+			    struct ahci_host_priv *hpriv,
+			    const struct ata_port_info *pi_template,
+			    unsigned int force_port_map,
+			    unsigned int mask_port_map)
+{
+	struct device *dev = &pdev->dev;
+	struct ata_port_info pi = *pi_template;
+	const struct ata_port_info *ppi[] = { &pi, NULL };
+	struct ata_host *host;
+	int i, irq, n_ports, rc;
 
-	ahci_save_initial_config(dev, hpriv,
-		pdata ? pdata->force_port_map : 0,
-		pdata ? pdata->mask_port_map  : 0);
+	irq = platform_get_irq(pdev, 0);
+	if (irq <= 0) {
+		dev_err(dev, "no irq\n");
+		return -EINVAL;
+	}
 
 	/* prepare host */
+	hpriv->flags |= (unsigned long)pi.private_data;
+
+	ahci_save_initial_config(dev, hpriv, force_port_map, mask_port_map);
+
 	if (hpriv->cap & HOST_CAP_NCQ)
 		pi.flags |= ATA_FLAG_NCQ;
 
@@ -260,10 +252,8 @@ static int ahci_probe(struct platform_device *pdev)
 	n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
 
 	host = ata_host_alloc_pinfo(dev, ppi, n_ports);
-	if (!host) {
-		rc = -ENOMEM;
-		goto pdata_exit;
-	}
+	if (!host)
+		return -ENOMEM;
 
 	host->private_data = hpriv;
 
@@ -278,7 +268,8 @@ static int ahci_probe(struct platform_device *pdev)
 	for (i = 0; i < host->n_ports; i++) {
 		struct ata_port *ap = host->ports[i];
 
-		ata_port_desc(ap, "mmio %pR", mem);
+		ata_port_desc(ap, "mmio %pR",
+			      platform_get_resource(pdev, IORESOURCE_MEM, 0));
 		ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
 
 		/* set enclosure management message type */
@@ -292,13 +283,48 @@ static int ahci_probe(struct platform_device *pdev)
 
 	rc = ahci_reset_controller(host);
 	if (rc)
-		goto pdata_exit;
+		return rc;
 
 	ahci_init_controller(host);
 	ahci_print_info(host, "platform");
 
-	rc = ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
-			       &ahci_platform_sht);
+	return ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
+				 &ahci_platform_sht);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_init_host);
+
+static int ahci_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct ahci_platform_data *pdata = dev_get_platdata(dev);
+	const struct platform_device_id *id = platform_get_device_id(pdev);
+	struct ahci_host_priv *hpriv;
+	int rc;
+
+	hpriv = ahci_platform_get_resources(pdev);
+	if (IS_ERR(hpriv))
+		return PTR_ERR(hpriv);
+
+	rc = ahci_platform_enable_resources(hpriv);
+	if (rc)
+		goto put_resources;
+
+	/*
+	 * Some platforms might need to prepare for mmio region access,
+	 * which could be done in the following init call. So, the mmio
+	 * region shouldn't be accessed before init (if provided) has
+	 * returned successfully.
+	 */
+	if (pdata && pdata->init) {
+		rc = pdata->init(dev, hpriv);
+		if (rc)
+			goto disable_resources;
+	}
+
+	rc = ahci_platform_init_host(pdev, hpriv,
+				     &ahci_port_info[id ? id->driver_data : 0],
+				     pdata ? pdata->force_port_map : 0,
+				     pdata ? pdata->mask_port_map  : 0);
 	if (rc)
 		goto pdata_exit;
 
@@ -308,8 +334,8 @@ pdata_exit:
 		pdata->exit(dev);
 disable_resources:
 	ahci_platform_disable_resources(hpriv);
-free_clk:
-	ahci_put_clks(hpriv);
+put_resources:
+	ahci_platform_put_resources(hpriv);
 	return rc;
 }
 
@@ -323,7 +349,7 @@ static void ahci_host_stop(struct ata_host *host)
 		pdata->exit(dev);
 
 	ahci_platform_disable_resources(hpriv);
-	ahci_put_clks(hpriv);
+	ahci_platform_put_resources(hpriv);
 }
 
 #ifdef CONFIG_PM_SLEEP
include/linux/ahci_platform.h +6 -0
index 5e5f85e..1dc7602 100644
@@ -20,7 +20,13 @@
 struct device;
 struct ata_port_info;
 struct ahci_host_priv;
+struct platform_device;
 
+/*
+ * Note ahci_platform_data is deprecated. New drivers which need to override
+ * any of these, should instead declare there own platform_driver struct, and
+ * use ahci_platform* functions in their own probe, suspend and resume methods.
+ */
 struct ahci_platform_data {
 	int (*init)(struct device *dev, struct ahci_host_priv *hpriv);
 	void (*exit)(struct device *dev);

include/linux/ahci_platform.h int ahci_platform_enable_clks(struct ahci_host_priv *hpriv); · line 45

Quoted 5 lines
include/linux/ahci_platform.h +2 -0
@@ -35,5 +41,13 @@ int ahci_platform_enable_clks(struct ahci_host_priv *hpriv);
 void ahci_platform_disable_clks(struct ahci_host_priv *hpriv);
 int ahci_platform_enable_resources(struct ahci_host_priv *hpriv);
 void ahci_platform_disable_resources(struct ahci_host_priv *hpriv);
+struct ahci_host_priv *ahci_platform_get_resources(
+	struct platform_device *pdev);

Why not use 'struct device' as the argument?

include/linux/ahci_platform.h int ahci_platform_enable_clks(struct ahci_host_priv *hpriv); · line 46

Quoted 1 line
include/linux/ahci_platform.h +1 -0
+void ahci_platform_put_resources(struct ahci_host_priv *hpriv);

Can we have 'struct device' as the argument? Else it becomes impossible to get 'struct device' from 'hpriv' if we need to call e.g. pm_runtime_*() APIs.

include/linux/ahci_platform.h int ahci_platform_enable_clks(struct ahci_host_priv *hpriv); · line 53

Quoted 8 lines
include/linux/ahci_platform.h +5 -0
+int ahci_platform_init_host(struct platform_device *pdev,
+			    struct ahci_host_priv *hpriv,
+			    const struct ata_port_info *pi_template,
+			    unsigned int force_port_map,
+			    unsigned int mask_port_map);
 
 #endif /* _AHCI_PLATFORM_H */

cheers,
-roger

#9 lore raw

PATCH v5 7/14 ahci-platform: "Library-ise" ahci_probe functionality

Hi,

Quoted 3 lines · Roger Quadros

Hi,

On 01/22/2014 09:04 PM, Hans de Goede wrote:

<snip>

Quoted 8 lines
Quoted 8 lines
include/linux/ahci_platform.h +1 -0
@@ -20,7 +20,13 @@
  struct device;
  struct ata_port_info;
  struct ahci_host_priv;
+struct platform_device;
 
Quoted 16 lines
Quoted 9 lines
include/linux/ahci_platform.h +5 -0
+/*
+ * Note ahci_platform_data is deprecated. New drivers which need to override
+ * any of these, should instead declare there own platform_driver struct, and
+ * use ahci_platform* functions in their own probe, suspend and resume methods.
+ */
  struct ahci_platform_data {
  	int (*init)(struct device *dev, struct ahci_host_priv *hpriv);
  	void (*exit)(struct device *dev);

include/linux/ahci_platform.h int ahci_platform_enable_clks(struct ahci_host_priv *hpriv); · line 45

Quoted 5 lines
include/linux/ahci_platform.h +2 -0
@@ -35,5 +41,13 @@ int ahci_platform_enable_clks(struct ahci_host_priv *hpriv);
  void ahci_platform_disable_clks(struct ahci_host_priv *hpriv);
  int ahci_platform_enable_resources(struct ahci_host_priv *hpriv);
  void ahci_platform_disable_resources(struct ahci_host_priv *hpriv);
+struct ahci_host_priv *ahci_platform_get_resources(
+	struct platform_device *pdev);

Why not use 'struct device' as the argument?

Because of calls to platform_get_resource inside the function.

Quoted 5 lines

include/linux/ahci_platform.h int ahci_platform_enable_clks(struct ahci_host_priv *hpriv); · line 46

Quoted 1 line
include/linux/ahci_platform.h +1 -0
+void ahci_platform_put_resources(struct ahci_host_priv *hpriv);

Can we have 'struct device' as the argument? Else it becomes impossible to get 'struct device' from 'hpriv' if we need to call e.g. pm_runtime_*() APIs.

The plan for is for this function to go away once we have a devm version of of_clk_get, so if you need to put pm_runtime_calls somewhere, please don't put them here. This sounds like something which should go in enable / disable resources instead ?

Regards,

Hans

#10 lore raw

PATCH v5 7/14 ahci-platform: "Library-ise" ahci_probe functionality

Quoted 38 lines · Hans de Goede

Hi,

Quoted 3 lines · Roger Quadros

Hi,

On 01/22/2014 09:04 PM, Hans de Goede wrote:

<snip>

Quoted 8 lines
Quoted 8 lines
include/linux/ahci_platform.h +1 -0
@@ -20,7 +20,13 @@
  struct device;
  struct ata_port_info;
  struct ahci_host_priv;
+struct platform_device;
 
Quoted 16 lines
Quoted 9 lines
include/linux/ahci_platform.h +5 -0
+/*
+ * Note ahci_platform_data is deprecated. New drivers which need to override
+ * any of these, should instead declare there own platform_driver struct, and
+ * use ahci_platform* functions in their own probe, suspend and resume methods.
+ */
  struct ahci_platform_data {
      int (*init)(struct device *dev, struct ahci_host_priv *hpriv);
      void (*exit)(struct device *dev);

include/linux/ahci_platform.h int ahci_platform_enable_clks(struct ahci_host_priv *hpriv); · line 45

Quoted 5 lines
include/linux/ahci_platform.h +2 -0
@@ -35,5 +41,13 @@ int ahci_platform_enable_clks(struct ahci_host_priv *hpriv);
  void ahci_platform_disable_clks(struct ahci_host_priv *hpriv);
  int ahci_platform_enable_resources(struct ahci_host_priv *hpriv);
  void ahci_platform_disable_resources(struct ahci_host_priv *hpriv);
+struct ahci_host_priv *ahci_platform_get_resources(
+    struct platform_device *pdev);

Why not use 'struct device' as the argument?

Because of calls to platform_get_resource inside the function.

Quoted 2 lines
Quoted 1 line
include/linux/ahci_platform.h +1 -0
+void ahci_platform_put_resources(struct ahci_host_priv *hpriv);
Quoted 8 lines
Quoted 3 lines

Can we have 'struct device' as the argument? Else it becomes impossible to get 'struct device' from 'hpriv' if we need to call e.g. pm_runtime_*() APIs.

The plan for is for this function to go away once we have a devm version of of_clk_get, so if you need to put pm_runtime_calls somewhere, please don't put them here. This sounds like something which should go in enable / disable resources instead ?

OK. I need to add pm_runtime_enable() + pm_runtime_get_sync() during initialization and pm_runtime_put_sync() + pm_runtime_disable() during cleanup.

If ahci_platform_enable/disable_resources is the right place then we must be able to access struct device from there.

Is it a good to add 'struct device *dev' into the 'struct ahci_host_priv'? Then you can leave this series as is and i'll add a new patch for that.

If there is a better way, please let me know.

cheers,
-roger

#11 lore raw

PATCH v5 7/14 ahci-platform: "Library-ise" ahci_probe functionality

Hi,

Quoted 43 lines · Roger Quadros
Quoted 42 lines · Hans de Goede

Hi,

Quoted 3 lines · Roger Quadros

Hi,

On 01/22/2014 09:04 PM, Hans de Goede wrote:

<snip>

Quoted 8 lines
Quoted 8 lines
include/linux/ahci_platform.h +1 -0
@@ -20,7 +20,13 @@
   struct device;
   struct ata_port_info;
   struct ahci_host_priv;
+struct platform_device;
 
Quoted 16 lines
Quoted 9 lines
include/linux/ahci_platform.h +5 -0
+/*
+ * Note ahci_platform_data is deprecated. New drivers which need to override
+ * any of these, should instead declare there own platform_driver struct, and
+ * use ahci_platform* functions in their own probe, suspend and resume methods.
+ */
   struct ahci_platform_data {
       int (*init)(struct device *dev, struct ahci_host_priv *hpriv);
       void (*exit)(struct device *dev);

include/linux/ahci_platform.h int ahci_platform_enable_clks(struct ahci_host_priv *hpriv); · line 45

Quoted 5 lines
include/linux/ahci_platform.h +2 -0
@@ -35,5 +41,13 @@ int ahci_platform_enable_clks(struct ahci_host_priv *hpriv);
   void ahci_platform_disable_clks(struct ahci_host_priv *hpriv);
   int ahci_platform_enable_resources(struct ahci_host_priv *hpriv);
   void ahci_platform_disable_resources(struct ahci_host_priv *hpriv);
+struct ahci_host_priv *ahci_platform_get_resources(
+    struct platform_device *pdev);

Why not use 'struct device' as the argument?

Because of calls to platform_get_resource inside the function.

Quoted 5 lines

include/linux/ahci_platform.h int ahci_platform_enable_clks(struct ahci_host_priv *hpriv); · line 46

Quoted 1 line
include/linux/ahci_platform.h +1 -0
+void ahci_platform_put_resources(struct ahci_host_priv *hpriv);

Can we have 'struct device' as the argument? Else it becomes impossible to get 'struct device' from 'hpriv' if we need to call e.g. pm_runtime_*() APIs.

Quoted 7 lines
Quoted 4 lines

The plan for is for this function to go away once we have a devm version of of_clk_get, so if you need to put pm_runtime_calls somewhere, please don't put them here. This sounds like something which should go in enable / disable resources instead ?

OK. I need to add pm_runtime_enable() + pm_runtime_get_sync() during initialization and pm_runtime_put_sync() + pm_runtime_disable() during cleanup.

Note that enable / disable resources will get called by (the default implementations of) suspend / resume too.

If that is undesirable then I take back what I said before and ahci_platform_put_resources' prototype should be changed to:

void ahci_platform_put_resources(struct device *dev, struct ahci_host_priv *hpriv);

And we will need to keep it around even after we get devm_of_clk_get.

Quoted 2 lines

If ahci_platform_enable/disable_resources is the right place then we must be able to access struct device from there.

Right, and if not we need to access it from ahci_platform_put_resources(), which is in essence the same problem.

Quoted 2 lines

Is it a good to add 'struct device *dev' into the 'struct ahci_host_priv'? Then you can leave this series as is and i'll add a new patch for that.

Normally we get a device * as argument, and get to hpriv like this:

         struct ata_host *host = dev_get_drvdata(dev);
         struct ahci_host_priv *hpriv = host->private_data;

So having a dev * in hpriv is normally not useful.

But the ata_host gets allocated after the first ahci_platform_enable_resources call, so we cannot use this there. Likewise disable_resources / put_resources is used in error handling paths in probe where we don't have an ata_host yet, so my vote goes to adding a "struct device *dev" as first argument, like I suggested above for ahci_platform_put_resources.

This can be done as an add-on patch (if you do don't forget to also fix ahci_sunxi.c and ahci_imx.c), or I can respin my series to have this from day one.

If you want me to do a respin, please let me know which fix you'll need (the put_resources or the enable/disable one).

Thanks & Regards,

Hans

#12 lore raw

PATCH v5 7/14 ahci-platform: "Library-ise" ahci_probe functionality

Quoted 86 lines · Hans de Goede

Hi,

Quoted 43 lines · Roger Quadros
Quoted 42 lines · Hans de Goede

Hi,

Quoted 3 lines · Roger Quadros

Hi,

On 01/22/2014 09:04 PM, Hans de Goede wrote:

<snip>

Quoted 8 lines
Quoted 8 lines
include/linux/ahci_platform.h +1 -0
@@ -20,7 +20,13 @@
   struct device;
   struct ata_port_info;
   struct ahci_host_priv;
+struct platform_device;
 
Quoted 16 lines
Quoted 9 lines
include/linux/ahci_platform.h +5 -0
+/*
+ * Note ahci_platform_data is deprecated. New drivers which need to override
+ * any of these, should instead declare there own platform_driver struct, and
+ * use ahci_platform* functions in their own probe, suspend and resume methods.
+ */
   struct ahci_platform_data {
       int (*init)(struct device *dev, struct ahci_host_priv *hpriv);
       void (*exit)(struct device *dev);

include/linux/ahci_platform.h int ahci_platform_enable_clks(struct ahci_host_priv *hpriv); · line 45

Quoted 5 lines
include/linux/ahci_platform.h +2 -0
@@ -35,5 +41,13 @@ int ahci_platform_enable_clks(struct ahci_host_priv *hpriv);
   void ahci_platform_disable_clks(struct ahci_host_priv *hpriv);
   int ahci_platform_enable_resources(struct ahci_host_priv *hpriv);
   void ahci_platform_disable_resources(struct ahci_host_priv *hpriv);
+struct ahci_host_priv *ahci_platform_get_resources(
+    struct platform_device *pdev);

Why not use 'struct device' as the argument?

Because of calls to platform_get_resource inside the function.

Quoted 5 lines

include/linux/ahci_platform.h int ahci_platform_enable_clks(struct ahci_host_priv *hpriv); · line 46

Quoted 1 line
include/linux/ahci_platform.h +1 -0
+void ahci_platform_put_resources(struct ahci_host_priv *hpriv);

Can we have 'struct device' as the argument? Else it becomes impossible to get 'struct device' from 'hpriv' if we need to call e.g. pm_runtime_*() APIs.

Quoted 7 lines
Quoted 4 lines

The plan for is for this function to go away once we have a devm version of of_clk_get, so if you need to put pm_runtime_calls somewhere, please don't put them here. This sounds like something which should go in enable / disable resources instead ?

OK. I need to add pm_runtime_enable() + pm_runtime_get_sync() during initialization and pm_runtime_put_sync() + pm_runtime_disable() during cleanup.

Note that enable / disable resources will get called by (the default implementations of) suspend / resume too.

If that is undesirable then I take back what I said before and ahci_platform_put_resources' prototype should be changed to:

void ahci_platform_put_resources(struct device *dev, struct ahci_host_priv *hpriv);

And we will need to keep it around even after we get devm_of_clk_get.

Quoted 2 lines

If ahci_platform_enable/disable_resources is the right place then we must be able to access struct device from there.

Right, and if not we need to access it from ahci_platform_put_resources(), which is in essence the same problem.

Quoted 2 lines

Is it a good to add 'struct device *dev' into the 'struct ahci_host_priv'? Then you can leave this series as is and i'll add a new patch for that.

Normally we get a device * as argument, and get to hpriv like this:

        struct ata_host *host = dev_get_drvdata(dev);
        struct ahci_host_priv *hpriv = host->private_data;

So having a dev * in hpriv is normally not useful.

But the ata_host gets allocated after the first ahci_platform_enable_resources call, so we cannot use this there. Likewise disable_resources / put_resources is used in error handling paths in probe where we don't have an ata_host yet, so my vote goes to adding a "struct device *dev" as first argument, like I suggested above for ahci_platform_put_resources.

Quoted 7 lines

This can be done as an add-on patch (if you do don't forget to also fix ahci_sunxi.c and ahci_imx.c), or I can respin my series to have this from day one.

If you want me to do a respin, please let me know which fix you'll need (the put_resources or the enable/disable one).

For now I'm using get/put_resources to enable runtime PM and enable the device like in the below patch.

I'll make the necessary changes to ahci_platform_put_resources();

cheers,
-roger

drivers/ata/ahci_platform.c +12 -0
index 5ec6fe6..965f4b4 100644
@@ -23,6 +23,7 @@
 #include <linux/platform_device.h>
 #include <linux/libata.h>
 #include <linux/ahci_platform.h>
+#include <linux/pm_runtime.h>
 #include "ahci.h"
 
 static void ahci_host_stop(struct ata_host *host);
@@ -233,6 +234,9 @@ struct ahci_host_priv *ahci_platform_get_resources(
                }
        }
 
+       pm_runtime_enable(dev);
+       pm_runtime_get_sync(dev);
+
        return hpriv;
 
 free_clk:
@@ -246,6 +250,9 @@ void ahci_platform_put_resources(struct ahci_host_priv *hpriv)
 {
        int c;
 
+       pm_runtime_put_sync(dev);
+       pm_runtime_disable(dev);
+
        for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
                clk_put(hpriv->clks[c]);
 }
@@ -478,6 +485,11 @@ int ahci_platform_resume(struct device *dev)
        if (rc)
                goto disable_resources;
 
+       /* We resumed so update PM runtime state */
+       pm_runtime_disable(dev);
+       pm_runtime_set_active(dev);
+       pm_runtime_enable(dev);
+
        return 0;
 
 disable_resources:
#13 lore raw

PATCH v5 8/14 ahci-platform: "Library-ise" suspend / resume functionality

In reply to Hans de Goede

Split suspend / resume code into host suspend / resume functionality and resource enable / disabling phases, and export the new suspend_ / resume_host functions.

---
 drivers/ata/ahci_platform.c   | 55 +++++++++++++++++++++++++++++++------------
 include/linux/ahci_platform.h |  7 ++++++
 2 files changed, 47 insertions(+), 15 deletions(-)
drivers/ata/ahci_platform.c +40 -15
index b260ebe..ba93930 100644
@@ -353,14 +353,12 @@ static void ahci_host_stop(struct ata_host *host)
 }
 
 #ifdef CONFIG_PM_SLEEP
-static int ahci_suspend(struct device *dev)
+int ahci_platform_suspend_host(struct device *dev)
 {
-	struct ahci_platform_data *pdata = dev_get_platdata(dev);
 	struct ata_host *host = dev_get_drvdata(dev);
 	struct ahci_host_priv *hpriv = host->private_data;
 	void __iomem *mmio = hpriv->mmio;
 	u32 ctl;
-	int rc;
 
 	if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
 		dev_err(dev, "firmware update required for suspend/resume\n");
@@ -377,7 +375,37 @@ static int ahci_suspend(struct device *dev)
 	writel(ctl, mmio + HOST_CTL);
 	readl(mmio + HOST_CTL); /* flush */
 
-	rc = ata_host_suspend(host, PMSG_SUSPEND);
+	return ata_host_suspend(host, PMSG_SUSPEND);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
+
+int ahci_platform_resume_host(struct device *dev)
+{
+	struct ata_host *host = dev_get_drvdata(dev);
+	int rc;
+
+	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
+		rc = ahci_reset_controller(host);
+		if (rc)
+			return rc;
+
+		ahci_init_controller(host);
+	}
+
+	ata_host_resume(host);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
+
+int ahci_platform_suspend(struct device *dev)
+{
+	struct ahci_platform_data *pdata = dev_get_platdata(dev);
+	struct ata_host *host = dev_get_drvdata(dev);
+	struct ahci_host_priv *hpriv = host->private_data;
+	int rc;
+
+	rc = ahci_platform_suspend_host(dev);
 	if (rc)
 		return rc;
 
@@ -388,8 +416,9 @@ static int ahci_suspend(struct device *dev)
 
 	return 0;
 }
+EXPORT_SYMBOL_GPL(ahci_platform_suspend);
 
-static int ahci_resume(struct device *dev)
+int ahci_platform_resume(struct device *dev)
 {
 	struct ahci_platform_data *pdata = dev_get_platdata(dev);
 	struct ata_host *host = dev_get_drvdata(dev);
@@ -406,15 +435,9 @@ static int ahci_resume(struct device *dev)
 			goto disable_resources;
 	}
 
-	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
-		rc = ahci_reset_controller(host);
-		if (rc)
-			goto disable_resources;
-
-		ahci_init_controller(host);
-	}
-
-	ata_host_resume(host);
+	rc = ahci_platform_resume_host(dev);
+	if (rc)
+		goto disable_resources;
 
 	return 0;
 
@@ -423,9 +446,11 @@ disable_resources:
 
 	return rc;
 }
+EXPORT_SYMBOL_GPL(ahci_platform_resume);
 #endif
 
-static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);
+static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_platform_suspend,
+			 ahci_platform_resume);
 
 static const struct of_device_id ahci_of_match[] = {
 	{ .compatible = "snps,spear-ahci", },
include/linux/ahci_platform.h +7 -0
index 1dc7602..b484ac0 100644
@@ -50,4 +50,11 @@ int ahci_platform_init_host(struct platform_device *pdev,
 			    unsigned int force_port_map,
 			    unsigned int mask_port_map);
 
+#ifdef CONFIG_PM_SLEEP
+int ahci_platform_suspend_host(struct device *dev);
+int ahci_platform_resume_host(struct device *dev);
+int ahci_platform_suspend(struct device *dev);
+int ahci_platform_resume(struct device *dev);
+#endif
+
 #endif /* _AHCI_PLATFORM_H */
Signature · 1 line
1.8.5.3
#14 lore raw

PATCH v5 8/14 ahci-platform: "Library-ise" suspend / resume functionality

include/linux/ahci_platform.h int ahci_platform_init_host(struct platform_device *pdev, · line 59

Quoted 13 lines · Hans de Goede
include/linux/ahci_platform.h +7 -0
@@ -50,4 +50,11 @@ int ahci_platform_init_host(struct platform_device *pdev,
                            unsigned int force_port_map,
                            unsigned int mask_port_map);
 
+#ifdef CONFIG_PM_SLEEP
+int ahci_platform_suspend_host(struct device *dev);
+int ahci_platform_resume_host(struct device *dev);
+int ahci_platform_suspend(struct device *dev);
+int ahci_platform_resume(struct device *dev);
+#endif
+

Not sure if the #ifdef does any good here. Normally, we don't hide declarations so we can do stuff like

	if (IS_ENABLED(CONFIG_PM_SLEEP))
		ret = ahci_platform_suspend_host(dev);

and expect the code to compile and link just fine.

Arnd

#15 lore raw

PATCH v5 8/14 ahci-platform: "Library-ise" suspend / resume functionality

Hi,

Quoted 7 lines · Arnd Bergmann
Quoted 6 lines · Hans de Goede
include/linux/ahci_platform.h +0 -0
@@ -50,4 +50,11 @@ int ahci_platform_init_host(struct platform_device *pdev,
                            unsigned int force_port_map,
                            unsigned int mask_port_map);
 
Quoted 10 lines

include/linux/ahci_platform.h int ahci_platform_init_host(struct platform_device *pdev, · line 59

Quoted 7 lines
include/linux/ahci_platform.h +7 -0
+#ifdef CONFIG_PM_SLEEP
+int ahci_platform_suspend_host(struct device *dev);
+int ahci_platform_resume_host(struct device *dev);
+int ahci_platform_suspend(struct device *dev);
+int ahci_platform_resume(struct device *dev);
+#endif
+

Not sure if the #ifdef does any good here. Normally, we don't hide declarations so we can do stuff like

Thanks for the review, I'll remove the #ifdef in the next version of this patch-set.

Regards,

Hans

#16 lore raw

PATCH v5 9/14 ARM: sunxi: Add support for Allwinner SUNXi SoCs sata to ahci_platform

In reply to Hans de Goede

From: Olliver Schinagl <[email protected]>

This patch adds support for the ahci sata controler found on Allwinner A10 and A20 SoCs to the ahci_platform driver.

Orignally written by Olliver Schinagl using the approach of having a platform device which probe method creates a new child platform device which gets driven by ahci_platform.c, as done by ahci_imx.c .

Refactored by Hans de Goede to add most of the non sunxi specific functionality to ahci_platform.c and use a platform_data pointer from of_device_id for the sunxi specific bits.

---
 .../devicetree/bindings/ata/ahci-platform.txt      |  18 +-
 drivers/ata/Kconfig                                |   9 +
 drivers/ata/Makefile                               |   1 +
 drivers/ata/ahci_sunxi.c                           | 251 +++++++++++++++++++++
 4 files changed, 276 insertions(+), 3 deletions(-)
 create mode 100644 drivers/ata/ahci_sunxi.c
Documentation/devicetree/bindings/ata/ahci-platform.txt +15 -3
index 1ac807f..78b2e80 100644
@@ -4,7 +4,9 @@ SATA nodes are defined to describe on-chip Serial ATA controllers.
 Each SATA controller should have its own node.
 
 Required properties:
-- compatible        : compatible list, contains "snps,spear-ahci"
+- compatible        : compatible list, one of "snps,spear-ahci",
+                      "snps,exynos5440-ahci", "ibm,476gtr-ahci", or
+                      "allwinner,sun4i-a10-ahci"
 - interrupts        : <interrupt mapping for SATA IRQ>
 - reg               : <registers mapping>
 
@@ -13,10 +15,20 @@ Optional properties:
 - clocks            : a list of phandle + clock specifier pairs
 - target-supply     : regulator for SATA target power
 
-Example:
+allwinner,sun4i-a10-ahci required properties:
+- clocks            : index 0 must point to the sata_ref clk, 1 to the ahb clk
+
+Examples:
         sata at ffe08000 {
 		compatible = "snps,spear-ahci";
 		reg = <0xffe08000 0x1000>;
 		interrupts = <115>;
-
         };
+
+	ahci: sata at 01c18000 {
+		compatible = "allwinner,sun4i-a10-ahci";
+		reg = <0x01c18000 0x1000>;
+		interrupts = <56>;
+		clocks = <&pll6 0>, <&ahb_gates 25>;
+		target-supply = <&reg_ahci_5v>;
+	};
drivers/ata/Kconfig +9 -0
index 4e73772..cc67cc0 100644
@@ -106,6 +106,15 @@ config AHCI_IMX
 
 	  If unsure, say N.
 
+config AHCI_SUNXI
+	tristate "Allwinner sunxi AHCI SATA support"
+	depends on ARCH_SUNXI && SATA_AHCI_PLATFORM
+	help
+	  This option enables support for the Allwinner sunxi SoC's
+	  onboard AHCI SATA.
+
+	  If unsure, say N.
+
 config SATA_FSL
 	tristate "Freescale 3.0Gbps SATA support"
 	depends on FSL_SOC
drivers/ata/Makefile +1 -0
index 46518c6..246050b 100644
@@ -11,6 +11,7 @@ obj-$(CONFIG_SATA_SIL24)	+= sata_sil24.o
 obj-$(CONFIG_SATA_DWC)		+= sata_dwc_460ex.o
 obj-$(CONFIG_SATA_HIGHBANK)	+= sata_highbank.o libahci.o
 obj-$(CONFIG_AHCI_IMX)		+= ahci_imx.o
+obj-$(CONFIG_AHCI_SUNXI)	+= ahci_sunxi.o
 
 # SFF w/ custom DMA
 obj-$(CONFIG_PDC_ADMA)		+= pdc_adma.o
drivers/ata/ahci_sunxi.c new file +251 -0

251 lines not on this page · raw message

Signature · 1 line
1.8.5.3
#17 lore raw

PATCH v5 10/14 ahci-imx: Port to library-ised ahci_platform

In reply to Hans de Goede

This avoids the ugliness of creating a nested platform device from probe.

Tested on a wandboard i.mx6 quad.

---
 .../devicetree/bindings/ata/ahci-platform.txt      |   8 +-
 drivers/ata/ahci_imx.c                             | 218 +++++++++------------
 2 files changed, 101 insertions(+), 125 deletions(-)
Documentation/devicetree/bindings/ata/ahci-platform.txt +6 -2
index 78b2e80..5be0f5b 100644
@@ -5,8 +5,8 @@ Each SATA controller should have its own node.
 
 Required properties:
 - compatible        : compatible list, one of "snps,spear-ahci",
-                      "snps,exynos5440-ahci", "ibm,476gtr-ahci", or
-                      "allwinner,sun4i-a10-ahci"
+                      "snps,exynos5440-ahci", "ibm,476gtr-ahci",
+                      "allwinner,sun4i-a10-ahci" or "fsl,imx6q-ahci"
 - interrupts        : <interrupt mapping for SATA IRQ>
 - reg               : <registers mapping>
 
@@ -18,6 +18,10 @@ Optional properties:
 allwinner,sun4i-a10-ahci required properties:
 - clocks            : index 0 must point to the sata_ref clk, 1 to the ahb clk
 
+fsl,imx6q-ahci required properties:
+- clocks            : index 0 must point to the sataf clk, 1 to the sata_ref
+		      clk and 2 to the ahb clk
+
 Examples:
         sata at ffe08000 {
 		compatible = "snps,spear-ahci";
drivers/ata/ahci_imx.c +95 -123

321 lines not on this page · raw message

Signature · 1 line
1.8.5.3
#18 lore raw

PATCH v5 11/14 ahci-imx: Add imx_ahci_phy_init / _exit helpers

In reply to Hans de Goede
---
 drivers/ata/ahci_imx.c | 142 +++++++++++++++++++++++++++----------------------
 1 file changed, 77 insertions(+), 65 deletions(-)
drivers/ata/ahci_imx.c +77 -65
index 2210866..e58e062 100644
@@ -51,6 +51,7 @@ static int ahci_imx_hotplug;
 module_param_named(hotplug, ahci_imx_hotplug, int, 0644);
 MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
 
+static void imx_ahci_phy_exit(struct ahci_host_priv *hpriv);
 static void ahci_imx_host_stop(struct ata_host *host);
 
 static void ahci_imx_error_handler(struct ata_port *ap)
@@ -78,10 +79,8 @@ static void ahci_imx_error_handler(struct ata_port *ap)
 	 */
 	reg_val = readl(mmio + PORT_PHY_CTL);
 	writel(reg_val | PORT_PHY_CTL_PDDQ_LOC, mmio + PORT_PHY_CTL);
-	regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
-			IMX6Q_GPR13_SATA_MPLL_CLK_EN,
-			!IMX6Q_GPR13_SATA_MPLL_CLK_EN);
-	ahci_platform_disable_clks(hpriv);
+
+	imx_ahci_phy_exit(hpriv);
 	imxpriv->no_device = true;
 }
 
@@ -98,40 +97,18 @@ static const struct ata_port_info ahci_imx_port_info = {
 	.port_ops	= &ahci_imx_ops,
 };
 
-static int imx_ahci_probe(struct platform_device *pdev)
+static int imx_ahci_phy_init(struct ahci_host_priv *hpriv)
 {
-	struct device *dev = &pdev->dev;
-	struct ahci_host_priv *hpriv;
-	struct imx_ahci_priv *imxpriv;
-	unsigned int reg_val;
+	struct imx_ahci_priv *imxpriv = hpriv->plat_data;
 	int rc;
 
-	imxpriv = devm_kzalloc(dev, sizeof(*imxpriv), GFP_KERNEL);
-	if (!imxpriv)
-		return -ENOMEM;
-
-	hpriv = ahci_platform_get_resources(pdev);
-	if (IS_ERR(hpriv))
-		return PTR_ERR(hpriv);
-	if (!hpriv->clks[CLK_AHB]) {
-		dev_err(dev, "no ahb clk, need sata, sata_ref and ahb clks\n");
-		rc = -ENOENT;
-		goto put_resources;
-	}
-	hpriv->plat_data = imxpriv;
-
-	imxpriv->gpr =
-		syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
-	if (IS_ERR(imxpriv->gpr)) {
-		dev_err(dev, "failed to find fsl,imx6q-iomux-gpr regmap\n");
-		rc = PTR_ERR(imxpriv->gpr);
-		goto put_resources;
-	}
+	if (imxpriv->no_device)
+		return 0;
 
 	if (hpriv->target_pwr) {
 		rc = regulator_enable(hpriv->target_pwr);
 		if (rc)
-			goto put_resources;
+			return rc;
 	}
 
 	rc = ahci_platform_enable_clks(hpriv);
@@ -144,7 +121,8 @@ static int imx_ahci_probe(struct platform_device *pdev)
 	 * is 0x07ffffff, and the other one write for setting
 	 * the mpll_clk_en.
 	 */
-	regmap_update_bits(imxpriv->gpr, 0x34, IMX6Q_GPR13_SATA_RX_EQ_VAL_MASK
+	regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13
+			, IMX6Q_GPR13_SATA_RX_EQ_VAL_MASK
 			| IMX6Q_GPR13_SATA_RX_LOS_LVL_MASK
 			| IMX6Q_GPR13_SATA_RX_DPLL_MODE_MASK
 			| IMX6Q_GPR13_SATA_SPD_MODE_MASK
@@ -162,9 +140,69 @@ static int imx_ahci_probe(struct platform_device *pdev)
 			| IMX6Q_GPR13_SATA_TX_ATTEN_9_16
 			| IMX6Q_GPR13_SATA_TX_BOOST_3_33_DB
 			| IMX6Q_GPR13_SATA_TX_LVL_1_025_V);
-	regmap_update_bits(imxpriv->gpr, 0x34, IMX6Q_GPR13_SATA_MPLL_CLK_EN,
+
+	regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
+			IMX6Q_GPR13_SATA_MPLL_CLK_EN,
 			IMX6Q_GPR13_SATA_MPLL_CLK_EN);
-	usleep_range(100, 200);
+
+	usleep_range(1000, 2000);
+	return 0;
+
+disable_regulator:
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
+	return rc;
+}
+
+static void imx_ahci_phy_exit(struct ahci_host_priv *hpriv)
+{
+	struct imx_ahci_priv *imxpriv = hpriv->plat_data;
+
+	if (imxpriv->no_device)
+		return;
+
+	regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
+			IMX6Q_GPR13_SATA_MPLL_CLK_EN,
+			!IMX6Q_GPR13_SATA_MPLL_CLK_EN);
+	ahci_platform_disable_clks(hpriv);
+
+	if (hpriv->target_pwr)
+		regulator_disable(hpriv->target_pwr);
+}
+
+static int imx_ahci_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct ahci_host_priv *hpriv;
+	struct imx_ahci_priv *imxpriv;
+	unsigned int reg_val;
+	int rc;
+
+	imxpriv = devm_kzalloc(dev, sizeof(*imxpriv), GFP_KERNEL);
+	if (!imxpriv)
+		return -ENOMEM;
+
+	hpriv = ahci_platform_get_resources(pdev);
+	if (IS_ERR(hpriv))
+		return PTR_ERR(hpriv);
+	if (!hpriv->clks[CLK_AHB]) {
+		dev_err(dev, "no ahb clk, need sata, sata_ref and ahb clks\n");
+		rc = -ENOENT;
+		goto put_resources;
+	}
+	hpriv->plat_data = imxpriv;
+
+	imxpriv->gpr =
+		syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
+	if (IS_ERR(imxpriv->gpr)) {
+		dev_err(dev, "failed to find fsl,imx6q-iomux-gpr regmap\n");
+		rc = PTR_ERR(imxpriv->gpr);
+		goto put_resources;
+	}
+
+	rc = imx_ahci_phy_init(hpriv);
+	if (rc)
+		goto put_resources;
 
 	/*
 	 * Configure the HWINIT bits of the HOST_CAP and HOST_PORTS_IMPL,
@@ -189,15 +227,12 @@ static int imx_ahci_probe(struct platform_device *pdev)
 
 	rc = ahci_platform_init_host(pdev, hpriv, &ahci_imx_port_info, 0, 0);
 	if (rc)
-		goto disable_clks;
+		goto phy_exit;
 
 	return 0;
 
-disable_clks:
-	ahci_platform_disable_clks(hpriv);
-disable_regulator:
-	if (hpriv->target_pwr)
-		regulator_disable(hpriv->target_pwr);
+phy_exit:
+	imx_ahci_phy_exit(hpriv);
 put_resources:
 	ahci_platform_put_resources(hpriv);
 	return rc;
@@ -206,18 +241,8 @@ put_resources:
 static void ahci_imx_host_stop(struct ata_host *host)
 {
 	struct ahci_host_priv *hpriv = host->private_data;
-	struct imx_ahci_priv *imxpriv = hpriv->plat_data;
-
-	if (!imxpriv->no_device) {
-		regmap_update_bits(imxpriv->gpr, 0x34,
-			IMX6Q_GPR13_SATA_MPLL_CLK_EN,
-			!IMX6Q_GPR13_SATA_MPLL_CLK_EN);
-		ahci_platform_disable_clks(hpriv);
-	}
-
-	if (hpriv->target_pwr)
-		regulator_disable(hpriv->target_pwr);
 
+	imx_ahci_phy_exit(hpriv);
 	ahci_platform_put_resources(hpriv);
 }
 
@@ -225,26 +250,13 @@ static int imx_ahci_suspend(struct device *dev)
 {
 	struct ata_host *host = dev_get_drvdata(dev);
 	struct ahci_host_priv *hpriv = host->private_data;
-	struct imx_ahci_priv *imxpriv = hpriv->plat_data;
 	int rc;
 
 	rc = ahci_platform_suspend_host(dev);
 	if (rc)
 		return rc;
 
-	/*
-	 * If no_device is set, The CLKs had been gated off in the
-	 * initialization so don't do it again here.
-	 */
-	if (!imxpriv->no_device) {
-		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
-				IMX6Q_GPR13_SATA_MPLL_CLK_EN,
-				!IMX6Q_GPR13_SATA_MPLL_CLK_EN);
-		ahci_platform_disable_clks(hpriv);
-	}
-
-	if (hpriv->target_pwr)
-		regulator_disable(hpriv->target_pwr);
+	imx_ahci_phy_exit(hpriv);
 
 	return 0;
 }
Signature · 1 line
1.8.5.3
#19 lore raw

PATCH v5 12/14 ahci-imx: Fix link not coming back up after suspend / resume

In reply to Hans de Goede

The phy needs to be re-initialized on resume for the link to properly come back up.

---
 drivers/ata/ahci_imx.c | 22 +++-------------------
 1 file changed, 3 insertions(+), 19 deletions(-)
drivers/ata/ahci_imx.c +3 -19
index e58e062..68d89fa 100644
@@ -265,27 +265,11 @@ static int imx_ahci_resume(struct device *dev)
 {
 	struct ata_host *host = dev_get_drvdata(dev);
 	struct ahci_host_priv *hpriv = host->private_data;
-	struct imx_ahci_priv *imxpriv = hpriv->plat_data;
 	int ret;
 
-	if (hpriv->target_pwr) {
-		ret = regulator_enable(hpriv->target_pwr);
-		if (ret)
-			return ret;
-	}
-
-	if (!imxpriv->no_device) {
-		ret = ahci_platform_enable_clks(hpriv);
-		if (ret < 0) {
-			dev_err(dev, "pre-enable sata_ref clock err:%d\n", ret);
-			return ret;
-		}
-
-		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
-				IMX6Q_GPR13_SATA_MPLL_CLK_EN,
-				IMX6Q_GPR13_SATA_MPLL_CLK_EN);
-		usleep_range(1000, 2000);
-	}
+	ret = imx_ahci_phy_init(hpriv);
+	if (ret)
+		return ret;
 
 	return ahci_platform_resume_host(dev);
 }
Signature · 1 line
1.8.5.3
#20 lore raw

PATCH v5 13/14 ARM: sun4i: dts: Add ahci / sata support

In reply to Hans de Goede

From: Oliver Schinagl <[email protected]>

This patch adds sunxi sata support to A10 boards that have such a connector. Some boards also feature a regulator via a GPIO and support for this is also added.

---
 arch/arm/boot/dts/sun4i-a10-a1000.dts      |  4 ++++
 arch/arm/boot/dts/sun4i-a10-cubieboard.dts |  6 +++++
 arch/arm/boot/dts/sun4i-a10.dtsi           |  8 +++++++
 arch/arm/boot/dts/sunxi-ahci-reg.dtsi      | 38 ++++++++++++++++++++++++++++++
 4 files changed, 56 insertions(+)
 create mode 100644 arch/arm/boot/dts/sunxi-ahci-reg.dtsi
arch/arm/boot/dts/sun4i-a10-a1000.dts +4 -0
index aef8207..3fb7305 100644
@@ -48,6 +48,10 @@
 			status = "okay";
 		};
 
+		ahci: sata at 01c18000 {
+			status = "okay";
+		};
+
 		pinctrl at 01c20800 {
 			mmc0_cd_pin_a1000: mmc0_cd_pin at 0 {
 				allwinner,pins = "PH1";
arch/arm/boot/dts/sun4i-a10-cubieboard.dts +6 -0
index f50fb2b..6ae1110 100644
@@ -12,6 +12,7 @@
 
 /dts-v1/;
 /include/ "sun4i-a10.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
 	model = "Cubietech Cubieboard";
@@ -51,6 +52,11 @@
 			status = "okay";
 		};
 
+		ahci: sata at 01c18000 {
+			target-supply = <&reg_ahci_5v>;
+			status = "okay";
+		};
+
 		pinctrl at 01c20800 {
 			mmc0_cd_pin_cubieboard: mmc0_cd_pin at 0 {
 				allwinner,pins = "PH1";
arch/arm/boot/dts/sun4i-a10.dtsi +8 -0
index 4736dd2..198dcda 100644
@@ -331,6 +331,14 @@
 			status = "disabled";
 		};
 
+		ahci: sata at 01c18000 {
+			compatible = "allwinner,sun4i-a10-ahci";
+			reg = <0x01c18000 0x1000>;
+			interrupts = <56>;
+			clocks = <&pll6 0>, <&ahb_gates 25>;
+			status = "disabled";
+		};
+
 		intc: interrupt-controller at 01c20400 {
 			compatible = "allwinner,sun4i-ic";
 			reg = <0x01c20400 0x400>;
arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file +38 -0
new file mode 100644
index 0000000..955b197
@@ -0,0 +1,38 @@
+/*
+ * sunxi boards sata target power supply common code
+ *
+ * Copyright 2014 - Hans de Goede <[email protected]>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/ {
+	soc at 01c00000 {
+		ahci_pwr_pin_a: ahci_pwr_pin at 0 {
+			allwinner,pins = "PB8";
+			allwinner,function = "gpio_out";
+			allwinner,drive = <0>;
+			allwinner,pull = <0>;
+		};
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		pinctrl-names = "default";
+
+		reg_ahci_5v: ahci-5v {
+			compatible = "regulator-fixed";
+			regulator-name = "ahci-5v";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			pinctrl-0 = <&ahci_pwr_pin_a>;
+			gpio = <&pio 1 8 0>;
+			enable-active-high;
+		};
+	};
+};
Signature · 1 line
1.8.5.3
#21 lore raw

PATCH v5 13/14 ARM: sun4i: dts: Add ahci / sata support

Hi,

Quoted 61 lines · Hans de Goede

From: Oliver Schinagl <[email protected]>

This patch adds sunxi sata support to A10 boards that have such a connector. Some boards also feature a regulator via a GPIO and support for this is also added.

---
 arch/arm/boot/dts/sun4i-a10-a1000.dts      |  4 ++++
 arch/arm/boot/dts/sun4i-a10-cubieboard.dts |  6 +++++
 arch/arm/boot/dts/sun4i-a10.dtsi           |  8 +++++++
 arch/arm/boot/dts/sunxi-ahci-reg.dtsi      | 38 ++++++++++++++++++++++++++++++
 4 files changed, 56 insertions(+)
 create mode 100644 arch/arm/boot/dts/sunxi-ahci-reg.dtsi
arch/arm/boot/dts/sun4i-a10-a1000.dts +4 -0
index aef8207..3fb7305 100644
@@ -48,6 +48,10 @@
                        status = "okay";
                };
 
+               ahci: sata at 01c18000 {
+                       status = "okay";
+               };
+
                pinctrl at 01c20800 {
                        mmc0_cd_pin_a1000: mmc0_cd_pin at 0 {
                                allwinner,pins = "PH1";
arch/arm/boot/dts/sun4i-a10-cubieboard.dts +6 -0
index f50fb2b..6ae1110 100644
@@ -12,6 +12,7 @@
 
 /dts-v1/;
 /include/ "sun4i-a10.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
        model = "Cubietech Cubieboard";
@@ -51,6 +52,11 @@
                        status = "okay";
                };
 
+               ahci: sata at 01c18000 {
+                       target-supply = <&reg_ahci_5v>;
+                       status = "okay";
+               };
+
                pinctrl at 01c20800 {
                        mmc0_cd_pin_cubieboard: mmc0_cd_pin at 0 {
                                allwinner,pins = "PH1";
arch/arm/boot/dts/sun4i-a10.dtsi +0 -0
index 4736dd2..198dcda 100644
@@ -331,6 +331,14 @@
                        status = "disabled";

arch/arm/boot/dts/sun4i-a10.dtsi line 341

Quoted 10 lines
arch/arm/boot/dts/sun4i-a10.dtsi +8 -0
                };
 
+               ahci: sata at 01c18000 {
+                       compatible = "allwinner,sun4i-a10-ahci";
+                       reg = <0x01c18000 0x1000>;
+                       interrupts = <56>;
+                       clocks = <&pll6 0>, <&ahb_gates 25>;
+                       status = "disabled";
+               };
+

Consider adding

    pinctrl-names = "default";

in the ahci node to suppress "default pin state not found" warnings. Same goes for sun7i-a20.dtsi.

Quoted 14 lines
arch/arm/boot/dts/sun4i-a10.dtsi +0 -0
                intc: interrupt-controller at 01c20400 {
                        compatible = "allwinner,sun4i-ic";
                        reg = <0x01c20400 0x400>;
arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file +5 -0
new file mode 100644
index 0000000..955b197
@@ -0,0 +1,38 @@
+/*
+ * sunxi boards sata target power supply common code
+ *
+ * Copyright 2014 - Hans de Goede <[email protected]>
+ *

arch/arm/boot/dts/sunxi-ahci-reg.dtsi line 15

Quoted 10 lines
arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file +10 -0
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/ {
+       soc at 01c00000 {

This block needs to be under

    pinctrl at 01c20800 {

arch/arm/boot/dts/sunxi-ahci-reg.dtsi line 21

Quoted 6 lines
arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file +6 -0
+               ahci_pwr_pin_a: ahci_pwr_pin at 0 {
+                       allwinner,pins = "PB8";
+                       allwinner,function = "gpio_out";
+                       allwinner,drive = <0>;
+                       allwinner,pull = <0>;
+               };
    };
Quoted 18 lines
arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file +17 -1
+       };
+
+       regulators {
+               compatible = "simple-bus";
+               pinctrl-names = "default";
+
+               reg_ahci_5v: ahci-5v {
+                       compatible = "regulator-fixed";
+                       regulator-name = "ahci-5v";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       pinctrl-0 = <&ahci_pwr_pin_a>;
+                       gpio = <&pio 1 8 0>;
+                       enable-active-high;
+               };
+       };
+};
--
Quoted 2 lines

1.8.5.3

Great work! Thanks!

ChenYu

#22 lore raw

PATCH v5 13/14 ARM: sun4i: dts: Add ahci / sata support

Hi,

Quoted 77 lines · Chen-Yu Tsai

Hi,

Quoted 61 lines · Hans de Goede

From: Oliver Schinagl <[email protected]>

This patch adds sunxi sata support to A10 boards that have such a connector. Some boards also feature a regulator via a GPIO and support for this is also added.

---
  arch/arm/boot/dts/sun4i-a10-a1000.dts      |  4 ++++
  arch/arm/boot/dts/sun4i-a10-cubieboard.dts |  6 +++++
  arch/arm/boot/dts/sun4i-a10.dtsi           |  8 +++++++
  arch/arm/boot/dts/sunxi-ahci-reg.dtsi      | 38 ++++++++++++++++++++++++++++++
  4 files changed, 56 insertions(+)

create mode 100644 arch/arm/boot/dts/sunxi-ahci-reg.dtsi

arch/arm/boot/dts/sun4i-a10-a1000.dts +4 -0
index aef8207..3fb7305 100644
@@ -48,6 +48,10 @@
                         status = "okay";
                 };
 
+               ahci: sata at 01c18000 {
+                       status = "okay";
+               };
+
                 pinctrl at 01c20800 {
                         mmc0_cd_pin_a1000: mmc0_cd_pin at 0 {
                                 allwinner,pins = "PH1";
arch/arm/boot/dts/sun4i-a10-cubieboard.dts +6 -0
index f50fb2b..6ae1110 100644
@@ -12,6 +12,7 @@
 
  /dts-v1/;
  /include/ "sun4i-a10.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
  / {
         model = "Cubietech Cubieboard";
@@ -51,6 +52,11 @@
                         status = "okay";
                 };
 
+               ahci: sata at 01c18000 {
+                       target-supply = <&reg_ahci_5v>;
+                       status = "okay";
+               };
+
                 pinctrl at 01c20800 {
                         mmc0_cd_pin_cubieboard: mmc0_cd_pin at 0 {
                                 allwinner,pins = "PH1";
arch/arm/boot/dts/sun4i-a10.dtsi +0 -0
index 4736dd2..198dcda 100644
@@ -331,6 +331,14 @@
                         status = "disabled";

arch/arm/boot/dts/sun4i-a10.dtsi line 341

Quoted 10 lines
arch/arm/boot/dts/sun4i-a10.dtsi +8 -0
                 };
 
+               ahci: sata at 01c18000 {
+                       compatible = "allwinner,sun4i-a10-ahci";
+                       reg = <0x01c18000 0x1000>;
+                       interrupts = <56>;
+                       clocks = <&pll6 0>, <&ahb_gates 25>;
+                       status = "disabled";
+               };
+

Consider adding

Quoted 4 lines
     pinctrl-names = "default";

in the ahci node to suppress "default pin state not found" warnings. Same goes for sun7i-a20.dtsi.

ahci does not use pinctrl, the ahci (and usb) phys have dedicated pins, since they don't use pinctrl at all no such warnings are issued.

Quoted 30 lines
Quoted 15 lines
arch/arm/boot/dts/sun4i-a10.dtsi +0 -0
                 intc: interrupt-controller at 01c20400 {
                         compatible = "allwinner,sun4i-ic";
                         reg = <0x01c20400 0x400>;
arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file +5 -0
new file mode 100644
index 0000000..955b197
@@ -0,0 +1,38 @@
+/*
+ * sunxi boards sata target power supply common code
+ *
+ * Copyright 2014 - Hans de Goede <[email protected]>
+ *

arch/arm/boot/dts/sunxi-ahci-reg.dtsi line 15

Quoted 10 lines
arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file +10 -0
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/ {
+       soc at 01c00000 {

This block needs to be under

     pinctrl at 01c20800 {
Quoted 8 lines

arch/arm/boot/dts/sunxi-ahci-reg.dtsi line 21

Quoted 6 lines
arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file +6 -0
+               ahci_pwr_pin_a: ahci_pwr_pin at 0 {
+                       allwinner,pins = "PB8";
+                       allwinner,function = "gpio_out";
+                       allwinner,drive = <0>;
+                       allwinner,pull = <0>;
+               };
     };

You're completely right, fixed in my local tree.

Regards,

Hans

#23 lore raw

PATCH v5 13/14 ARM: sun4i: dts: Add ahci / sata support

In reply to Hans de Goede

Hi Hans,

Quoted 6 lines · Hans de Goede

From: Oliver Schinagl <[email protected]>

This patch adds sunxi sata support to A10 boards that have such a connector. Some boards also feature a regulator via a GPIO and support for this is also added.

Quoted 7 lines
---
 arch/arm/boot/dts/sun4i-a10-a1000.dts      |  4 ++++
 arch/arm/boot/dts/sun4i-a10-cubieboard.dts |  6 +++++
 arch/arm/boot/dts/sun4i-a10.dtsi           |  8 +++++++
 arch/arm/boot/dts/sunxi-ahci-reg.dtsi      | 38 ++++++++++++++++++++++++++++++

I'm still half convinced about this at the moment, given the number of platforms we support, we can always change it back if things become too messy.

Quoted 47 lines
 4 files changed, 56 insertions(+)
 create mode 100644 arch/arm/boot/dts/sunxi-ahci-reg.dtsi
arch/arm/boot/dts/sun4i-a10-a1000.dts +4 -0
index aef8207..3fb7305 100644
@@ -48,6 +48,10 @@
 			status = "okay";
 		};
 
+		ahci: sata at 01c18000 {
+			status = "okay";
+		};
+
 		pinctrl at 01c20800 {
 			mmc0_cd_pin_a1000: mmc0_cd_pin at 0 {
 				allwinner,pins = "PH1";
arch/arm/boot/dts/sun4i-a10-cubieboard.dts +6 -0
index f50fb2b..6ae1110 100644
@@ -12,6 +12,7 @@
 
 /dts-v1/;
 /include/ "sun4i-a10.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
 	model = "Cubietech Cubieboard";
@@ -51,6 +52,11 @@
 			status = "okay";
 		};
 
+		ahci: sata at 01c18000 {
+			target-supply = <&reg_ahci_5v>;
+			status = "okay";
+		};
+
 		pinctrl at 01c20800 {
 			mmc0_cd_pin_cubieboard: mmc0_cd_pin at 0 {
 				allwinner,pins = "PH1";
arch/arm/boot/dts/sun4i-a10.dtsi +0 -0
index 4736dd2..198dcda 100644

arch/arm/boot/dts/sun4i-a10.dtsi line 335

Quoted 5 lines
arch/arm/boot/dts/sun4i-a10.dtsi +2 -0
@@ -331,6 +331,14 @@
 			status = "disabled";
 		};
 
+		ahci: sata at 01c18000 {
+			compatible = "allwinner,sun4i-a10-ahci";

To be consistent with the rest of the sun4i devices compatible, It should be sun4i-ahci.

However, since these devices don't use the same compatible pattern as their own machine compatible, and are consisent with the rest of the compatibles for the other SoCs, we can probably make this a go to transition progressively to this pattern.

I'll cook up some patches for the other devices.

Quoted 26 lines
arch/arm/boot/dts/sun4i-a10.dtsi +6 -0
+			reg = <0x01c18000 0x1000>;
+			interrupts = <56>;
+			clocks = <&pll6 0>, <&ahb_gates 25>;
+			status = "disabled";
+		};
+
 		intc: interrupt-controller at 01c20400 {
 			compatible = "allwinner,sun4i-ic";
 			reg = <0x01c20400 0x400>;
arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file +11 -0
new file mode 100644
index 0000000..955b197
@@ -0,0 +1,38 @@
+/*
+ * sunxi boards sata target power supply common code
+ *
+ * Copyright 2014 - Hans de Goede <[email protected]>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html

arch/arm/boot/dts/sunxi-ahci-reg.dtsi line 21

Quoted 10 lines
arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file +10 -0
+ */
+
+/ {
+	soc at 01c00000 {
+		ahci_pwr_pin_a: ahci_pwr_pin at 0 {
+			allwinner,pins = "PB8";
+			allwinner,function = "gpio_out";
+			allwinner,drive = <0>;
+			allwinner,pull = <0>;
+		};

This should be under the pinctrl node.

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#24 lore raw

PATCH v5 13/14 ARM: sun4i: dts: Add ahci / sata support

Hi,

Quoted 17 lines · Maxime Ripard

Hi Hans,

Quoted 6 lines · Hans de Goede

From: Oliver Schinagl <[email protected]>

This patch adds sunxi sata support to A10 boards that have such a connector. Some boards also feature a regulator via a GPIO and support for this is also added.

Quoted 7 lines
---
  arch/arm/boot/dts/sun4i-a10-a1000.dts      |  4 ++++
  arch/arm/boot/dts/sun4i-a10-cubieboard.dts |  6 +++++
  arch/arm/boot/dts/sun4i-a10.dtsi           |  8 +++++++
  arch/arm/boot/dts/sunxi-ahci-reg.dtsi      | 38 ++++++++++++++++++++++++++++++
Quoted 2 lines

I'm still half convinced about this at the moment, given the number of platforms we support, we can always change it back if things become too messy.

I assume that this == sunxi-ahci-reg.dtsi ? To be sure I understand you correctly, you're ok with going this route for now, right ?

How about the same for the usb ohci/ehci controller dts patches ? Currently they are still using the put a regulator node in each dts file model, which leads to a lot of boilerplate code. So I would like to move to the same model as I'm using here for the sata supply.

Quoted 57 lines
Quoted 48 lines
  4 files changed, 56 insertions(+)

create mode 100644 arch/arm/boot/dts/sunxi-ahci-reg.dtsi

arch/arm/boot/dts/sun4i-a10-a1000.dts +4 -0
index aef8207..3fb7305 100644
@@ -48,6 +48,10 @@
  			status = "okay";
  		};
 
+		ahci: sata at 01c18000 {
+			status = "okay";
+		};
+
  		pinctrl at 01c20800 {
  			mmc0_cd_pin_a1000: mmc0_cd_pin at 0 {
  				allwinner,pins = "PH1";
arch/arm/boot/dts/sun4i-a10-cubieboard.dts +6 -0
index f50fb2b..6ae1110 100644
@@ -12,6 +12,7 @@
 
  /dts-v1/;
  /include/ "sun4i-a10.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
  / {
  	model = "Cubietech Cubieboard";
@@ -51,6 +52,11 @@
  			status = "okay";
  		};
 
+		ahci: sata at 01c18000 {
+			target-supply = <&reg_ahci_5v>;
+			status = "okay";
+		};
+
  		pinctrl at 01c20800 {
  			mmc0_cd_pin_cubieboard: mmc0_cd_pin at 0 {
  				allwinner,pins = "PH1";
arch/arm/boot/dts/sun4i-a10.dtsi +0 -0
index 4736dd2..198dcda 100644

arch/arm/boot/dts/sun4i-a10.dtsi line 335

Quoted 5 lines
arch/arm/boot/dts/sun4i-a10.dtsi +2 -0
@@ -331,6 +331,14 @@
  			status = "disabled";
  		};
 
+		ahci: sata at 01c18000 {
+			compatible = "allwinner,sun4i-a10-ahci";

To be consistent with the rest of the sun4i devices compatible, It should be sun4i-ahci.

Quoted 4 lines

However, since these devices don't use the same compatible pattern as their own machine compatible, and are consisent with the rest of the compatibles for the other SoCs, we can probably make this a go to transition progressively to this pattern.

Ack, I think it would be good to be consistent and try to use sun?i-aXX-foo everywhere. I noticed that we already use that in various places, so I thought it would be good to do that for all new dts bindings.

Quoted 1 line

I'll cook up some patches for the other devices.

Thanks.

Quoted 31 lines
Quoted 31 lines
arch/arm/boot/dts/sun4i-a10.dtsi +6 -0
+			reg = <0x01c18000 0x1000>;
+			interrupts = <56>;
+			clocks = <&pll6 0>, <&ahb_gates 25>;
+			status = "disabled";
+		};
+
  		intc: interrupt-controller at 01c20400 {
  			compatible = "allwinner,sun4i-ic";
  			reg = <0x01c20400 0x400>;
arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file +15 -0
new file mode 100644
index 0000000..955b197
@@ -0,0 +1,38 @@
+/*
+ * sunxi boards sata target power supply common code
+ *
+ * Copyright 2014 - Hans de Goede <[email protected]>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/ {
+	soc at 01c00000 {
Quoted 8 lines

arch/arm/boot/dts/sunxi-ahci-reg.dtsi line 21

Quoted 6 lines
arch/arm/boot/dts/sunxi-ahci-reg.dtsi new file +6 -0
+		ahci_pwr_pin_a: ahci_pwr_pin at 0 {
+			allwinner,pins = "PB8";
+			allwinner,function = "gpio_out";
+			allwinner,drive = <0>;
+			allwinner,pull = <0>;
+		};

This should be under the pinctrl node.

Fixed already locally.

Regards,

Hans

#25 lore raw

PATCH v5 13/14 ARM: sun4i: dts: Add ahci / sata support

Quoted 20 lines · Hans de Goede

Hi,

Quoted 17 lines · Maxime Ripard

Hi Hans,

Quoted 13 lines · Hans de Goede

From: Oliver Schinagl <[email protected]>

This patch adds sunxi sata support to A10 boards that have such a connector. Some boards also feature a regulator via a GPIO and support for this is also added.

---
 arch/arm/boot/dts/sun4i-a10-a1000.dts      |  4 ++++
 arch/arm/boot/dts/sun4i-a10-cubieboard.dts |  6 +++++
 arch/arm/boot/dts/sun4i-a10.dtsi           |  8 +++++++
 arch/arm/boot/dts/sunxi-ahci-reg.dtsi      | 38 ++++++++++++++++++++++++++++++
Quoted 5 lines
Quoted 2 lines

I'm still half convinced about this at the moment, given the number of platforms we support, we can always change it back if things become too messy.

I assume that this == sunxi-ahci-reg.dtsi ? To be sure I understand you correctly, you're ok with going this route for now, right ?

Yep.

Quoted 4 lines

How about the same for the usb ohci/ehci controller dts patches ? Currently they are still using the put a regulator node in each dts file model, which leads to a lot of boilerplate code. So I would like to move to the same model as I'm using here for the sata supply.

That would make sense too.

Quoted 56 lines
Quoted 56 lines
Quoted 47 lines
 4 files changed, 56 insertions(+)
 create mode 100644 arch/arm/boot/dts/sunxi-ahci-reg.dtsi
arch/arm/boot/dts/sun4i-a10-a1000.dts +4 -0
index aef8207..3fb7305 100644
@@ -48,6 +48,10 @@
 			status = "okay";
 		};
 
+		ahci: sata at 01c18000 {
+			status = "okay";
+		};
+
 		pinctrl at 01c20800 {
 			mmc0_cd_pin_a1000: mmc0_cd_pin at 0 {
 				allwinner,pins = "PH1";
arch/arm/boot/dts/sun4i-a10-cubieboard.dts +6 -0
index f50fb2b..6ae1110 100644
@@ -12,6 +12,7 @@
 
 /dts-v1/;
 /include/ "sun4i-a10.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
 	model = "Cubietech Cubieboard";
@@ -51,6 +52,11 @@
 			status = "okay";
 		};
 
+		ahci: sata at 01c18000 {
+			target-supply = <&reg_ahci_5v>;
+			status = "okay";
+		};
+
 		pinctrl at 01c20800 {
 			mmc0_cd_pin_cubieboard: mmc0_cd_pin at 0 {
 				allwinner,pins = "PH1";
arch/arm/boot/dts/sun4i-a10.dtsi +0 -0
index 4736dd2..198dcda 100644

arch/arm/boot/dts/sun4i-a10.dtsi line 335

Quoted 5 lines
arch/arm/boot/dts/sun4i-a10.dtsi +2 -0
@@ -331,6 +331,14 @@
 			status = "disabled";
 		};
 
+		ahci: sata at 01c18000 {
+			compatible = "allwinner,sun4i-a10-ahci";

To be consistent with the rest of the sun4i devices compatible, It should be sun4i-ahci.

Quoted 8 lines
Quoted 4 lines

However, since these devices don't use the same compatible pattern as their own machine compatible, and are consisent with the rest of the compatibles for the other SoCs, we can probably make this a go to transition progressively to this pattern.

Ack, I think it would be good to be consistent and try to use sun?i-aXX-foo everywhere. I noticed that we already use that in various places, so I thought it would be good to do that for all new dts bindings.

Yes, that's my plan.

Quoted 3 lines
Quoted 1 line

I'll cook up some patches for the other devices.

Thanks.

And I sent them on sunday.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#26 lore raw

PATCH v5 14/14 ARM: sun7i: dts: Add ahci / sata support

In reply to Hans de Goede

This patch adds sunxi sata support to A20 boards that have such a connector. Some boards also feature a regulator via a GPIO and support for this is also added.

---
 arch/arm/boot/dts/sun7i-a20-cubieboard2.dts     |  6 ++++++
 arch/arm/boot/dts/sun7i-a20-cubietruck.dts      | 20 ++++++++++++++++++++
 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts |  6 ++++++
 arch/arm/boot/dts/sun7i-a20.dtsi                |  8 ++++++++
 4 files changed, 40 insertions(+)
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +6 -0
index 48777cd..1cab521 100644
@@ -13,6 +13,7 @@
 
 /dts-v1/;
 /include/ "sun7i-a20.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
 	model = "Cubietech Cubieboard2";
@@ -28,6 +29,11 @@
 			status = "okay";
 		};
 
+		ahci: sata at 01c18000 {
+			target-supply = <&reg_ahci_5v>;
+			status = "okay";
+		};
+
 		pinctrl at 01c20800 {
 			mmc0_cd_pin_cubieboard2: mmc0_cd_pin at 0 {
 				allwinner,pins = "PH1";
arch/arm/boot/dts/sun7i-a20-cubietruck.dts +20 -0
index 2684f27..1247ea1 100644
@@ -13,6 +13,7 @@
 
 /dts-v1/;
 /include/ "sun7i-a20.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
 	model = "Cubietech Cubietruck";
@@ -28,6 +29,11 @@
 			status = "okay";
 		};
 
+		ahci: sata at 01c18000 {
+			target-supply = <&reg_ahci_5v>;
+			status = "okay";
+		};
+
 		pinctrl at 01c20800 {
 			mmc0_cd_pin_cubietruck: mmc0_cd_pin at 0 {
 				allwinner,pins = "PH1";
@@ -36,6 +42,13 @@
 				allwinner,pull = <0>;
 			};
 
+			ahci_pwr_pin_cubietruck: ahci_pwr_pin at 1 {
+				allwinner,pins = "PH12";
+				allwinner,function = "gpio_out";
+				allwinner,drive = <0>;
+				allwinner,pull = <0>;
+			};
+
 			led_pins_cubietruck: led_pins at 0 {
 				allwinner,pins = "PH7", "PH11", "PH20", "PH21";
 				allwinner,function = "gpio_out";
@@ -84,4 +97,11 @@
 			gpios = <&pio 7 7 0>;
 		};
 	};
+
+	regulators {
+		reg_ahci_5v: ahci-5v {
+			pinctrl-0 = <&ahci_pwr_pin_cubietruck>;
+			gpio = <&pio 7 12 0>;
+		};
+	};
 };
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +6 -0
index bf6f6c8..f135886 100644
@@ -13,6 +13,7 @@
 
 /dts-v1/;
 /include/ "sun7i-a20.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
 	model = "Olimex A20-Olinuxino Micro";
@@ -37,6 +38,11 @@
 			status = "okay";
 		};
 
+		ahci: sata at 01c18000 {
+			target-supply = <&reg_ahci_5v>;
+			status = "okay";
+		};
+
 		pinctrl at 01c20800 {
 			mmc0_cd_pin_olinuxinom: mmc0_cd_pin at 0 {
 				allwinner,pins = "PH1";
arch/arm/boot/dts/sun7i-a20.dtsi +8 -0
index c9c123a..0657bad 100644
@@ -347,6 +347,14 @@
 			status = "disabled";
 		};
 
+		ahci: sata at 01c18000 {
+			compatible = "allwinner,sun4i-a10-ahci";
+			reg = <0x01c18000 0x1000>;
+			interrupts = <0 56 1>;
+			clocks = <&pll6 0>, <&ahb_gates 25>;
+			status = "disabled";
+		};
+
 		pio: pinctrl at 01c20800 {
 			compatible = "allwinner,sun7i-a20-pinctrl";
 			reg = <0x01c20800 0x400>;
Signature · 1 line
1.8.5.3
#27 lore raw

PATCH v5 14/14 ARM: sun7i: dts: Add ahci / sata support

Quoted 116 lines · Hans de Goede

This patch adds sunxi sata support to A20 boards that have such a connector. Some boards also feature a regulator via a GPIO and support for this is also added.

---
 arch/arm/boot/dts/sun7i-a20-cubieboard2.dts     |  6 ++++++
 arch/arm/boot/dts/sun7i-a20-cubietruck.dts      | 20 ++++++++++++++++++++
 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts |  6 ++++++
 arch/arm/boot/dts/sun7i-a20.dtsi                |  8 ++++++++
 4 files changed, 40 insertions(+)
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +6 -0
index 48777cd..1cab521 100644
@@ -13,6 +13,7 @@
 
 /dts-v1/;
 /include/ "sun7i-a20.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
 	model = "Cubietech Cubieboard2";
@@ -28,6 +29,11 @@
 			status = "okay";
 		};
 
+		ahci: sata at 01c18000 {
+			target-supply = <&reg_ahci_5v>;
+			status = "okay";
+		};
+
 		pinctrl at 01c20800 {
 			mmc0_cd_pin_cubieboard2: mmc0_cd_pin at 0 {
 				allwinner,pins = "PH1";
arch/arm/boot/dts/sun7i-a20-cubietruck.dts +20 -0
index 2684f27..1247ea1 100644
@@ -13,6 +13,7 @@
 
 /dts-v1/;
 /include/ "sun7i-a20.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
 	model = "Cubietech Cubietruck";
@@ -28,6 +29,11 @@
 			status = "okay";
 		};
 
+		ahci: sata at 01c18000 {
+			target-supply = <&reg_ahci_5v>;
+			status = "okay";
+		};
+
 		pinctrl at 01c20800 {
 			mmc0_cd_pin_cubietruck: mmc0_cd_pin at 0 {
 				allwinner,pins = "PH1";
@@ -36,6 +42,13 @@
 				allwinner,pull = <0>;
 			};
 
+			ahci_pwr_pin_cubietruck: ahci_pwr_pin at 1 {
+				allwinner,pins = "PH12";
+				allwinner,function = "gpio_out";
+				allwinner,drive = <0>;
+				allwinner,pull = <0>;
+			};
+
 			led_pins_cubietruck: led_pins at 0 {
 				allwinner,pins = "PH7", "PH11", "PH20", "PH21";
 				allwinner,function = "gpio_out";
@@ -84,4 +97,11 @@
 			gpios = <&pio 7 7 0>;
 		};
 	};
+
+	regulators {
+		reg_ahci_5v: ahci-5v {
+			pinctrl-0 = <&ahci_pwr_pin_cubietruck>;
+			gpio = <&pio 7 12 0>;
+		};
+	};
 };
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +6 -0
index bf6f6c8..f135886 100644
@@ -13,6 +13,7 @@
 
 /dts-v1/;
 /include/ "sun7i-a20.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
 	model = "Olimex A20-Olinuxino Micro";
@@ -37,6 +38,11 @@
 			status = "okay";
 		};
 
+		ahci: sata at 01c18000 {
+			target-supply = <&reg_ahci_5v>;
+			status = "okay";
+		};
+
 		pinctrl at 01c20800 {
 			mmc0_cd_pin_olinuxinom: mmc0_cd_pin at 0 {
 				allwinner,pins = "PH1";
arch/arm/boot/dts/sun7i-a20.dtsi +0 -0
index c9c123a..0657bad 100644

arch/arm/boot/dts/sun7i-a20.dtsi line 353

Quoted 7 lines
arch/arm/boot/dts/sun7i-a20.dtsi +4 -0
@@ -347,6 +347,14 @@
 			status = "disabled";
 		};
 
+		ahci: sata at 01c18000 {
+			compatible = "allwinner,sun4i-a10-ahci";
+			reg = <0x01c18000 0x1000>;
+			interrupts = <0 56 1>;

This is supposed to be a level triggered interrupt, not an edge triggered one.

Thanks for your work!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#28 lore raw

PATCH v5 14/14 ARM: sun7i: dts: Add ahci / sata support

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hi,

Quoted 24 lines · Maxime Ripard
Quoted 23 lines · Hans de Goede

This patch adds sunxi sata support to A20 boards that have such a connector. Some boards also feature a regulator via a GPIO and support for this is also added.

arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 48777cd..1cab521 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -13,6 +13,7 @@ renamed from arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +0 -0

/dts-v1/; /include/ "sun7i-a20.dtsi" +/include/ "sunxi-ahci-reg.dtsi"

/ { model = "Cubietech Cubieboard2"; @@ -28,6 +29,11 @@ status = "okay"; };

arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 48777cd..1cab521 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -13,6 +13,7 @@ renamed from arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +1 -0
+		ahci: sata at 01c18000 { +			target-supply = <&reg_ahci_5v>; +			status = "okay"; +		}; + pinctrl at 01c20800 { mmc0_cd_pin_cubieboard2: mmc0_cd_pin at 0 { allwinner,pins = "PH1"; diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts index 2684f27..1247ea1 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts @@ -13,6 +13,7 @@

/dts-v1/; /include/ "sun7i-a20.dtsi" +/include/ "sunxi-ahci-reg.dtsi"

/ { model = "Cubietech Cubietruck"; @@ -28,6 +29,11 @@ status = "okay"; };

arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 48777cd..1cab521 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -13,6 +13,7 @@ renamed from arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +2 -0
+		ahci: sata at 01c18000 { +			target-supply = <&reg_ahci_5v>; +			status = "okay"; +		}; + pinctrl at 01c20800 { mmc0_cd_pin_cubietruck: mmc0_cd_pin at 0 { allwinner,pins = "PH1"; @@ -36,6 +42,13 @@ allwinner,pull = <0>; };
 
+			ahci_pwr_pin_cubietruck: ahci_pwr_pin at 1 { +				allwinner,pins = "PH12"; +				allwinner,function = "gpio_out"; +				allwinner,drive = <0>; +				allwinner,pull = <0>; +			}; + led_pins_cubietruck: led_pins at 0 { allwinner,pins = "PH7", "PH11", "PH20", "PH21"; allwinner,function = "gpio_out"; @@ -84,4 +97,11 @@ gpios = <&pio 7 7 0>; }; }; + +	regulators { +		reg_ahci_5v: ahci-5v { +			pinctrl-0 = <&ahci_pwr_pin_cubietruck>; +			gpio = <&pio 7 12 0>; +		}; +	}; }; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts index

bf6f6c8..f135886 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts @@ -13,6 +13,7 @@

/dts-v1/; /include/ "sun7i-a20.dtsi" +/include/ "sunxi-ahci-reg.dtsi"

Quoted 7 lines

arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 48777cd..1cab521 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -13,6 +13,7 @@

Quoted 5 lines

/ { model = "Olimex A20-Olinuxino Micro"; @@ -37,6 +38,11 @@ status = "okay"; };

arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 48777cd..1cab521 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -13,6 +13,7 @@ renamed from arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +2 -0
+		ahci: sata at 01c18000 { +			target-supply = <&reg_ahci_5v>; +			status = "okay"; +		}; + pinctrl at 01c20800 { mmc0_cd_pin_olinuxinom: mmc0_cd_pin at 0 { allwinner,pins = "PH1"; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index c9c123a..0657bad 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -347,6 +347,14 @@ status = "disabled"; };
 
+		ahci: sata at 01c18000 { +			compatible = "allwinner,sun4i-a10-ahci"; +			reg = <0x01c18000 0x1000>; +			interrupts = <0 56 1>;

This is supposed to be a level triggered interrupt, not an edge triggered one.

Good catch, will fix for the next version.

Regards,

Hans
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#29 lore raw

v5 cover ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

In reply to Hans de Goede

Hello,

Quoted 3 lines · Hans de Goede

Here is v4 of my patchset for adding ahci-sunxi support. It has grown quite a bit since I've been going for a more generic approach this time and I've also cleaned up the ahci-imx driver to use the same generic approach.

On top of which tree were these patches generated? They don't apply to 3.14-rc1.

Thanks.

Signature · 1 line
tejun
#30 lore raw

v5 cover ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

Hi,

Quoted 9 lines · Tejun Heo

Hello,

Quoted 3 lines · Hans de Goede

Here is v4 of my patchset for adding ahci-sunxi support. It has grown quite a bit since I've been going for a more generic approach this time and I've also cleaned up the ahci-imx driver to use the same generic approach.

On top of which tree were these patches generated? They don't apply to 3.14-rc1.

They are on top of 3.13, I'll rebase them, address Maxime's review of the dts bits and send a new version sometime during the next couple of days.

Thanks,

Hans