Enable SION Bit for GPIO16 when ALT2 mode is selected

PATCH New Andy Ng 5 participants 20 messages Jan 19, 2014 – Feb 12, 2014 2 messages not in the archive Arm (32-bit)

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Andy Ng

author

2014-01-19 14:34 UTC #0 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

The ENET_REF_CLK has to loopback: the patch was produced from u-boot 2013-10

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
index 7851eb1..9c18847 100644

arch/arm/include/asm/arch-mx6/mx6dl_pins.h +0 -0

@@ -1047,7 +1047,7 @@ MX6_PAD_DECL(GPIO_1__USDHC1_CD            , 0x05E0,

0x0210, 6, 0x0000, 0, 0)
MX6_PAD_DECL(GPIO_1__SRC_TESTER_ACK , 0x05E0, 0x0210, 7,
0x0000, 0, 0)
MX6_PAD_DECL(GPIO_16__ESAI1_TX3_RX2 , 0x05E4, 0x0214, 0,
0x0850, 1, 0)
MX6_PAD_DECL(GPIO_16__ENET_1588_EVENT2_IN , 0x05E4, 0x0214, 1,
0x0000, 0, 0)
-MX6_PAD_DECL(GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT , 0x05E4, 0x0214,
2, 0x080C, 0, 0)
+MX6_PAD_DECL(GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT , 0x05E4, 0x0214, 2
| IOMUX_CONFIG_SION, 0x080C, 0, 0)
MX6_PAD_DECL(GPIO_16__USDHC1_LCTL , 0x05E4, 0x0214, 3,
0x0000, 0, 0)
MX6_PAD_DECL(GPIO_16__SPDIF_IN1 , 0x05E4, 0x0214, 4,
0x08F0, 2, 0)
MX6_PAD_DECL(GPIO_16__GPIO_7_11 , 0x05E4, 0x0214, 5,
0x0000, 0, 0)

Otavio Salvador

2014-01-19 16:58 UTC #1 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Quoted 1 line · Andy Ng

The ENET_REF_CLK has to loopback: the patch was produced from u-boot 2013-10

Please:

- Add Signed-off-by
- Rebase it to imx/master as this does not apply in current source code.

Signature · 3 lines

Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750

Otavio Salvador

2014-01-19 17:07 UTC #2 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Andy,

Quoted 5 lines · Otavio Salvador

Quoted 1 line · Andy Ng
The ENET_REF_CLK has to loopback: the patch was produced from u-boot 2013-10
Please:

Quoted 7 lines

- Add Signed-off-by
- Rebase it to imx/master as this does not apply in current source code.
--
Otavio Salvador O.S. Systems
http://www.ossystems.com.br http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854 Mobile: +1 (347) 903-9750

This fixed one customer board I have as well.

I tested it using today's master tip.

Please change Q variant as well, rebased patch bellow:

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
index 55cc9ad..3f41787 100644

arch/arm/include/asm/arch-mx6/mx6dl_pins.h +0 -0

@@ -695,7 +695,7 @@ MX6_PAD_DECL(GPIO_1__GPIO1_IO01,    0x05E0,

0x0210, 5, 0x0000, 0, 0)
MX6_PAD_DECL(GPIO_1__SD1_CD_B, 0x05E0, 0x0210, 6, 0x0000, 0, 0)
MX6_PAD_DECL(GPIO_16__ESAI_TX3_RX2, 0x05E4, 0x0214, 0, 0x0850, 1, 0)
MX6_PAD_DECL(GPIO_16__ENET_1588_EVENT2_IN, 0x05E4, 0x0214, 1, 0x0000, 0, 0)
-MX6_PAD_DECL(GPIO_16__ENET_REF_CLK, 0x05E4, 0x0214, 2, 0x080C, 0, 0)
+MX6_PAD_DECL(GPIO_16__ENET_REF_CLK, 0x05E4, 0x0214, 2 |
IOMUX_CONFIG_SION, 0x080C, 0, 0)

 MX6_PAD_DECL(GPIO_16__SD1_LCTL,        0x05E4, 0x0214, 3, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_16__SPDIF_IN,        0x05E4, 0x0214, 4, 0x08F0, 2, 0)
 MX6_PAD_DECL(GPIO_16__GPIO7_IO11,      0x05E4, 0x0214, 5, 0x0000, 0, 0)

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-mx6/mx6q_pins.h
index ad31c33..3aae246 100644

arch/arm/include/asm/arch-mx6/mx6q_pins.h +0 -0

@@ -703,7 +703,7 @@ MX6_PAD_DECL(GPIO_8__SPDIF_SR_CLK,  0x0614,

0x0244, 6, 0x0000, 0, 0)
MX6_PAD_DECL(GPIO_8__USB_OTG_PWR_CTL_WAKE, 0x0614, 0x0244, 7, 0x0000, 0, 0)
MX6_PAD_DECL(GPIO_16__ESAI_TX3_RX2, 0x0618, 0x0248, 0, 0x0880, 1, 0)
MX6_PAD_DECL(GPIO_16__ENET_1588_EVENT2_IN, 0x0618, 0x0248, 1, 0x0000, 0, 0)
-MX6_PAD_DECL(GPIO_16__ENET_REF_CLK, 0x0618, 0x0248, 2, 0x083C, 1, 0)
+MX6_PAD_DECL(GPIO_16__ENET_REF_CLK, 0x0618, 0x0248, 2 |
IOMUX_CONFIG_SION, 0x083C, 1, 0)

 MX6_PAD_DECL(GPIO_16__SD1_LCTL,        0x0618, 0x0248, 3, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_16__SPDIF_IN,        0x0618, 0x0248, 4, 0x0914, 3, 0)
 MX6_PAD_DECL(GPIO_16__GPIO7_IO11,      0x0618, 0x0248, 5, 0x0000, 0, 0)

Signature · 3 lines

Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750

Fabio Estevam

2014-01-19 17:48 UTC #3 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Hi Otavio/Andy,

arch/arm/include/asm/arch-mx6/mx6dl_pins.h MX6_PAD_DECL(GPIO_1__GPIO1_IO01, 0x05E0, · line 699

Quoted 9 lines · Otavio Salvador

arch/arm/include/asm/arch-mx6/mx6dl_pins.h +1 -1

@@ -695,7 +695,7 @@ MX6_PAD_DECL(GPIO_1__GPIO1_IO01,    0x05E0,
 0x0210, 5, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_1__SD1_CD_B, 0x05E0, 0x0210, 6, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_16__ESAI_TX3_RX2,    0x05E4, 0x0214, 0, 0x0850, 1, 0)
 MX6_PAD_DECL(GPIO_16__ENET_1588_EVENT2_IN,     0x05E4, 0x0214, 1, 0x0000, 0, 0)
-MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x05E4, 0x0214, 2, 0x080C, 0, 0)
+MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x05E4, 0x0214, 2 |

What about adding the SION bit in the board file only?

Then we would have the same behaviour as in the kernel.

Please check the hummingboard dts file:
https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/tree/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi?id=refs/tags/next-20140117

Regards,

Fabio Estevam

Otavio Salvador

2014-01-19 17:55 UTC #4 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Quoted 17 lines · Fabio Estevam

Hi Otavio/Andy,
arch/arm/include/asm/arch-mx6/mx6dl_pins.h MX6_PAD_DECL(GPIO_1__GPIO1_IO01, 0x05E0, · line 699
Quoted 9 lines · Otavio Salvador
arch/arm/include/asm/arch-mx6/mx6dl_pins.h +1 -1
@@ -695,7 +695,7 @@ MX6_PAD_DECL(GPIO_1__GPIO1_IO01,    0x05E0,
 0x0210, 5, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_1__SD1_CD_B, 0x05E0, 0x0210, 6, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_16__ESAI_TX3_RX2,    0x05E4, 0x0214, 0, 0x0850, 1, 0)
 MX6_PAD_DECL(GPIO_16__ENET_1588_EVENT2_IN,     0x05E4, 0x0214, 1, 0x0000, 0, 0)
-MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x05E4, 0x0214, 2, 0x080C, 0, 0)
+MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x05E4, 0x0214, 2 |
What about adding the SION bit in the board file only?

Quoted 4 lines

Then we would have the same behaviour as in the kernel.
Please check the hummingboard dts file:
https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/tree/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi?id=refs/tags/next-20140117

Personally I think when using the ALT 2 people are expecting it works out of box so I think this should be in the PAD declaration.

Signature · 3 lines

Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750

Fabio Estevam

2014-01-19 18:03 UTC #5 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Quoted 2 lines · Otavio Salvador

Personally I think when using the ALT 2 people are expecting it works out of box so I think this should be in the PAD declaration.

This pin works out of the box in hummingboard, for example.

IOMUX_CONFIG_SION is not used anywhere in the
mx6q_pins.h/mx6dl_pins.h, so why GPIO_16__ENET_
REF_CLK should be an exception?

Regards,

Fabio Estevam

Otavio Salvador

2014-01-19 18:47 UTC #6 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Quoted 11 lines · Fabio Estevam

Quoted 2 lines · Otavio Salvador
Personally I think when using the ALT 2 people are expecting it works out of box so I think this should be in the PAD declaration.
This pin works out of the box in hummingboard, for example.
IOMUX_CONFIG_SION is not used anywhere in the
mx6q_pins.h/mx6dl_pins.h, so why GPIO_16__ENET_
REF_CLK should be an exception?

Are you sure?

% git grep -c IOMUX_CONFIG_SION arch/arm/include/asm/arch-mx6/ arch/arm/include/asm/arch-mx6/mx6dl_pins.h:31 arch/arm/include/asm/arch-mx6/mx6q_pins.h:1

The q_pins is outdate it seems.

Signature · 3 lines

Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750

Markus Niebel

2014-01-22 07:19 UTC #7 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Am 19.01.2014 19:47, wrote Otavio Salvador:

Quoted 13 lines · Fabio Estevam

Quoted 11 lines
Quoted 2 lines · Otavio Salvador
Personally I think when using the ALT 2 people are expecting it works out of box so I think this should be in the PAD declaration.
This pin works out of the box in hummingboard, for example.
IOMUX_CONFIG_SION is not used anywhere in the
mx6q_pins.h/mx6dl_pins.h, so why GPIO_16__ENET_
REF_CLK should be an exception?

Quoted 8 lines

Are you sure?
% git grep -c IOMUX_CONFIG_SION arch/arm/include/asm/arch-mx6/ arch/arm/include/asm/arch-mx6/mx6dl_pins.h:31 arch/arm/include/asm/arch-mx6/mx6q_pins.h:1
The q_pins is outdate it seems.

IOMUX_CONFIG_SION is used everywhere for I2C dedicated pins - partly hard coded for mx6q - so yes, should be used fro enet_clk, too

Markus

Fabio Estevam

2014-01-22 10:57 UTC #8 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Quoted 3 lines · Markus Niebel

IOMUX_CONFIG_SION is used everywhere for I2C dedicated pins - partly hard coded for mx6q - so yes, should be used fro enet_clk, too

Yes, looks good.

Regards,

Fabio Estevam

Stefano Babic

2014-02-11 10:13 UTC #9 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

In reply to Andy Ng

Hi Andy,

Quoted 3 lines · Andy Ng

The ENET_REF_CLK has to loopback: the patch was produced from u-boot 2013-10

We agree about your patch, but can you please fix the issues reported by Otavio (add your signed-off-by and rebase) and resubmit, please ?

Thanks,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

Otavio Salvador

2014-02-11 10:55 UTC #10 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Hello,

Quoted 5 lines · Stefano Babic

Quoted 1 line · Andy Ng
The ENET_REF_CLK has to loopback: the patch was produced from u-boot 2013-10
We agree about your patch, but can you please fix the issues reported by Otavio (add your signed-off-by and rebase) and resubmit, please ?

I have reworked Andy's patch and applied to my internal tree. I can send it if needed.

Signature · 3 lines

Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750

Stefano Babic

2014-02-11 11:11 UTC #11 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Hi Otavio,

Quoted 11 lines · Otavio Salvador

Hello,
Quoted 5 lines · Stefano Babic
Quoted 1 line · Andy Ng
The ENET_REF_CLK has to loopback: the patch was produced from u-boot 2013-10
We agree about your patch, but can you please fix the issues reported by Otavio (add your signed-off-by and rebase) and resubmit, please ?
I have reworked Andy's patch and applied to my internal tree. I can send it if needed.

Thanks, wait on. I would like to know from Andy if it is ok for him to add his Signed-off-by, before applying. If Andy is not available, we will rework the patch.

Regards,
Stefano

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

Otavio Salvador

2014-02-11 13:03 UTC #12 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Hello,

Quoted 12 lines · Stefano Babic

Hi Otavio,
Quoted 9 lines · Otavio Salvador
Hello,
Quoted 5 lines · Stefano Babic
Quoted 1 line · Andy Ng
The ENET_REF_CLK has to loopback: the patch was produced from u-boot 2013-10
We agree about your patch, but can you please fix the issues reported by Otavio (add your signed-off-by and rebase) and resubmit, please ?

Quoted 6 lines

Quoted 2 lines
I have reworked Andy's patch and applied to my internal tree. I can send it if needed.
Thanks, wait on. I would like to know from Andy if it is ok for him to add his Signed-off-by, before applying. If Andy is not available, we will rework the patch.

In fact Andy's patch was not complete. So I did it:

--
MX6: Add SION flag to ENET_REF_CLK PAD
The ENET_REF_CLK needs to have the SION flag enabled so it can

loopback.

This patch has been based upon an Andy Ng <[email protected]> one.

Signed-off-by Otavio Salvador <[email protected]>

So when you want, I can send it.

Signature · 3 lines

Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750

Stefano Babic

2014-02-11 13:12 UTC #13 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Hi Otavio,

Quoted 28 lines · Otavio Salvador

Hello,
Quoted 12 lines · Stefano Babic
Hi Otavio,
Quoted 9 lines · Otavio Salvador
Hello,
Quoted 5 lines · Stefano Babic
Quoted 1 line · Andy Ng
The ENET_REF_CLK has to loopback: the patch was produced from u-boot 2013-10
We agree about your patch, but can you please fix the issues reported by Otavio (add your signed-off-by and rebase) and resubmit, please ?
Quoted 6 lines
Quoted 2 lines
I have reworked Andy's patch and applied to my internal tree. I can send it if needed.
Thanks, wait on. I would like to know from Andy if it is ok for him to add his Signed-off-by, before applying. If Andy is not available, we will rework the patch.
In fact Andy's patch was not complete. So I did it:
--
MX6: Add SION flag to ENET_REF_CLK PAD
The ENET_REF_CLK needs to have the SION flag enabled so it can

Quoted 6 lines

loopback.
This patch has been based upon an Andy Ng <[email protected]> one.
Signed-off-by Otavio Salvador <[email protected]>
--

Thanks - if we do not know anything from Andy in a couple of days, please send it.

Regards,
Stefano

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

A message that is not in the archive (sent off-list or not yet received): CAAVaN8wXYG0MBACg=HT+EdTwy5hS0r_MDwOaYzK6-LUYyLhxjg@mail.gmail.com

Stefano Babic

2014-02-12 11:58 UTC #15 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Hi Andy,

Quoted 5 lines · Andy Ng

HI
I was away the last few days.
Shall I produce a patch for the u-boot git main line code with that fix?

Yes, please add your signed-off-by and rebase it on top of u-boot-imx.

Thanks,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

Otavio Salvador

2014-02-12 12:00 UTC #16 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Quoted 11 lines · Stefano Babic

Hi Andy,
Quoted 5 lines · Andy Ng
HI
I was away the last few days.
Shall I produce a patch for the u-boot git main line code with that fix?
Yes, please add your signed-off-by and rebase it on top of u-boot-imx.

The fix I am using here is:

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
index 55cc9ad..3f41787 100644

arch/arm/include/asm/arch-mx6/mx6dl_pins.h +0 -0

@@ -695,7 +695,7 @@ MX6_PAD_DECL(GPIO_1__GPIO1_IO01,    0x05E0,

 MX6_PAD_DECL(GPIO_16__SD1_LCTL,        0x05E4, 0x0214, 3, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_16__SPDIF_IN,        0x05E4, 0x0214, 4, 0x08F0, 2, 0)
 MX6_PAD_DECL(GPIO_16__GPIO7_IO11,      0x05E4, 0x0214, 5, 0x0000, 0, 0)

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-mx6/mx6q_pins.h
index ad31c33..3aae246 100644

arch/arm/include/asm/arch-mx6/mx6q_pins.h +0 -0

@@ -703,7 +703,7 @@ MX6_PAD_DECL(GPIO_8__SPDIF_SR_CLK,  0x0614,

 MX6_PAD_DECL(GPIO_16__SD1_LCTL,        0x0618, 0x0248, 3, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_16__SPDIF_IN,        0x0618, 0x0248, 4, 0x0914, 3, 0)
 MX6_PAD_DECL(GPIO_16__GPIO7_IO11,      0x0618, 0x0248, 5, 0x0000, 0, 0)

Signature · 3 lines

Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750

A message that is not in the archive (sent off-list or not yet received): CAAVaN8wM6O64PAATKqqHks1QnStmQ7R2g4fYHckZLooA=usMQQ@mail.gmail.com

Andy Ng

author

2014-02-12 12:57 UTC #18 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Otavio Salvador

2014-02-12 13:16 UTC #19 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

Hello Andy,

Quoted 7 lines · Andy Ng

From 45da8256deadb5c5cf38311ed5470e4ba5b20570 Mon Sep 17 00:00:00 2001
From: Andy Ng <[email protected]>
Date: Wed, 12 Feb 2014 12:40:47 +0000
Subject: [PATCH] SION bit has to be on for the pins that are used as ENET_REF_CLK
Signed-off-by Andy Ng <[email protected]>

The commit log is not good. Please check the one I sent in this thread for reference.

Signature · 3 lines

Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750

Stefano Babic

2014-02-12 13:23 UTC #20 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

In reply to Andy Ng

Hi Andy,

Quoted 8 lines · Andy Ng

From 45da8256deadb5c5cf38311ed5470e4ba5b20570 Mon Sep 17 00:00:00 2001
From: Andy Ng <[email protected]>
Date: Wed, 12 Feb 2014 12:40:47 +0000
Subject: [PATCH] SION bit has to be on for the pins that are used as ENET_REF_CLK
Signed-off-by Andy Ng <[email protected]>
---

You use git, just let git make the job for you. Use git format-patch to create the patch and git send-email to send it to the ML.

Regards,
Stefano Babic

Quoted 45 lines

 arch/arm/include/asm/arch-mx6/mx6dl_pins.h |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
arch/arm/include/asm/arch-mx6/mx6dl_pins.h +1 -1
index 55cc9ad..2e414ad 100644
@@ -647,7 +647,7 @@ MX6_PAD_DECL(ENET_MDIO__ESAI_RX_CLK,    0x05BC,
 0x01EC, 2, 0x083C, 0, 0)
 MX6_PAD_DECL(ENET_MDIO__ENET_1588_EVENT1_OUT,    0x05BC, 0x01EC, 4,
 0x0000, 0, 0)
 MX6_PAD_DECL(ENET_MDIO__GPIO1_IO22,    0x05BC, 0x01EC, 5, 0x0000, 0, 0)
 MX6_PAD_DECL(ENET_MDIO__SPDIF_LOCK,    0x05BC, 0x01EC, 6, 0x0000, 0, 0)
-MX6_PAD_DECL(ENET_REF_CLK__ENET_TX_CLK,    0x05C0, 0x01F0, 1, 0x0000, 0, 0)
+MX6_PAD_DECL(ENET_REF_CLK__ENET_TX_CLK,    0x05C0, 0x01F0, 1 |
 IOMUX_CONFIG_SION, 0x0000, 0, 0)
MX6_PAD_DECL(ENET_REF_CLK__ESAI_RX_FS, 0x05C0, 0x01F0, 2, 0x082C, 0, 0)
MX6_PAD_DECL(ENET_REF_CLK__GPIO1_IO23, 0x05C0, 0x01F0, 5, 0x0000, 0, 0)
MX6_PAD_DECL(ENET_REF_CLK__SPDIF_SR_CLK, 0x05C0, 0x01F0, 6, 0x0000, 0, 0)
arch/arm/include/asm/arch-mx6/mx6dl_pins.h +1 -1
@@ -695,7 +695,7 @@ MX6_PAD_DECL(GPIO_1__GPIO1_IO01,    0x05E0,
 0x0210, 5, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_1__SD1_CD_B,    0x05E0, 0x0210, 6, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_16__ESAI_TX3_RX2,    0x05E4, 0x0214, 0, 0x0850, 1, 0)
 MX6_PAD_DECL(GPIO_16__ENET_1588_EVENT2_IN,    0x05E4, 0x0214, 1, 0x0000, 0, 0)
-MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x05E4, 0x0214, 2, 0x080C, 0, 0)
+MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x05E4, 0x0214, 2 |
 IOMUX_CONFIG_SION, 0x080C, 0, 0)
 MX6_PAD_DECL(GPIO_16__SD1_LCTL,    0x05E4, 0x0214, 3, 0x0000, 0, 0)
MX6_PAD_DECL(GPIO_16__SPDIF_IN, 0x05E4, 0x0214, 4, 0x08F0, 2, 0)
MX6_PAD_DECL(GPIO_16__GPIO7_IO11, 0x05E4, 0x0214, 5, 0x0000, 0, 0)
arch/arm/include/asm/arch-mx6/mx6dl_pins.h +0 -0
@@ -934,7 +934,7 @@ MX6_PAD_DECL(RGMII_TX_CTL__USBOH3_H2_STROBE,
0x06BC, 0x02D4, 0 | IOMUX_CONFIG_SI
MX6_PAD_DECL(RGMII_TX_CTL__USB_H2_STROBE, 0x06BC, 0x02D4, 0 |
IOMUX_CONFIG_SION, 0x0000, 0, PAD_CTL_PUS_47K_UP)
MX6_PAD_DECL(RGMII_TX_CTL__RGMII_TX_CTL, 0x06BC, 0x02D4, 1, 0x0000, 0, 0)
MX6_PAD_DECL(RGMII_TX_CTL__GPIO6_IO26, 0x06BC, 0x02D4, 5, 0x0000, 0, 0)
arch/arm/include/asm/arch-mx6/mx6dl_pins.h +1 -1
-MX6_PAD_DECL(RGMII_TX_CTL__ENET_REF_CLK,    0x06BC, 0x02D4, 7, 0x080C, 1, 0)
+MX6_PAD_DECL(RGMII_TX_CTL__ENET_REF_CLK,    0x06BC, 0x02D4, 7 |
IOMUX_CONFIG_SION, 0x080C, 1, 0)
MX6_PAD_DECL(RGMII_TXC__USB_H2_DATA, 0x06C0, 0x02D8, 0 |
IOMUX_CONFIG_SION, 0x0000, 0, 0)
MX6_PAD_DECL(RGMII_TXC__RGMII_TXC, 0x06C0, 0x02D8, 1, 0x0000, 0, 0)
MX6_PAD_DECL(RGMII_TXC__SPDIF_EXT_CLK, 0x06C0, 0x02D8, 2, 0x08F4, 1, 0)

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

Andy Ng

author

2014-02-12 13:23 UTC #21 lore raw

PATCH 1/1 Enable SION Bit for GPIO16 when ALT2 mode is selected

In reply to Andy Ng

Shall I apply SION bit on imx6Q files too and bring all the changes under a single patch? Or there is problem with the existing one?

Best regards
A

Quoted 122 lines · Andy Ng

From 45da8256deadb5c5cf38311ed5470e4ba5b20570 Mon Sep 17 00:00:00 2001
From: Andy Ng <[email protected]>
Date: Wed, 12 Feb 2014 12:40:47 +0000
Subject: [PATCH] SION bit has to be on for the pins that are used as ENET_REF_CLK
Signed-off-by Andy Ng <[email protected]>
---
 arch/arm/include/asm/arch-mx6/mx6dl_pins.h |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
arch/arm/include/asm/arch-mx6/mx6dl_pins.h +1 -1
index 55cc9ad..2e414ad 100644
@@ -647,7 +647,7 @@ MX6_PAD_DECL(ENET_MDIO__ESAI_RX_CLK,    0x05BC,
 0x01EC, 2, 0x083C, 0, 0)
 MX6_PAD_DECL(ENET_MDIO__ENET_1588_EVENT1_OUT,    0x05BC, 0x01EC, 4,
 0x0000, 0, 0)
 MX6_PAD_DECL(ENET_MDIO__GPIO1_IO22,    0x05BC, 0x01EC, 5, 0x0000, 0, 0)
 MX6_PAD_DECL(ENET_MDIO__SPDIF_LOCK,    0x05BC, 0x01EC, 6, 0x0000, 0, 0)
-MX6_PAD_DECL(ENET_REF_CLK__ENET_TX_CLK,    0x05C0, 0x01F0, 1, 0x0000, 0, 0)
+MX6_PAD_DECL(ENET_REF_CLK__ENET_TX_CLK,    0x05C0, 0x01F0, 1 |
 IOMUX_CONFIG_SION, 0x0000, 0, 0)
MX6_PAD_DECL(ENET_REF_CLK__ESAI_RX_FS, 0x05C0, 0x01F0, 2, 0x082C, 0, 0)
MX6_PAD_DECL(ENET_REF_CLK__GPIO1_IO23, 0x05C0, 0x01F0, 5, 0x0000, 0, 0)
MX6_PAD_DECL(ENET_REF_CLK__SPDIF_SR_CLK, 0x05C0, 0x01F0, 6, 0x0000, 0, 0)
arch/arm/include/asm/arch-mx6/mx6dl_pins.h +1 -1
@@ -695,7 +695,7 @@ MX6_PAD_DECL(GPIO_1__GPIO1_IO01,    0x05E0,
 0x0210, 5, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_1__SD1_CD_B,    0x05E0, 0x0210, 6, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_16__ESAI_TX3_RX2,    0x05E4, 0x0214, 0, 0x0850, 1, 0)
 MX6_PAD_DECL(GPIO_16__ENET_1588_EVENT2_IN,    0x05E4, 0x0214, 1, 0x0000, 0, 0)
-MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x05E4, 0x0214, 2, 0x080C, 0, 0)
+MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x05E4, 0x0214, 2 |
 IOMUX_CONFIG_SION, 0x080C, 0, 0)
 MX6_PAD_DECL(GPIO_16__SD1_LCTL,    0x05E4, 0x0214, 3, 0x0000, 0, 0)
MX6_PAD_DECL(GPIO_16__SPDIF_IN, 0x05E4, 0x0214, 4, 0x08F0, 2, 0)
MX6_PAD_DECL(GPIO_16__GPIO7_IO11, 0x05E4, 0x0214, 5, 0x0000, 0, 0)
arch/arm/include/asm/arch-mx6/mx6dl_pins.h +0 -0
@@ -934,7 +934,7 @@ MX6_PAD_DECL(RGMII_TX_CTL__USBOH3_H2_STROBE,
0x06BC, 0x02D4, 0 | IOMUX_CONFIG_SI
MX6_PAD_DECL(RGMII_TX_CTL__USB_H2_STROBE, 0x06BC, 0x02D4, 0 |
IOMUX_CONFIG_SION, 0x0000, 0, PAD_CTL_PUS_47K_UP)
MX6_PAD_DECL(RGMII_TX_CTL__RGMII_TX_CTL, 0x06BC, 0x02D4, 1, 0x0000, 0, 0)
MX6_PAD_DECL(RGMII_TX_CTL__GPIO6_IO26, 0x06BC, 0x02D4, 5, 0x0000, 0, 0)
arch/arm/include/asm/arch-mx6/mx6dl_pins.h +1 -1
-MX6_PAD_DECL(RGMII_TX_CTL__ENET_REF_CLK,    0x06BC, 0x02D4, 7, 0x080C, 1, 0)
+MX6_PAD_DECL(RGMII_TX_CTL__ENET_REF_CLK,    0x06BC, 0x02D4, 7 |
IOMUX_CONFIG_SION, 0x080C, 1, 0)
MX6_PAD_DECL(RGMII_TXC__USB_H2_DATA, 0x06C0, 0x02D8, 0 |
IOMUX_CONFIG_SION, 0x0000, 0, 0)
MX6_PAD_DECL(RGMII_TXC__RGMII_TXC, 0x06C0, 0x02D8, 1, 0x0000, 0, 0)
MX6_PAD_DECL(RGMII_TXC__SPDIF_EXT_CLK, 0x06C0, 0x02D8, 2, 0x08F4, 1, 0)
--
1.7.9.5
Quoted 63 lines · Andy Ng
I have produced a patch from the latest git repository of u-boot-imx:
See attached file.
Have turned on the SION bit in all the places where the ENET_REF_CLK comes out. Please review and let me know.
Best regards,
A
Quoted 52 lines · Otavio Salvador
Quoted 11 lines · Stefano Babic
Hi Andy,
Quoted 5 lines · Andy Ng
HI
I was away the last few days.
Shall I produce a patch for the u-boot git main line code with that fix?
Yes, please add your signed-off-by and rebase it on top of u-boot-imx.
The fix I am using here is:
arch/arm/include/asm/arch-mx6/mx6dl_pins.h +1 -1
index 55cc9ad..3f41787 100644
@@ -695,7 +695,7 @@ MX6_PAD_DECL(GPIO_1__GPIO1_IO01,    0x05E0,
 0x0210, 5, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_1__SD1_CD_B, 0x05E0, 0x0210, 6, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_16__ESAI_TX3_RX2,    0x05E4, 0x0214, 0, 0x0850, 1, 0)
 MX6_PAD_DECL(GPIO_16__ENET_1588_EVENT2_IN,     0x05E4, 0x0214, 1, 0x0000, 0, 0)
-MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x05E4, 0x0214, 2, 0x080C, 0, 0)
+MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x05E4, 0x0214, 2 |
 IOMUX_CONFIG_SION, 0x080C, 0, 0)
 MX6_PAD_DECL(GPIO_16__SD1_LCTL,        0x05E4, 0x0214, 3, 0x0000, 0, 0)
MX6_PAD_DECL(GPIO_16__SPDIF_IN, 0x05E4, 0x0214, 4, 0x08F0, 2, 0)
MX6_PAD_DECL(GPIO_16__GPIO7_IO11, 0x05E4, 0x0214, 5, 0x0000, 0, 0)
arch/arm/include/asm/arch-mx6/mx6q_pins.h +1 -1
index ad31c33..3aae246 100644
@@ -703,7 +703,7 @@ MX6_PAD_DECL(GPIO_8__SPDIF_SR_CLK,  0x0614,
 0x0244, 6, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_8__USB_OTG_PWR_CTL_WAKE,     0x0614, 0x0244, 7, 0x0000, 0, 0)
 MX6_PAD_DECL(GPIO_16__ESAI_TX3_RX2,    0x0618, 0x0248, 0, 0x0880, 1, 0)
 MX6_PAD_DECL(GPIO_16__ENET_1588_EVENT2_IN,     0x0618, 0x0248, 1, 0x0000, 0, 0)
-MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x0618, 0x0248, 2, 0x083C, 1, 0)
+MX6_PAD_DECL(GPIO_16__ENET_REF_CLK,    0x0618, 0x0248, 2 |
 IOMUX_CONFIG_SION, 0x083C, 1, 0)
 MX6_PAD_DECL(GPIO_16__SD1_LCTL,        0x0618, 0x0248, 3, 0x0000, 0, 0)
MX6_PAD_DECL(GPIO_16__SPDIF_IN, 0x0618, 0x0248, 4, 0x0914, 3, 0)
MX6_PAD_DECL(GPIO_16__GPIO7_IO11, 0x0618, 0x0248, 5, 0x0000, 0, 0)
--
Otavio Salvador O.S. Systems
http://www.ossystems.com.br http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854 Mobile: +1 (347) 903-9750