nand pmecc crash detected
Hi,
I am using an sam5d35 and its pmecc nand ecc controller.
In barebox, using similar atmel_nand.c the system crashes.
The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc (nand_base.c) when we write a sub page.
chip->ecc.hwctl function is not set when we are using PMECC controller.
As a workaround, i set NAND_NO_SUBPAGE_WRITE for PMECC controller in order to disable sub page access in nand_write_page.
I think we can have the same problem in Linux. I do not performed subpage nand writes from Linux but i made the following patch according to my Barebox defect.
Here after are my patches (same modification) for 1st my local Barebox and 2nd my local Linux :
---8<-------------------
From 757e8dbf141619a55b7a5b1ca11780b2589eacc1 Mon Sep 17 00:00:00 2001
From: Herve Codina <[email protected]>
Date: Fri, 28 Feb 2014 08:39:08 +0100
Subject: [PATCH 5/5] Disable Subpage nand write when using Atmel PMECC.
--- drivers/mtd/nand/atmel_nand.c | 1 + 1 file changed, 1 insertion(+)
drivers/mtd/nand/atmel_nand.c +0 -0
@@ -837,6 +837,7 @@ static int __init
atmel_pmecc_nand_init_params(struct device_d *dev,
return err_no;
}
+ nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
nand_chip->ecc.read_page = atmel_nand_pmecc_read_page; nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
Signature · 16 lines
1.7.9.5 ---8<------------------- ---8<------------------- From bd6a9645841d74611a5be44a60c9c41b2bca9c19 Mon Sep 17 00:00:00 2001 From: Herve Codina <[email protected]> Date: Fri, 28 Feb 2014 08:28:07 +0100 Subject: [PATCH 4/4] Disable Subpage nand write when using Atmel PMECC. Signed-off-by: Herve Codina <[email protected]> --- drivers/mtd/nand/atmel_nand.c | 1 + 1 file changed, 1 insertion(+)
drivers/mtd/nand/atmel_nand.c +0 -0
@@ -1249,6 +1249,7 @@ static int __init
atmel_pmecc_nand_init_params(struct platform_device *pdev,
goto err;
}
+ nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
nand_chip->ecc.read_page = atmel_nand_pmecc_read_page; nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
Signature · 14 lines
1.7.9.5 ---8<------------------- Can you review/integrate these patches in Barebox / Linux ? Best regards, Hervé Codina _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
Dear Herve
Quoted 9 lines · Herve Codina
Hi,
I am using an sam5d35 and its pmecc nand ecc controller.
In barebox, using similar
atmel_nand.cthe system crashes.The problem was a call to
chip->ecc.hwctlfromnand_write_subpage_hwecc(nand_base.c) when we write a sub page.
Quoted 8 lines
chip->ecc.hwctlfunction is not set when we are using PMECC controller.As a workaround, i set
NAND_NO_SUBPAGE_WRITEfor PMECC controller in order to disable sub page access innand_write_page.I think we can have the same problem in Linux. I do not performed subpage nand writes from Linux but i made the following patch according to my Barebox defect.
Thank you for catching this crash bug. The fix is fine for me. But I think it's better to send out the Linux kernel patch alone.
You can rebase your patch on the top of Linux-mtd git repo(git://git.infradead.org/l2-mtd.git) instead of your local Linux. Then use 'git send-email' send to [email protected] and [email protected]. I will ack your patch.
If the patch is merged in Linux-mtd, it should be easier port to barebox then.
Quoted 22 lines
Here after are my patches (same modification) for 1st my local Barebox and 2nd my local Linux :
---8<-------------------
From757e8dbf141619a55b7a5b1ca11780b2589eacc1Mon Sep 17 00:00:00 2001
From: Herve Codina <[email protected]>
Date: Fri, 28 Feb 2014 08:39:08 +0100
Subject: [PATCH 5/5] Disable Subpage nand write when using Atmel PMECC.Signed-off-by Herve Codina <[email protected]>--- drivers/mtd/nand/atmel_nand.c | 1 + 1 file changed, 1 insertion(+)drivers/mtd/nand/atmel_nand.c +0
-0
drivers/mtd/nand/atmel_nand.c static int __init · line 843
Quoted 7 lines
drivers/mtd/nand/atmel_nand.c +1
-0@@ -837,6 +837,7 @@ static int __init atmel_pmecc_nand_init_params(struct device_d *dev, return err_no; } + nand_chip->options |=NAND_NO_SUBPAGE_WRITE ; nand_chip->ecc.read_page = atmel_nand_pmecc_read_page; nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
Best Regards,
Josh Wu
_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox
Quoted 24 lines · Josh Wu
Dear Herve
Quoted 9 lines · Herve Codina
Hi,
I am using an sam5d35 and its pmecc nand ecc controller.
In barebox, using similar
atmel_nand.cthe system crashes.The problem was a call to
chip->ecc.hwctlfromnand_write_subpage_hwecc(nand_base.c) when we write a sub page.Quoted 8 lines
chip->ecc.hwctlfunction is not set when we are using PMECC controller.As a workaround, i set
NAND_NO_SUBPAGE_WRITEfor PMECC controller in order to disable sub page access innand_write_page.I think we can have the same problem in Linux. I do not performed subpage nand writes from Linux but i made the following patch according to my Barebox defect.
Thank you for catching this crash bug. The fix is fine for me. But I think it's better to send out the Linux kernel patch alone.
Quoted 8 lines
You can rebase your patch on the top of Linux-mtd git repo(git://git.infradead.org/l2-mtd.git) instead of your local Linux.
Then use 'git send-email' send to linux-mtd at lists.infradead.org and linux-arm-kernel at lists.infradead.org. I will ack your patch.If the patch is merged in Linux-mtd, it should be easier port to barebox then.
no need for that notion of priority send it to both
Best Regards,
J.
Quoted 38 lines
Quoted 23 lines
Here after are my patches (same modification) for 1st my local Barebox and 2nd my local Linux :
---8<-------------------
From757e8dbf141619a55b7a5b1ca11780b2589eacc1Mon Sep 17 00:00:00 2001
From: Herve Codina <[email protected]>
Date: Fri, 28 Feb 2014 08:39:08 +0100
Subject: [PATCH 5/5] Disable Subpage nand write when using Atmel PMECC.Signed-off-by Herve Codina <[email protected]>--- drivers/mtd/nand/atmel_nand.c | 1 + 1 file changed, 1 insertion(+)drivers/mtd/nand/atmel_nand.c +0
-0drivers/mtd/nand/atmel_nand.c static int __init · line 843
Quoted 7 lines
drivers/mtd/nand/atmel_nand.c +1
-0@@ -837,6 +837,7 @@ static int __init atmel_pmecc_nand_init_params(struct device_d *dev, return err_no; } + nand_chip->options |=NAND_NO_SUBPAGE_WRITE ; nand_chip->ecc.read_page = atmel_nand_pmecc_read_page; nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;Best Regards,
Josh Wu_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Dear Josh
As suggested, i made a patch and sent it this week to [email protected] and [email protected]. Hope you have seen it. Is subject is : "[PATCH] Disable Subpage nand write when using Atmel PMECC".
Best regards,
Herve
Quoted 57 lines · Josh Wu
Dear Herve
Quoted 9 lines · Herve Codina
Hi,
I am using an sam5d35 and its pmecc nand ecc controller.
In barebox, using similar
atmel_nand.cthe system crashes.The problem was a call to
chip->ecc.hwctlfromnand_write_subpage_hwecc(nand_base.c) when we write a sub page.Quoted 8 lines
chip->ecc.hwctlfunction is not set when we are using PMECC controller.As a workaround, i set
NAND_NO_SUBPAGE_WRITEfor PMECC controller in order to disable sub page access innand_write_page.I think we can have the same problem in Linux. I do not performed subpage nand writes from Linux but i made the following patch according to my Barebox defect.
Thank you for catching this crash bug. The fix is fine for me. But I think it's better to send out the Linux kernel patch alone.
You can rebase your patch on the top of Linux-mtd git repo(git://git.infradead.org/l2-mtd.git) instead of your local Linux. Then use 'git send-email' send to [email protected] and [email protected]. I will ack your patch.
If the patch is merged in Linux-mtd, it should be easier port to barebox then.
Quoted 25 lines
Here after are my patches (same modification) for 1st my local Barebox and 2nd my local Linux :
---8<-------------------
From757e8dbf141619a55b7a5b1ca11780b2589eacc1Mon Sep 17 00:00:00 2001
From: Herve Codina <[email protected]>
Date: Fri, 28 Feb 2014 08:39:08 +0100
Subject: [PATCH 5/5] Disable Subpage nand write when using Atmel PMECC.Signed-off-by Herve Codina <[email protected]>--- drivers/mtd/nand/atmel_nand.c | 1 + 1 file changed, 1 insertion(+)drivers/mtd/nand/atmel_nand.c +0
-0@@ -837,6 +837,7 @@ static int __init atmel_pmecc_nand_init_params(struct device_d *dev, return err_no; }
Quoted 8 lines
drivers/mtd/nand/atmel_nand.c static int __init · line 843
Quoted 4 lines
drivers/mtd/nand/atmel_nand.c +1
-0+ nand_chip->options |=NAND_NO_SUBPAGE_WRITE ; nand_chip->ecc.read_page = atmel_nand_pmecc_read_page; nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;Best Regards,
Josh Wu
_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox
Quoted 14 lines · Herve Codina
Hi,
I am using an sam5d35 and its pmecc nand ecc controller.
In barebox, using similar
atmel_nand.cthe system crashes.The problem was a call to
chip->ecc.hwctlfromnand_write_subpage_hwecc(nand_base.c) when we write a sub page.
chip->ecc.hwctlfunction is not set when we are using PMECC controller.As a workaround, i set
NAND_NO_SUBPAGE_WRITEfor PMECC controller in order to disable sub page access innand_write_page.
Quoted 6 lines
I think we can have the same problem in Linux. I do not performed subpage nand writes from Linux but i made the following patch according to my Barebox defect.
Here after are my patches (same modification) for 1st my local Barebox and 2nd my local Linux :
Applied (for barebox ;), thanks
Sascha
Signature · 4 lines
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