ARM: EXYNOS: Map SYSRAM address through DT
PATCH 1/1 ARM: EXYNOS: Map SYSRAM address through DT
Instead of hardcoding the SYSRAM details for each SoC, pass this information through device tree (DT) and make the code SoC agnostic.
Signed-off-by Sachin Kamat <[email protected]>
---
Based on top of my earlier patch
"ARM: EXYNOS: Consolidate CPU init code" at
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/26560
--- .../devicetree/bindings/arm/samsung-boards.txt | 11 +++ arch/arm/boot/dts/exynos4210-universal_c210.dts | 5 + arch/arm/boot/dts/exynos4210.dtsi | 10 ++ arch/arm/boot/dts/exynos4x12.dtsi | 10 ++ arch/arm/boot/dts/exynos5.dtsi | 5 + arch/arm/boot/dts/exynos5250.dtsi | 5 + arch/arm/mach-exynos/common.c | 104 ++++++++------------ arch/arm/mach-exynos/include/mach/map.h | 7 -- 8 files changed, 86 insertions(+), 71 deletions(-)
Documentation/devicetree/bindings/arm/samsung-boards.txt +11 -0
@@ -7,6 +7,17 @@ Required root node properties: (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board. (b) "samsung,exynos4210" - for boards based on Exynos4210 SoC. + - sysram node, specifying the type (secure or non-secure) of SYSRAM + - compatible: following types are supported + "samsung,exynos4210-sysram" : Secure SYSRAM + "samsung,exynos4210-sysram-ns" : Non-secure SYSRAM + - reg: address of SYSRAM bank + + sysram at 02020000 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x02020000 0x1000>; + }; + Optional: - firmware node, specifying presence and type of secure firmware: - compatible: only "samsung,secure-firmware" is currently supported
arch/arm/boot/dts/exynos4210-universal_c210.dts +5 -0
@@ -28,6 +28,11 @@ bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1"; }; + sysram at 02020000 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x02025000 0x1000>; + }; + mct at 10050000 { compatible = "none"; };
arch/arm/boot/dts/exynos4210.dtsi +10 -0
@@ -31,6 +31,16 @@ pinctrl2 = &pinctrl_2; }; + sysram at 02020000 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x02020000 0x1000>; + }; + + sysram-ns at 0203F000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x0203F000 0x1000>; + }; + pd_lcd1: lcd1-power-domain at 10023CA0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CA0 0x20>;
arch/arm/boot/dts/exynos4x12.dtsi +10 -0
@@ -31,6 +31,16 @@ mshc0 = &mshc_0; }; + sysram at 02020000 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x02020000 0x1000>; + }; + + sysram-ns at 0204F000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x0204F000 0x1000>; + }; + pd_isp: isp-power-domain at 10023CA0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CA0 0x20>;
arch/arm/boot/dts/exynos5.dtsi +5 -0
@@ -18,6 +18,11 @@ / { interrupt-parent = <&gic>; + sysram at 02020000 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x02020000 0x1000>; + }; + chipid at 10000000 { compatible = "samsung,exynos4210-chipid"; reg = <0x10000000 0x100>;
arch/arm/boot/dts/exynos5250.dtsi +5 -0
@@ -70,6 +70,11 @@ }; }; + sysram-ns at 0204F000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x0204F000 0x1000>; + }; + pd_gsc: gsc-power-domain at 10044000 { compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>;
arch/arm/mach-exynos/common.c +40 -64
134 lines not on this page · raw message
arch/arm/mach-exynos/include/mach/map.h +0 -7
@@ -23,13 +23,6 @@#include <plat/map-s5p.h> -#define EXYNOS4_PA_SYSRAM0 0x02025000 -#define EXYNOS4_PA_SYSRAM1 0x02020000 -#define EXYNOS5_PA_SYSRAM 0x02020000 -#define EXYNOS4210_PA_SYSRAM_NS 0x0203F000 -#define EXYNOS4x12_PA_SYSRAM_NS 0x0204F000 -#define EXYNOS5250_PA_SYSRAM_NS 0x0204F000 -#define EXYNOS_PA_CHIPID 0x10000000#define EXYNOS4_PA_SYSCON 0x10010000
Signature · 1 line
1.7.9.5
PATCH 1/1 ARM: EXYNOS: Map SYSRAM address through DT
Quoted 294 lines · Sachin Kamat
Instead of hardcoding the SYSRAM details for each SoC, pass this information through device tree (DT) and make the code SoC agnostic.
Signed-off-by Sachin Kamat <[email protected]>---
Based on top of my earlier patch
"ARM: EXYNOS: Consolidate CPU init code" at
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/26560--- .../devicetree/bindings/arm/samsung-boards.txt | 11 +++ arch/arm/boot/dts/exynos4210-universal_c210.dts | 5 + arch/arm/boot/dts/exynos4210.dtsi | 10 ++ arch/arm/boot/dts/exynos4x12.dtsi | 10 ++ arch/arm/boot/dts/exynos5.dtsi | 5 + arch/arm/boot/dts/exynos5250.dtsi | 5 + arch/arm/mach-exynos/common.c | 104 ++++++++------------ arch/arm/mach-exynos/include/mach/map.h | 7 -- 8 files changed, 86 insertions(+), 71 deletions(-)Documentation/devicetree/bindings/arm/samsung-boards.txt +11
-0@@ -7,6 +7,17 @@ Required root node properties: (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board. (b) "samsung,exynos4210" - for boards based on Exynos4210 SoC. + - sysram node, specifying the type (secure or non-secure) of SYSRAM + - compatible: following types are supported + "samsung,exynos4210-sysram" : Secure SYSRAM + "samsung,exynos4210-sysram-ns" : Non-secure SYSRAM + - reg: address of SYSRAM bank + + sysram at 02020000 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x02020000 0x1000>; + }; + Optional: - firmware node, specifying presence and type of secure firmware: - compatible: only "samsung,secure-firmware" is currently supportedarch/arm/boot/dts/exynos4210-universal_c210.dts +5
-0@@ -28,6 +28,11 @@ bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1"; }; + sysram at 02020000 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x02025000 0x1000>; + }; + mct at 10050000 { compatible = "none"; };arch/arm/boot/dts/exynos4210.dtsi +10
-0@@ -31,6 +31,16 @@ pinctrl2 = &pinctrl_2; }; + sysram at 02020000 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x02020000 0x1000>; + }; + + sysram-ns at 0203F000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x0203F000 0x1000>; + }; + pd_lcd1: lcd1-power-domain at 10023CA0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CA0 0x20>;arch/arm/boot/dts/exynos4x12.dtsi +10
-0@@ -31,6 +31,16 @@ mshc0 = &mshc_0; }; + sysram at 02020000 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x02020000 0x1000>; + }; + + sysram-ns at 0204F000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x0204F000 0x1000>; + }; + pd_isp: isp-power-domain at 10023CA0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CA0 0x20>;arch/arm/boot/dts/exynos5.dtsi +5
-0@@ -18,6 +18,11 @@ / { interrupt-parent = <&gic>; + sysram at 02020000 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x02020000 0x1000>; + }; + chipid at 10000000 { compatible = "samsung,exynos4210-chipid"; reg = <0x10000000 0x100>;arch/arm/boot/dts/exynos5250.dtsi +5
-0@@ -70,6 +70,11 @@ }; }; + sysram-ns at 0204F000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x0204F000 0x1000>; + }; + pd_gsc: gsc-power-domain at 10044000 { compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>;arch/arm/mach-exynos/common.c +40
-64@@ -131,51 +131,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { }, }; -static struct map_desc exynos4_iodesc0[]__initdata = { - { - .virtual = (unsigned long )S5P_VA_SYSRAM , - .pfn =__phys_to_pfn (EXYNOS4_PA_SYSRAM0 ), - .length =SZ_4K , - .type =MT_DEVICE , - }, -}; - -static struct map_desc exynos4_iodesc1[]__initdata = { - { - .virtual = (unsigned long )S5P_VA_SYSRAM , - .pfn =__phys_to_pfn (EXYNOS4_PA_SYSRAM1 ), - .length =SZ_4K , - .type =MT_DEVICE , - }, -}; - -static struct map_desc exynos4210_iodesc[]__initdata = { - { - .virtual = (unsigned long )S5P_VA_SYSRAM_NS , - .pfn =__phys_to_pfn (EXYNOS4210_PA_SYSRAM_NS ), - .length =SZ_4K , - .type =MT_DEVICE , - }, -}; - -static struct map_desc exynos4x12_iodesc[]__initdata = { - { - .virtual = (unsigned long )S5P_VA_SYSRAM_NS , - .pfn =__phys_to_pfn (EXYNOS4x12_PA_SYSRAM_NS), - .length =SZ_4K , - .type =MT_DEVICE , - }, -}; - -static struct map_desc exynos5250_iodesc[]__initdata = { - { - .virtual = (unsigned long )S5P_VA_SYSRAM_NS , - .pfn =__phys_to_pfn (EXYNOS5250_PA_SYSRAM_NS ), - .length =SZ_4K , - .type =MT_DEVICE , - }, -}; -static struct map_desc exynos5_iodesc[]__initdata = { { .virtual = (unsigned long )S3C_VA_SYS ,@@ -198,11 +153,6 @@ static struct map_desc exynos5_iodesc[] __initdata = { .length = SZ_4K, .type = MT_DEVICE, }, { - .virtual = (unsigned long)S5P_VA_SYSRAM, - .pfn = __phys_to_pfn(EXYNOS5_PA_SYSRAM), - .length = SZ_4K, - .type = MT_DEVICE, - }, { .virtual = (unsigned long)S5P_VA_CMU, .pfn = __phys_to_pfn(EXYNOS5_PA_CMU), .length = 144 * SZ_1K,@@ -292,6 +242,44 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,return 1 ; } +struct __sysram_desc { +char name[32 ]; +unsigned long addr; +}; + +static struct __sysram_desc sysram_desc[]__initdata = { + { + .name ="samsung,exynos4210-sysram" , + .addr = (unsigned long )S5P_VA_SYSRAM , + }, { + .name ="samsung,exynos4210-sysram-ns" , + .addr = (unsigned long )S5P_VA_SYSRAM_NS , + }, +}; + +static int __init exynos_fdt_map_sysram (unsigned long node,const char *uname, +int depth,void *data) +{ +struct map_desc iodesc; +__be32 *reg; +unsigned long len; +int i; + +for (i =0 ; i <ARRAY_SIZE (sysram_desc); i++) { +if (of_flat_dt_is_compatible (node, sysram_desc[i].name)) { + reg =of_get_flat_dt_prop (node,"reg" , &len); +if (!reg || len != (sizeof (unsigned long ) *2 )) +return -ENODEV ; + iodesc.virtual = sysram_desc[i].addr; + iodesc.pfn =__phys_to_pfn (be32_to_cpu (reg[0 ])); + iodesc.length =be32_to_cpu (reg[1 ]); + iodesc.type =MT_DEVICE ; +iotable_init (&iodesc,1 ); + } + } +return 0 ; +} +/* * exynos_map_io * @@ -308,6 +296,8 @@ void __init exynos_init_io(void)s5p_init_cpu (S5P_VA_CHIPID );exynos_map_io (); + +of_scan_flat_dt (exynos_fdt_map_sysram,NULL ); }static void __init exynos_map_io (void )@@ -317,20 +307,6 @@ static void __init exynos_map_io(void)if (soc_is_exynos5250 () ||soc_is_exynos5420 ())iotable_init (exynos5_iodesc,ARRAY_SIZE (exynos5_iodesc)); - -if (soc_is_exynos4210 ()) { -if (samsung_rev () ==EXYNOS4210_REV_0 ) -iotable_init (exynos4_iodesc0, -ARRAY_SIZE (exynos4_iodesc0)); -else -iotable_init (exynos4_iodesc1, -ARRAY_SIZE (exynos4_iodesc1)); -iotable_init (exynos4210_iodesc,ARRAY_SIZE (exynos4210_iodesc)); - } -if (soc_is_exynos4212 () ||soc_is_exynos4412 ()) -iotable_init (exynos4x12_iodesc,ARRAY_SIZE (exynos4x12_iodesc)); -if (soc_is_exynos5250 ()) -iotable_init (exynos5250_iodesc,ARRAY_SIZE (exynos5250_iodesc)); }struct bus_type exynos_subsys = {arch/arm/mach-exynos/include/mach/map.h +0
-8@@ -23,13 +23,6 @@#include <plat/map-s5p.h> -#define EXYNOS4_PA_SYSRAM0 0x02025000 -#define EXYNOS4_PA_SYSRAM1 0x02020000 -#define EXYNOS5_PA_SYSRAM 0x02020000 -#define EXYNOS4210_PA_SYSRAM_NS 0x0203F000 -#define EXYNOS4x12_PA_SYSRAM_NS 0x0204F000 -#define EXYNOS5250_PA_SYSRAM_NS 0x0204F000 -#define EXYNOS_PA_CHIPID 0x10000000#define EXYNOS4_PA_SYSCON 0x10010000 --
Quoted 2 lines
1.7.9.5
ping..
Signature · 2 lines
With warm regards, Sachin
PATCH 1/1 ARM: EXYNOS: Map SYSRAM address through DT
Quoted 9 lines · Sachin Kamat
arch/arm/boot/dts/exynos4210-universal_c210.dts line 31
Quoted 9 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +1
-0@@ -28,6 +28,11 @@ bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1"; }; + sysram at 02020000 {
^
Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts line 33
Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +2
-0+ compatible = "samsung,exynos4210-sysram"; + reg = <0x02025000 0x1000>;
^
Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts line 35
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arch/arm/boot/dts/exynos4210-universal_c210.dts +2
-0+ }; +
Shouldn't these two addresses match?
Regards,
Andreas
PATCH 1/1 ARM: EXYNOS: Map SYSRAM address through DT
Quoted 11 lines · Andreas Oberritter
Quoted 9 lines · Sachin Kamat
arch/arm/boot/dts/exynos4210-universal_c210.dts line 31
Quoted 9 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +1
-0@@ -28,6 +28,11 @@ bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1"; }; + sysram at 02020000 {^
Quoted 7 lines
Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts line 33
Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +2
-0+ compatible = "samsung,exynos4210-sysram"; + reg = <0x02025000 0x1000>;^Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts line 35
Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +2
-0+ }; +Shouldn't these two addresses match?
Ideally they should. However in this case, this particular board uses older revision
of the SoC which has a different register address. I did not want to create a compatible
string just for this (exceptional) case alone and hence did it this way to override the reg. address.
Other option was not to have the register address in the node name.
--
With warm regards,
Sachin
PATCH 1/1 ARM: EXYNOS: Map SYSRAM address through DT
Quoted 20 lines · Sachin Kamat
Quoted 11 lines · Andreas Oberritter
Quoted 9 lines · Sachin Kamat
arch/arm/boot/dts/exynos4210-universal_c210.dts line 31
Quoted 9 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +1
-0@@ -28,6 +28,11 @@ bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1"; }; + sysram at 02020000 {^Quoted 7 lines
Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts line 33
Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +2
-0+ compatible = "samsung,exynos4210-sysram"; + reg = <0x02025000 0x1000>;^Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts line 35
Quoted 2 lines
arch/arm/boot/dts/exynos4210-universal_c210.dts +2
-0+ }; +Shouldn't these two addresses match?
Quoted 7 lines
Ideally they should. However in this case, this particular board uses older revision
of the SoC which has a different register address. I did not want to create a compatible
string just for this (exceptional) case alone and hence did it this way to override the reg. address.
Other option was not to have the register address in the node name.
What about overriding status of sysram at 02020000 node to "disabled" and adding a new sysram at 02025000 node in universal C210 dts?
However, I'm still a bit concerned about using such platform and use-case specific compatible strings here. SYSRAM is basically a normal SRAM memory and usually just some specific areas of it are reserved for special purposes.
Best regards,
Tomasz