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cpu: exynos4: ace_sha: add hardware random number generator support.

PATCH Superseded Przemyslaw Marczak 7 participants 40 messages Feb 28, 2014 – Mar 28, 2014

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#0 lore raw

PATCH 1/3 cpu: exynos4: ace_sha: add hardware random number generator support.

This patch adds implementation of function hw_rand() based on exynos security sub system.

cc Akshay Saraswat <[email protected]>
cc ARUN MANKUZHI <[email protected]>
cc Minkyu Kang <[email protected]>
---
 arch/arm/include/asm/arch-exynos/cpu.h |    4 ++--
 drivers/crypto/ace_sha.c               |   41 ++++++++++++++++++++++++++++++++
 drivers/crypto/ace_sha.h               |    8 ++++---
 3 files changed, 48 insertions(+), 5 deletions(-)
arch/arm/include/asm/arch-exynos/cpu.h +2 -2
index bccce63..a5c280d 100644
@@ -48,7 +48,7 @@
 #define EXYNOS4_GPIO_PART4_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DP_BASE			DEVICE_NOT_AVAILABLE
 #define EXYNOS4_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4_ACE_SFR_BASE		0x10830000
 #define EXYNOS4_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
@@ -87,7 +87,7 @@
 #define EXYNOS4X12_I2S_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_ACE_SFR_BASE		0x10830000
 #define EXYNOS4X12_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
drivers/crypto/ace_sha.c +41 -0

44 lines not on this page · raw message

drivers/crypto/ace_sha.h +5 -3
index a426d52..f1097f7 100644
@@ -72,9 +72,10 @@ struct exynos_ace_sfr {
 	unsigned char   res12[0x30];
 	unsigned int	hash_result[8];
 	unsigned char   res13[0x20];
-	unsigned int	hash_seed[8];
-	unsigned int	hash_prng[8];
-	unsigned char   res14[0x180];
+	unsigned int	hash_seed[5];
+	unsigned char	res14[12];
+	unsigned int	hash_prng[5];
+	unsigned char	res15[0x18c];
 
 	unsigned int	pka_sfr[5];		/* base + 0x700 */
 };
@@ -291,6 +292,7 @@ struct exynos_ace_sfr {
 #define ACE_HASH_PRNGERROR_MASK	(1 << 7)
 #define ACE_HASH_PRNGERROR_OFF		(0 << 7)
 #define ACE_HASH_PRNGERROR_ON		(1 << 7)
+#define ACE_HASH_PRNG_REG_NUM		5
 
 #define ACE_SHA_TYPE_SHA1		1
 #define ACE_SHA_TYPE_SHA256		2
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH 2/3 lib: rand: add call to hw_rand() - hardware random number generator

Changes:
- lib/rand.c: add call to hw_rand() (depends on CONFIG_RAND_HW_ACCEL)
- include/common.h: add hw_rand() declaration.

---
 include/common.h |    3 +++
 lib/rand.c       |    4 ++++
 2 files changed, 7 insertions(+)
include/common.h +3 -0
index 96a45a6..58e2fbc 100644
@@ -836,6 +836,9 @@ void srand(unsigned int seed);
 unsigned int rand(void);
 unsigned int rand_r(unsigned int *seedp);
 #endif
+#ifdef CONFIG_RAND_HW_ACCEL
+unsigned int hw_rand(void);
+#endif
 
 /* common/console.c */
 int	console_init_f(void);	/* Before relocation; uses the serial  stuff	*/
lib/rand.c +4 -0
index 5c367e1..f534635 100644
@@ -23,7 +23,11 @@ unsigned int rand_r(unsigned int *seedp)
 
 unsigned int rand(void)
 {
+#ifdef CONFIG_RAND_HW_ACCEL
+	return hw_rand();
+#else
 	return rand_r(&y);
+#endif
 }
 
 void srand(unsigned int seed)
Signature · 1 line
1.7.9.5
#2 lore raw

PATCH 2/3 lib: rand: add call to hw_rand() - hardware random number generator

Am Freitag, 28. Februar 2014, 17:30:54 schrieb Przemyslaw Marczak:

Quoted 17 lines

Changes:
- lib/rand.c: add call to hw_rand() (depends on CONFIG_RAND_HW_ACCEL)
- include/common.h: add hw_rand() declaration.

---
 include/common.h |    3 +++
 lib/rand.c       |    4 ++++
 2 files changed, 7 insertions(+)
include/common.h +0 -0
index 96a45a6..58e2fbc 100644

include/common.h void srand(unsigned int seed); · line 844

Quoted 9 lines
include/common.h +3 -0
@@ -836,6 +836,9 @@ void srand(unsigned int seed);
 unsigned int rand(void);
 unsigned int rand_r(unsigned int *seedp);
 #endif
+#ifdef CONFIG_RAND_HW_ACCEL
+unsigned int hw_rand(void);
+#endif
 
 /* common/console.c */
 int	console_init_f(void);	/* Before relocation; uses the serial  stuff	

*/

Quoted 5 lines
lib/rand.c +0 -0
index 5c367e1..f534635 100644

lib/rand.c unsigned int rand_r(unsigned int *seedp) · line 31

Quoted 9 lines
lib/rand.c +4 -0
@@ -23,7 +23,11 @@ unsigned int rand_r(unsigned int *seedp)
 
 unsigned int rand(void)
 {
+#ifdef CONFIG_RAND_HW_ACCEL
+	return hw_rand();
+#else
 	return rand_r(&y);
+#endif
 }

shouldn't we put that into rand_r() and ignore the argument? because then both users of rand() and rand_r() will benefit from the hardware random generator.

and what does HW_ACCEL mean? is this a real hardware random generator? if this is the case, wouldn't it make more sense to name it CONFIG_RAND_USE_HW_RNG.

-michael

#3 lore raw

PATCH 2/3 lib: rand: add call to hw_rand() - hardware random number generator

Hello Michael,
Thank you for reply.

Quoted 34 lines · Michael Walle

Am Freitag, 28. Februar 2014, 17:30:54 schrieb Przemyslaw Marczak:

Quoted 17 lines

Changes:
- lib/rand.c: add call to hw_rand() (depends on CONFIG_RAND_HW_ACCEL)
- include/common.h: add hw_rand() declaration.

---
  include/common.h |    3 +++
  lib/rand.c       |    4 ++++
  2 files changed, 7 insertions(+)
include/common.h +0 -0
index 96a45a6..58e2fbc 100644

include/common.h void srand(unsigned int seed); · line 844

Quoted 9 lines
include/common.h +3 -0
@@ -836,6 +836,9 @@ void srand(unsigned int seed);
  unsigned int rand(void);
  unsigned int rand_r(unsigned int *seedp);
  #endif
+#ifdef CONFIG_RAND_HW_ACCEL
+unsigned int hw_rand(void);
+#endif
 
  /* common/console.c */
  int	console_init_f(void);	/* Before relocation; uses the serial  stuff	

*/

Quoted 6 lines
lib/rand.c +0 -0
index 5c367e1..f534635 100644
@@ -23,7 +23,11 @@ unsigned int rand_r(unsigned int *seedp)
 
Quoted 12 lines

lib/rand.c unsigned int rand_r(unsigned int *seedp) · line 31

Quoted 8 lines
lib/rand.c +4 -0
  unsigned int rand(void)
  {
+#ifdef CONFIG_RAND_HW_ACCEL
+	return hw_rand();
+#else
  	return rand_r(&y);
+#endif
  }

shouldn't we put that into rand_r() and ignore the argument? because then both users of rand() and rand_r() will benefit from the hardware random generator.

Ok, I can change this.

Quoted 5 lines

and what does HW_ACCEL mean? is this a real hardware random generator? if this is the case, wouldn't it make more sense to name it CONFIG_RAND_USE_HW_RNG.

-michael

HW_ACCEL means hardware accelerated, and it really is.
I followed common/hash.c code - there is declared array "hash_algo" and config name for sha hardware acceleration is "CONFIG_SHA_HW_ACCEL", so I think CONFIG_RAND_HW_ACCEL coresponds well to CONFIG_RAND.

Thank you

Signature · 4 lines
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marczak at samsung.com
#4 lore raw

PATCH 3/3 trats/trats2: enable exynos security subsystem and function hw_rand()

In reply to Przemyslaw Marczak

This allows to use exynos random number generator.

---
 include/configs/trats.h  |    4 ++++
 include/configs/trats2.h |    4 ++++
 2 files changed, 8 insertions(+)
include/configs/trats.h +4 -0
index 718107a..2bf4172 100644
@@ -313,6 +313,10 @@
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 #define CONFIG_USB_CABLE_CHECK
 
+/* Security subsystem - enable hw_rand() */
+#define CONFIG_EXYNOS_ACE_SHA
+#define CONFIG_RAND_HW_ACCEL
+
 /* Common misc for Samsung */
 #define CONFIG_MISC_COMMON
 
include/configs/trats2.h +4 -0
index e30c428..4163fcd 100644
@@ -324,6 +324,10 @@ int get_soft_i2c_sda_pin(void);
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 #define CONFIG_USB_CABLE_CHECK
 
+/* Security subsystem - enable hw_rand() */
+#define CONFIG_EXYNOS_ACE_SHA
+#define CONFIG_RAND_HW_ACCEL
+
 /* Common misc for Samsung */
 #define CONFIG_MISC_COMMON
 
Signature · 1 line
1.7.9.5
#5 lore raw

PATCH v2 1/3 cpu: exynos4: ace_sha: add hardware random number generator support.

In reply to Przemyslaw Marczak

This patch adds implementation of function hw_rand() based on exynos security sub system.

cc Akshay Saraswat <[email protected]>
cc ARUN MANKUZHI <[email protected]>
cc Minkyu Kang <[email protected]>

---
Changes v2:
- none

 arch/arm/include/asm/arch-exynos/cpu.h |    4 ++--
 drivers/crypto/ace_sha.c               |   41 ++++++++++++++++++++++++++++++++
 drivers/crypto/ace_sha.h               |    8 ++++---
 3 files changed, 48 insertions(+), 5 deletions(-)
arch/arm/include/asm/arch-exynos/cpu.h +2 -2
index bccce63..a5c280d 100644
@@ -48,7 +48,7 @@
 #define EXYNOS4_GPIO_PART4_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DP_BASE			DEVICE_NOT_AVAILABLE
 #define EXYNOS4_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4_ACE_SFR_BASE		0x10830000
 #define EXYNOS4_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
@@ -87,7 +87,7 @@
 #define EXYNOS4X12_I2S_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_ACE_SFR_BASE		0x10830000
 #define EXYNOS4X12_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
drivers/crypto/ace_sha.c +41 -0

44 lines not on this page · raw message

drivers/crypto/ace_sha.h +5 -3
index a426d52..f1097f7 100644
@@ -72,9 +72,10 @@ struct exynos_ace_sfr {
 	unsigned char   res12[0x30];
 	unsigned int	hash_result[8];
 	unsigned char   res13[0x20];
-	unsigned int	hash_seed[8];
-	unsigned int	hash_prng[8];
-	unsigned char   res14[0x180];
+	unsigned int	hash_seed[5];
+	unsigned char	res14[12];
+	unsigned int	hash_prng[5];
+	unsigned char	res15[0x18c];
 
 	unsigned int	pka_sfr[5];		/* base + 0x700 */
 };
@@ -291,6 +292,7 @@ struct exynos_ace_sfr {
 #define ACE_HASH_PRNGERROR_MASK	(1 << 7)
 #define ACE_HASH_PRNGERROR_OFF		(0 << 7)
 #define ACE_HASH_PRNGERROR_ON		(1 << 7)
+#define ACE_HASH_PRNG_REG_NUM		5
 
 #define ACE_SHA_TYPE_SHA1		1
 #define ACE_SHA_TYPE_SHA256		2
Signature · 1 line
1.7.9.5
#6 lore raw

PATCH v2 2/3 lib: rand: add call to hw_rand() - hardware random number generator

Changes:
- lib/rand.c: add call to hw_rand() (depends on CONFIG_RAND_HW_ACCEL)
- include/common.h: add hw_rand() declaration.

---
Changes v2:
- move function hw_rand() from rand() to rand_r() and ignore its argument

 include/common.h |    3 +++
 lib/rand.c       |    3 +++
 2 files changed, 6 insertions(+)
include/common.h +3 -0
index 96a45a6..58e2fbc 100644
@@ -836,6 +836,9 @@ void srand(unsigned int seed);
 unsigned int rand(void);
 unsigned int rand_r(unsigned int *seedp);
 #endif
+#ifdef CONFIG_RAND_HW_ACCEL
+unsigned int hw_rand(void);
+#endif
 
 /* common/console.c */
 int	console_init_f(void);	/* Before relocation; uses the serial  stuff	*/
lib/rand.c +3 -0
index 5c367e1..0617063 100644
@@ -14,6 +14,9 @@ static unsigned int y = 1U;
 
 unsigned int rand_r(unsigned int *seedp)
 {
+#ifdef CONFIG_RAND_HW_ACCEL
+	return hw_rand();
+#endif
 	*seedp ^= (*seedp << 13);
 	*seedp ^= (*seedp >> 17);
 	*seedp ^= (*seedp << 5);
Signature · 1 line
1.7.9.5
#7 lore raw

PATCH v2 2/3 lib: rand: add call to hw_rand() - hardware random number generator

Quoted 34 lines · Przemyslaw Marczak

Changes:
- lib/rand.c: add call to hw_rand() (depends on CONFIG_RAND_HW_ACCEL)
- include/common.h: add hw_rand() declaration.

---
Changes v2:
- move function hw_rand() from rand() to rand_r() and ignore its argument

 include/common.h |    3 +++
 lib/rand.c       |    3 +++
 2 files changed, 6 insertions(+)
include/common.h +3 -0
index 96a45a6..58e2fbc 100644
@@ -836,6 +836,9 @@ void srand(unsigned int seed);
 unsigned int rand(void);
 unsigned int rand_r(unsigned int *seedp);
 #endif
+#ifdef CONFIG_RAND_HW_ACCEL
+unsigned int hw_rand(void);
+#endif
 
 /* common/console.c */
 int	console_init_f(void);	/* Before relocation; uses the serial  stuff	*/
lib/rand.c +0 -0
index 5c367e1..0617063 100644

lib/rand.c static unsigned int y = 1U; · line 22

Quoted 9 lines
lib/rand.c +3 -0
@@ -14,6 +14,9 @@ static unsigned int y = 1U;
 
 unsigned int rand_r(unsigned int *seedp)
 {
+#ifdef CONFIG_RAND_HW_ACCEL
+	return hw_rand();
+#endif
 	*seedp ^= (*seedp << 13);
 	*seedp ^= (*seedp >> 17);
 	*seedp ^= (*seedp << 5);

This doesn't already generate warnings about unreachable code?

I hate to say@but I think we should add lib/hw_rand.c which does:
void srand(uint seed) {}
unsigned int rand(void) { return hw_rand(); }
unsigned int rand_r(unsigned int *seedp) { seedp = hw_rand(); return *seedp;}

(please double check how hw_rand() returns and net/link_local.c if we can really avoid using the callers pointer...).

And then in correct Kbuild fashion, something like randsrc-y ?= rand.o randsrc-$(CONFIG_RAND_HW_ACCEL) = hw_rand.o

(The above is probably wrong, help please Masahiro :))

Signature · 8 lines
Tom
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#8 lore raw

PATCH v2 2/3 lib: rand: add call to hw_rand() - hardware random number generator

Hello Tom,

Quoted 17 lines

lib/rand.c static unsigned int y = 1U; · line 22

Quoted 8 lines

unsigned int rand_r(unsigned int *seedp)
{

lib/rand.c +3 -0
+#ifdef CONFIG_RAND_HW_ACCEL
+	return hw_rand();
+#endif
 	*seedp ^= (*seedp << 13);
 	*seedp ^= (*seedp >> 17);
 	*seedp ^= (*seedp << 5);

This doesn't already generate warnings about unreachable code?

I hate to say at but I think we should add lib/hw_rand.c which does:
void srand(uint seed) {}
unsigned int rand(void) { return hw_rand(); }
unsigned int rand_r(unsigned int *seedp) { seedp = hw_rand(); return *seedp;}

Quoted 8 lines

(please double check how hw_rand() returns and net/link_local.c if we can really avoid using the callers pointer...).

And then in correct Kbuild fashion, something like randsrc-y ?= rand.o randsrc-$(CONFIG_RAND_HW_ACCEL) = hw_rand.o

(The above is probably wrong, help please Masahiro :))

In the first place, I don't like the idea to add a new function hw_rand() very much.

I think lib/rand.c is just one implementation among some possible choices. drivers/crypto/ace_sha.c is another implementation.

How about treating them in the same way?

I mean, srand(), rand(), rand_r()
should be defined in drivers/crypto/ace_sha.c rather than adding lib/hw_rand.c.

drivers/crypto/ace_sha.c is like this:

void srand(uint seed) {}
unsigned int rand(void)
{
<your hardware rand implementation>
}
unsigned int rand_r(unsigned int *seedp)

{
       return rand();
}

lib/Makefile will be changed like this:

  --- a/lib/Makefile
  +++ b/lib/Makefile
  @@ -62,8 +62,6 @@ obj-y += time.o
   obj-$(CONFIG_TRACE) += trace.o
   obj-$(CONFIG_BOOTP_PXE) += uuid.o
   obj-y += vsprintf.o
  -obj-$(CONFIG_RANDOM_MACADDR) += rand.o
  -obj-$(CONFIG_BOOTP_RANDOM_DELAY) += rand.o
  -obj-$(CONFIG_CMD_LINK_LOCAL) += rand.o
  +obj-$(CONFIG_SW_RAND) += rand.o

It looks like CONFIG_SW_RAND (or CONFIG_EXYNOS_ACE_SHA) must be added to the following boards.

include/configs/lsxl.h (for CONFIG_RANDOM_MACADDR)
include/configs/MERGERBOX.h (for CONFIG_BOOTP_RAMDOM_DELAY)

include/configs/MVBC_P.h         (for CONFIG_BOOTP_RAMDOM_DELAY)
include/configs/MVBLM7.h         (for CONFIG_BOOTP_RAMDOM_DELAY)
include/configs/MVSMR.h          (for CONFIG_BOOTP_RAMDOM_DELAY)

include/configs/bfin_adi_common.h (for CONFIG_BOOTP_RAMDOM_DELAY)
include/configs/sacsng.h (for CONFIG_BOOTP_RAMDOM_DELAY)
include/config_uncmd_spl.h (for CONFIG_CMD_LINK_LOCAL)
include/configs/a3m071.h (for CONFIG_CMD_LINK_LOCAL)

Best Regards
Masahiro Yamada

#9 lore raw

PATCH v2 3/3 trats/trats2: enable exynos security subsystem and function hw_rand()

In reply to Przemyslaw Marczak

This allows to use hardware random number generator from exynos security subsystem.

---
Changes v2:
- none

 include/configs/trats.h  |    4 ++++
 include/configs/trats2.h |    4 ++++
 2 files changed, 8 insertions(+)
include/configs/trats.h +4 -0
index 718107a..2bf4172 100644
@@ -313,6 +313,10 @@
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 #define CONFIG_USB_CABLE_CHECK
 
+/* Security subsystem - enable hw_rand() */
+#define CONFIG_EXYNOS_ACE_SHA
+#define CONFIG_RAND_HW_ACCEL
+
 /* Common misc for Samsung */
 #define CONFIG_MISC_COMMON
 
include/configs/trats2.h +4 -0
index e30c428..4163fcd 100644
@@ -324,6 +324,10 @@ int get_soft_i2c_sda_pin(void);
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 #define CONFIG_USB_CABLE_CHECK
 
+/* Security subsystem - enable hw_rand() */
+#define CONFIG_EXYNOS_ACE_SHA
+#define CONFIG_RAND_HW_ACCEL
+
 /* Common misc for Samsung */
 #define CONFIG_MISC_COMMON
 
Signature · 1 line
1.7.9.5
#10 lore raw

PATCH v2 1/3 cpu: exynos4: ace_sha: add hardware random number generator support.

In reply to Przemyslaw Marczak
Quoted 56 lines · Przemyslaw Marczak

This patch adds implementation of function hw_rand() based on exynos security sub system.

cc Akshay Saraswat <[email protected]>
cc ARUN MANKUZHI <[email protected]>
cc Minkyu Kang <[email protected]>

---
Changes v2:
- none

 arch/arm/include/asm/arch-exynos/cpu.h |    4 ++--
 drivers/crypto/ace_sha.c               |   41 ++++++++++++++++++++++++++++++++
 drivers/crypto/ace_sha.h               |    8 ++++---
 3 files changed, 48 insertions(+), 5 deletions(-)
arch/arm/include/asm/arch-exynos/cpu.h +2 -2
index bccce63..a5c280d 100644
@@ -48,7 +48,7 @@
 #define EXYNOS4_GPIO_PART4_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DP_BASE			DEVICE_NOT_AVAILABLE
 #define EXYNOS4_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4_ACE_SFR_BASE		0x10830000
 #define EXYNOS4_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
@@ -87,7 +87,7 @@
 #define EXYNOS4X12_I2S_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_ACE_SFR_BASE		0x10830000
 #define EXYNOS4X12_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
drivers/crypto/ace_sha.c +10 -0
index acbafde..d12a507 100644
@@ -111,3 +111,44 @@ void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,
 	if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA1))
 		debug("ACE was not setup properly or it is faulty\n");
 }
+
+unsigned int hw_rand(void)
+{
+	struct exynos_ace_sfr *reg =
+		(struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
+	int status, i;
+	int seed[5];
+	unsigned int ret = 0;
+
+	/* Seed data */

drivers/crypto/ace_sha.c void hw_sha1(const unsigned char *pbuf, unsigned int buf_len, · line 133

Quoted 10 lines
drivers/crypto/ace_sha.c +10 -0
+	for (i = 0; i < ACE_HASH_PRNG_REG_NUM; i++)
+		writel(seed[i], &reg->hash_seed[i]);
+
+	status = 0;
+	/* Wait for seed setup done */
+	while (!(status & ACE_HASH_SEEDSETTING_MASK)) {
+		status = readl(&reg->hash_status);
+		if (status & ACE_HASH_PRNGERROR_MASK)
+			return 0;
+	}

Can it use "do{ }while"?

Quoted 48 lines
drivers/crypto/ace_sha.c +21 -0
+
+	/* Start PRNG */
+	writel(ACE_HASH_ENGSEL_PRNG | ACE_HASH_STARTBIT_ON, &reg->hash_control);
+
+	status = 0;
+	/* Wait for PRNG done */
+	while (!(status & ACE_HASH_PRNGDONE_MASK)) {
+		status = readl(&reg->hash_status);
+		if (status & ACE_HASH_PRNGERROR_MASK)
+			return 0;
+	}
+
+	/* Clear Done IRQ */
+	writel(ACE_HASH_PRNGDONE_MASK, &reg->hash_status);
+
+	/* Read a PRNG result */
+	for (i = 0; i < ACE_HASH_PRNG_REG_NUM; i++)
+		ret += readl(&reg->hash_prng[i]);
+
+	return ret;
+}
drivers/crypto/ace_sha.h +5 -3
index a426d52..f1097f7 100644
@@ -72,9 +72,10 @@ struct exynos_ace_sfr {
 	unsigned char   res12[0x30];
 	unsigned int	hash_result[8];
 	unsigned char   res13[0x20];
-	unsigned int	hash_seed[8];
-	unsigned int	hash_prng[8];
-	unsigned char   res14[0x180];
+	unsigned int	hash_seed[5];
+	unsigned char	res14[12];
+	unsigned int	hash_prng[5];
+	unsigned char	res15[0x18c];
 
 	unsigned int	pka_sfr[5];		/* base + 0x700 */
 };
@@ -291,6 +292,7 @@ struct exynos_ace_sfr {
 #define ACE_HASH_PRNGERROR_MASK	(1 << 7)
 #define ACE_HASH_PRNGERROR_OFF		(0 << 7)
 #define ACE_HASH_PRNGERROR_ON		(1 << 7)
+#define ACE_HASH_PRNG_REG_NUM		5
 
 #define ACE_SHA_TYPE_SHA1		1
 #define ACE_SHA_TYPE_SHA256		2
#11 lore raw

PATCH v2 1/3 cpu: exynos4: ace_sha: add hardware random number generator support.

In reply to Przemyslaw Marczak
Quoted 21 lines · Przemyslaw Marczak

This patch adds implementation of function hw_rand() based on exynos security sub system.

cc Akshay Saraswat <[email protected]>
cc ARUN MANKUZHI <[email protected]>
cc Minkyu Kang <[email protected]>

---
Changes v2:
- none

 arch/arm/include/asm/arch-exynos/cpu.h |    4 ++--
 drivers/crypto/ace_sha.c               |   41 ++++++++++++++++++++++++++++++++
 drivers/crypto/ace_sha.h               |    8 ++++---
 3 files changed, 48 insertions(+), 5 deletions(-)
arch/arm/include/asm/arch-exynos/cpu.h +0 -0
index bccce63..a5c280d 100644

arch/arm/include/asm/arch-exynos/cpu.h line 51

Quoted 5 lines
arch/arm/include/asm/arch-exynos/cpu.h +1 -1
@@ -48,7 +48,7 @@
 #define EXYNOS4_GPIO_PART4_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DP_BASE			DEVICE_NOT_AVAILABLE
 #define EXYNOS4_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4_ACE_SFR_BASE		0x10830000

please sort this list as others.

arch/arm/include/asm/arch-exynos/cpu.h line 93

Quoted 12 lines
arch/arm/include/asm/arch-exynos/cpu.h +1 -1
 #define EXYNOS4_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
@@ -87,7 +87,7 @@
 #define EXYNOS4X12_I2S_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_ACE_SFR_BASE		0x10830000
 #define EXYNOS4X12_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE

Thanks,
Minkyu Kang.

#12 lore raw

PATCH v3 1/4 lib: rand: introduce new configs: CONFIG_LIB_RAND CONFIG_LIB_HW_RAND

In reply to Przemyslaw Marczak

New configs:
- CONFIG_LIB_RAND - to enable implementation of rand library in lib/rand.c
- CONFIG_LIB_HW_RAND - to enable hardware based implementations of lib rand

Other changes:
- add CONFIG_LIB_RAND to boards configs which needs rand()
- put only one rand.o dependency in lib/Makefile

CONFIG_LIB_HW_RAND should be defined for drivers which implements rand library (declared in include/common.h):
- void srand(unsigned int seed)
- unsigned int rand(void)
- unsigned int rand_r(unsigned int *seedp)

Cc Michael Walle <[email protected]>
Cc Tom Rini <[email protected]>
Cc Masahiro Yamada <[email protected]>

---
Changes v3:
- new commit

 include/common.h                  | 4 +---
 include/configs/MERGERBOX.h       | 1 +
 include/configs/MVBC_P.h          | 1 +
 include/configs/MVBLM7.h          | 1 +
 include/configs/MVSMR.h           | 1 +
 include/configs/a3m071.h          | 1 +
 include/configs/bfin_adi_common.h | 1 +
 include/configs/lsxl.h            | 1 +
 include/configs/sacsng.h          | 1 +
 lib/Makefile                      | 4 +---
 10 files changed, 10 insertions(+), 6 deletions(-)
include/common.h +1 -3
index 090fcde..fcf4318 100644
@@ -829,9 +829,7 @@ char *	strmhz(char *buf, unsigned long hz);
 #include <u-boot/crc.h>
 
 /* lib/rand.c */
-#if defined(CONFIG_RANDOM_MACADDR) || \
-	defined(CONFIG_BOOTP_RANDOM_DELAY) || \
-	defined(CONFIG_CMD_LINK_LOCAL)
+#if defined(CONFIG_LIB_RAND) || defined(CONFIG_LIB_HW_RAND)
 #define RAND_MAX -1U
 void srand(unsigned int seed);
 unsigned int rand(void);
include/configs/MERGERBOX.h +1 -0
index 930699b..19ea316 100644
@@ -312,6 +312,7 @@
 #define CONFIG_BOOTP_NTPSERVER
 #define CONFIG_BOOTP_RANDOM_DELAY
 #define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_LIB_RAND
 
 /*
  * Command line configuration.
include/configs/MVBC_P.h +1 -0
index 99e4e90..036396c 100644
@@ -104,6 +104,7 @@
 #define CONFIG_BOOTP_NTPSERVER
 #define CONFIG_BOOTP_RANDOM_DELAY
 #define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_LIB_RAND
 
 /*
  * Autoboot
include/configs/MVBLM7.h +1 -0
index 30af691..27c2fa0 100644
@@ -227,6 +227,7 @@
 #define CONFIG_BOOTP_NTPSERVER
 #define CONFIG_BOOTP_RANDOM_DELAY
 #define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_LIB_RAND
 
 /* USB */
 #define CONFIG_SYS_USB_HOST
include/configs/MVSMR.h +1 -0
index bb565b6..ad15506 100644
@@ -92,6 +92,7 @@
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_BOOTP_VENDOREX
+#define CONFIG_LIB_RAND
 
 /*
  * Autoboot
include/configs/a3m071.h +1 -0
index 1e65cd1..205adfd 100644
@@ -58,6 +58,7 @@
 #define CONFIG_BOOTP_SERVERIP
 #define CONFIG_NET_RETRY_COUNT 3
 #define CONFIG_CMD_LINK_LOCAL
+#define CONFIG_LIB_RAND
 #define CONFIG_NETCONSOLE
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define CONFIG_CMD_PING
include/configs/bfin_adi_common.h +1 -0
index 08ccce0..ea9acf6 100644
@@ -17,6 +17,7 @@
 #  define CONFIG_BOOTP_DNS
 #  define CONFIG_BOOTP_NTPSERVER
 #  define CONFIG_BOOTP_RANDOM_DELAY
+#  define CONFIG_LIB_RAND
 #  define CONFIG_KEEP_SERVERADDR
 #  define CONFIG_CMD_DNS
 #  define CONFIG_CMD_PING
include/configs/lsxl.h +1 -0
index 2ae8a27..96a889f 100644
@@ -37,6 +37,7 @@
 #define CONFIG_SHOW_BOOT_PROGRESS
 
 #define CONFIG_RANDOM_MACADDR
+#define CONFIG_LIB_RAND
 #define CONFIG_KIRKWOOD_GPIO
 #define CONFIG_OF_LIBFDT
 
include/configs/sacsng.h +1 -0
index 0a694fb..b5064ab 100644
@@ -457,6 +457,7 @@
 #endif /* CONFIG_BOOT_ROOT_NFS */
 
 #define CONFIG_BOOTP_RANDOM_DELAY       /* Randomize the BOOTP retry delay */
+#define CONFIG_LIB_RAND
 
 /*
  * BOOTP options
lib/Makefile +1 -3
index 8814ff9..ae80865 100644
@@ -62,8 +62,6 @@ obj-y += time.o
 obj-$(CONFIG_TRACE) += trace.o
 obj-$(CONFIG_BOOTP_PXE) += uuid.o
 obj-y += vsprintf.o
-obj-$(CONFIG_RANDOM_MACADDR) += rand.o
-obj-$(CONFIG_BOOTP_RANDOM_DELAY) += rand.o
-obj-$(CONFIG_CMD_LINK_LOCAL) += rand.o
+obj-$(CONFIG_LIB_RAND) += rand.o
 
 subdir-ccflags-$(CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED) += -O2
Signature · 1 line
1.9.0
#13 lore raw

PATCH v3 1/4 lib: rand: introduce new configs: CONFIG_LIB_RAND CONFIG_LIB_HW_RAND

Dear all,

Quoted 14 lines · Przemyslaw Marczak

New configs:
- CONFIG_LIB_RAND - to enable implementation of rand library in lib/rand.c
- CONFIG_LIB_HW_RAND - to enable hardware based implementations of lib rand

Other changes:
- add CONFIG_LIB_RAND to boards configs which needs rand()
- put only one rand.o dependency in lib/Makefile

CONFIG_LIB_HW_RAND should be defined for drivers which implements rand library (declared in include/common.h):
- void srand(unsigned int seed)
- unsigned int rand(void)
- unsigned int rand_r(unsigned int *seedp)

Quoted 5 lines
Cc Michael Walle <[email protected]>
Cc Tom Rini <[email protected]>
Cc Masahiro Yamada <[email protected]>

Please look at third version of changes for introduce hardware random number generator support for exynos.
I hope that I didn't omit any of yours comments.

Thank you

Signature · 4 lines
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marczak at samsung.com
#14 lore raw

PATCH v3 1/4 lib: rand: introduce new configs: CONFIG_LIB_RAND CONFIG_LIB_HW_RAND

Am Donnerstag, 20. M?rz 2014, 18:36:17 schrieb Przemyslaw Marczak:

Quoted 23 lines

Dear all,

Quoted 15 lines · Przemyslaw Marczak

New configs:
- CONFIG_LIB_RAND - to enable implementation of rand library in
lib/rand.c - CONFIG_LIB_HW_RAND - to enable hardware based implementations of lib rand

Other changes:
- add CONFIG_LIB_RAND to boards configs which needs rand()
- put only one rand.o dependency in lib/Makefile

CONFIG_LIB_HW_RAND should be defined for drivers which implements rand library (declared in include/common.h):
- void srand(unsigned int seed)
- unsigned int rand(void)
- unsigned int rand_r(unsigned int *seedp)

Quoted 4 lines
Cc Michael Walle <[email protected]>
Cc Tom Rini <[email protected]>
Cc Masahiro Yamada <[email protected]>
Quoted 5 lines

Please look at third version of changes for introduce hardware random number generator support for exynos.
I hope that I didn't omit any of yours comments.

Thank you

Hi,

seems fine to me (i didn't look at the drivers).

Signature · 1 line
 michael
#15 lore raw

PATCH v3 2/4 cpu: exynos4: add ace sha base address

In reply to Przemyslaw Marczak

---
Changes v3:
- new commit - after separate changes from next commit

 arch/arm/include/asm/arch-exynos/cpu.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/include/asm/arch-exynos/cpu.h +2 -2
index bccce63..bd3300a 100644
@@ -44,11 +44,11 @@
 #define EXYNOS4_MODEM_BASE		0x13A00000
 #define EXYNOS4_USBPHY_CONTROL		0x10020704
 #define EXYNOS4_I2S_BASE		0xE2100000
+#define EXYNOS4_ACE_SFR_BASE		0x10830000
 
 #define EXYNOS4_GPIO_PART4_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DP_BASE			DEVICE_NOT_AVAILABLE
 #define EXYNOS4_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
@@ -80,6 +80,7 @@
 #define EXYNOS4X12_UART_BASE		0x13800000
 #define EXYNOS4X12_I2C_BASE		0x13860000
 #define EXYNOS4X12_PWMTIMER_BASE	0x139D0000
+#define EXYNOS4X12_ACE_SFR_BASE		0x10830000
 
 #define EXYNOS4X12_ADC_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_DP_BASE		DEVICE_NOT_AVAILABLE
@@ -87,7 +88,6 @@
 #define EXYNOS4X12_I2S_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
Signature · 1 line
1.9.0
#16 lore raw

PATCH v3 3/4 drivers: crypto: ace_sha: add implementation of hardware based lib rand

In reply to Przemyslaw Marczak

This patch adds implementation of rand library based on hardware random number generator of security subsystem in Exynos SOC.

This library includes:
- srand() - used for seed hardware block
- rand() - returns random number
- rand_r() - the same as above with given seed

which depends on CONFIG_EXYNOS_ACE_SHA and CONFIG_LIB_HW_RAND.

Change-Id Ie0b44a7fcc375dd733329b04183559f376a4e25c
cc Akshay Saraswat <[email protected]>
cc ARUN MANKUZHI <[email protected]>
cc Minkyu Kang <[email protected]>

---
Changes v2:
- none

Changes v3:
- add implementation of rand library to ace_sha
- add proper ifdef for ace_sha SHA functions
- move cpu refer change to new commit

 drivers/crypto/ace_sha.c | 76 +++++++++++++++++++++++++++++++++++++++++++++++-
 drivers/crypto/ace_sha.h |  8 +++--
 2 files changed, 80 insertions(+), 4 deletions(-)
drivers/crypto/ace_sha.c +75 -1
index acbafde..51fb92c 100644
@@ -5,10 +5,12 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 #include <common.h>
+#include "ace_sha.h"
+
+#ifdef CONFIG_SHA_HW_ACCEL
 #include <sha256.h>
 #include <sha1.h>
 #include <asm/errno.h>
-#include "ace_sha.h"
 
 /* SHA1 value for the message of zero length */
 static const unsigned char sha1_digest_emptymsg[SHA1_SUM_LEN] = {
@@ -111,3 +113,75 @@ void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,
 	if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA1))
 		debug("ACE was not setup properly or it is faulty\n");
 }
+#endif /* CONFIG_SHA_HW_ACCEL */
+
+#ifdef CONFIG_LIB_HW_RAND
+static unsigned int seed_done;
+
+void srand(unsigned int seed)
+{
+	struct exynos_ace_sfr *reg =
+		(struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
+	int i;
+
+	/* Seed data */
+	for (i = 0; i < ACE_HASH_PRNG_REG_NUM; i++)
+		writel(seed << i, &reg->hash_seed[i]);
+
+	/* Wait for seed setup done */
+	while (1) {
+		status = readl(&reg->hash_status);
+		if ((status & ACE_HASH_SEEDSETTING_MASK) ||
+		    (status & ACE_HASH_PRNGERROR_MASK))
+			break;
+	}
+
+	seed_done = 1;
+}
+
+unsigned int rand(void)
+{
+	struct exynos_ace_sfr *reg =
+		(struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
+	int status, i;
+	unsigned int seed;
+	unsigned int *seed_ptr;
+	unsigned int ret = 0;
+
+	if (!seed_done)
+		srand(seed);
+
+	/* Start PRNG */
+	writel(ACE_HASH_ENGSEL_PRNG | ACE_HASH_STARTBIT_ON, &reg->hash_control);
+
+	/* Wait for PRNG done */
+	while (1) {
+		status = readl(&reg->hash_status);
+		if (status & ACE_HASH_PRNGDONE_MASK)
+			break;
+		if (status & ACE_HASH_PRNGERROR_MASK) {
+			seed_done = 0;
+			return 0;
+		}
+	}
+
+	/* Clear Done IRQ */
+	writel(ACE_HASH_PRNGDONE_MASK, &reg->hash_status);
+
+	/* Read a PRNG result */
+	for (i = 0; i < ACE_HASH_PRNG_REG_NUM; i++)
+		ret += readl(&reg->hash_prng[i]);
+
+	seed_done = 0;
+	return ret;
+}
+
+unsigned int rand_r(unsigned int *seedp)
+{
+	seed_done = 0;
+
+	srand(*seedp);
+
+	return rand();
+}
+#endif /* CONFIG_LIB_HW_RAND */
drivers/crypto/ace_sha.h +5 -3
index a426d52..f1097f7 100644
@@ -72,9 +72,10 @@ struct exynos_ace_sfr {
 	unsigned char   res12[0x30];
 	unsigned int	hash_result[8];
 	unsigned char   res13[0x20];
-	unsigned int	hash_seed[8];
-	unsigned int	hash_prng[8];
-	unsigned char   res14[0x180];
+	unsigned int	hash_seed[5];
+	unsigned char	res14[12];
+	unsigned int	hash_prng[5];
+	unsigned char	res15[0x18c];
 
 	unsigned int	pka_sfr[5];		/* base + 0x700 */
 };
@@ -291,6 +292,7 @@ struct exynos_ace_sfr {
 #define ACE_HASH_PRNGERROR_MASK	(1 << 7)
 #define ACE_HASH_PRNGERROR_OFF		(0 << 7)
 #define ACE_HASH_PRNGERROR_ON		(1 << 7)
+#define ACE_HASH_PRNG_REG_NUM		5
 
 #define ACE_SHA_TYPE_SHA1		1
 #define ACE_SHA_TYPE_SHA256		2
Signature · 1 line
1.9.0
#17 lore raw

PATCH v3 4/4 trats/trats2: enable exynos ace sha subsystem and hardware based lib rand

In reply to Przemyslaw Marczak

This allows to use exynos random number generator.

---
Changes v2:
- none

Changes v3:
- change config name CONFIG_RAND_HW_ACCEL to CONFIG_HW_RAND

 include/configs/trats.h  | 4 ++++
 include/configs/trats2.h | 4 ++++
 2 files changed, 8 insertions(+)
include/configs/trats.h +4 -0
index 7cea259..5cf0a4d 100644
@@ -313,6 +313,10 @@
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 #define CONFIG_USB_CABLE_CHECK
 
+/* Security subsystem - enable hw_rand() */
+#define CONFIG_EXYNOS_ACE_SHA
+#define CONFIG_HW_RAND
+
 /* Common misc for Samsung */
 #define CONFIG_MISC_COMMON
 
include/configs/trats2.h +4 -0
index 6d389df..7182357 100644
@@ -324,6 +324,10 @@ int get_soft_i2c_sda_pin(void);
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 #define CONFIG_USB_CABLE_CHECK
 
+/* Security subsystem - enable hw_rand() */
+#define CONFIG_EXYNOS_ACE_SHA
+#define CONFIG_HW_RAND
+
 /* Common misc for Samsung */
 #define CONFIG_MISC_COMMON
 
Signature · 1 line
1.9.0
#18 lore raw

PATCH v4 1/4 lib: rand: introduce new configs: CONFIG_LIB_RAND and CONFIG_LIB_HW_RAND

In reply to Przemyslaw Marczak

New configs:
- CONFIG_LIB_RAND - to enable implementation of rand library in lib/rand.c
- CONFIG_LIB_HW_RAND - to enable hardware based implementations of lib rand

Other changes:
- add CONFIG_LIB_RAND to boards configs which needs rand()
- put only one rand.o dependency in lib/Makefile

CONFIG_LIB_HW_RAND should be defined for drivers which implements rand library (declared in include/common.h):
- void srand(unsigned int seed)
- unsigned int rand(void)
- unsigned int rand_r(unsigned int *seedp)

Cc Michael Walle <[email protected]>
Cc Tom Rini <[email protected]>
Cc Masahiro Yamada <[email protected]>

---
Changes v3:
- new commit

Changes v4:
- cosmetic change in commit subject

---
 include/common.h                  | 4 +---
 include/configs/MERGERBOX.h       | 1 +
 include/configs/MVBC_P.h          | 1 +
 include/configs/MVBLM7.h          | 1 +
 include/configs/MVSMR.h           | 1 +
 include/configs/a3m071.h          | 1 +
 include/configs/bfin_adi_common.h | 1 +
 include/configs/lsxl.h            | 1 +
 include/configs/sacsng.h          | 1 +
 lib/Makefile                      | 4 +---
 10 files changed, 10 insertions(+), 6 deletions(-)
include/common.h +1 -3
index 090fcde..fcf4318 100644
@@ -829,9 +829,7 @@ char *	strmhz(char *buf, unsigned long hz);
 #include <u-boot/crc.h>
 
 /* lib/rand.c */
-#if defined(CONFIG_RANDOM_MACADDR) || \
-	defined(CONFIG_BOOTP_RANDOM_DELAY) || \
-	defined(CONFIG_CMD_LINK_LOCAL)
+#if defined(CONFIG_LIB_RAND) || defined(CONFIG_LIB_HW_RAND)
 #define RAND_MAX -1U
 void srand(unsigned int seed);
 unsigned int rand(void);
include/configs/MERGERBOX.h +1 -0
index 930699b..19ea316 100644
@@ -312,6 +312,7 @@
 #define CONFIG_BOOTP_NTPSERVER
 #define CONFIG_BOOTP_RANDOM_DELAY
 #define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_LIB_RAND
 
 /*
  * Command line configuration.
include/configs/MVBC_P.h +1 -0
index 99e4e90..036396c 100644
@@ -104,6 +104,7 @@
 #define CONFIG_BOOTP_NTPSERVER
 #define CONFIG_BOOTP_RANDOM_DELAY
 #define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_LIB_RAND
 
 /*
  * Autoboot
include/configs/MVBLM7.h +1 -0
index 30af691..27c2fa0 100644
@@ -227,6 +227,7 @@
 #define CONFIG_BOOTP_NTPSERVER
 #define CONFIG_BOOTP_RANDOM_DELAY
 #define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_LIB_RAND
 
 /* USB */
 #define CONFIG_SYS_USB_HOST
include/configs/MVSMR.h +1 -0
index bb565b6..ad15506 100644
@@ -92,6 +92,7 @@
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_BOOTP_VENDOREX
+#define CONFIG_LIB_RAND
 
 /*
  * Autoboot
include/configs/a3m071.h +1 -0
index 1e65cd1..205adfd 100644
@@ -58,6 +58,7 @@
 #define CONFIG_BOOTP_SERVERIP
 #define CONFIG_NET_RETRY_COUNT 3
 #define CONFIG_CMD_LINK_LOCAL
+#define CONFIG_LIB_RAND
 #define CONFIG_NETCONSOLE
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define CONFIG_CMD_PING
include/configs/bfin_adi_common.h +1 -0
index 08ccce0..ea9acf6 100644
@@ -17,6 +17,7 @@
 #  define CONFIG_BOOTP_DNS
 #  define CONFIG_BOOTP_NTPSERVER
 #  define CONFIG_BOOTP_RANDOM_DELAY
+#  define CONFIG_LIB_RAND
 #  define CONFIG_KEEP_SERVERADDR
 #  define CONFIG_CMD_DNS
 #  define CONFIG_CMD_PING
include/configs/lsxl.h +1 -0
index 2ae8a27..96a889f 100644
@@ -37,6 +37,7 @@
 #define CONFIG_SHOW_BOOT_PROGRESS
 
 #define CONFIG_RANDOM_MACADDR
+#define CONFIG_LIB_RAND
 #define CONFIG_KIRKWOOD_GPIO
 #define CONFIG_OF_LIBFDT
 
include/configs/sacsng.h +1 -0
index 0a694fb..b5064ab 100644
@@ -457,6 +457,7 @@
 #endif /* CONFIG_BOOT_ROOT_NFS */
 
 #define CONFIG_BOOTP_RANDOM_DELAY       /* Randomize the BOOTP retry delay */
+#define CONFIG_LIB_RAND
 
 /*
  * BOOTP options
lib/Makefile +1 -3
index 8814ff9..ae80865 100644
@@ -62,8 +62,6 @@ obj-y += time.o
 obj-$(CONFIG_TRACE) += trace.o
 obj-$(CONFIG_BOOTP_PXE) += uuid.o
 obj-y += vsprintf.o
-obj-$(CONFIG_RANDOM_MACADDR) += rand.o
-obj-$(CONFIG_BOOTP_RANDOM_DELAY) += rand.o
-obj-$(CONFIG_CMD_LINK_LOCAL) += rand.o
+obj-$(CONFIG_LIB_RAND) += rand.o
 
 subdir-ccflags-$(CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED) += -O2
Signature · 1 line
1.9.0
#19 lore raw

PATCH v4 1/4 lib: rand: introduce new configs: CONFIG_LIB_RAND and CONFIG_LIB_HW_RAND

Hi all,

Quoted 14 lines · Przemyslaw Marczak

New configs:
- CONFIG_LIB_RAND - to enable implementation of rand library in lib/rand.c
- CONFIG_LIB_HW_RAND - to enable hardware based implementations of lib rand

Other changes:
- add CONFIG_LIB_RAND to boards configs which needs rand()
- put only one rand.o dependency in lib/Makefile

CONFIG_LIB_HW_RAND should be defined for drivers which implements rand library (declared in include/common.h):
- void srand(unsigned int seed)
- unsigned int rand(void)
- unsigned int rand_r(unsigned int *seedp)

Quoted 4 lines
Cc Michael Walle <[email protected]>
Cc Tom Rini <[email protected]>
Cc Masahiro Yamada <[email protected]>

I catch myself on a mistake after removing my test code, so here is a V4 version.
Sorry for this.
Thanks

Signature · 4 lines
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marczak at samsung.com
#20 lore raw

PATCH v4 1/4 lib: rand: introduce new configs: CONFIG_LIB_RAND and CONFIG_LIB_HW_RAND

Quoted 17 lines · Przemyslaw Marczak

Hi all,

Quoted 14 lines · Przemyslaw Marczak

New configs:
- CONFIG_LIB_RAND - to enable implementation of rand library in lib/rand.c
- CONFIG_LIB_HW_RAND - to enable hardware based implementations of lib rand

Other changes:
- add CONFIG_LIB_RAND to boards configs which needs rand()
- put only one rand.o dependency in lib/Makefile

CONFIG_LIB_HW_RAND should be defined for drivers which implements rand library (declared in include/common.h):
- void srand(unsigned int seed)
- unsigned int rand(void)
- unsigned int rand_r(unsigned int *seedp)

Quoted 8 lines
Quoted 4 lines
Cc Michael Walle <[email protected]>
Cc Tom Rini <[email protected]>
Cc Masahiro Yamada <[email protected]>

I catch myself on a mistake after removing my test code, so here is a V4 version.
Sorry for this.

To be clear, problem in v3 which is why you sent v4. v4 looks fine so:

Signature · 8 lines
Tom
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#21 lore raw

PATCH v4 2/4 cpu: exynos4: add ace sha base address

In reply to Przemyslaw Marczak

---
Changes v3:
- new commit - after separate changes from next commit

Changes v4:
- none

---
 arch/arm/include/asm/arch-exynos/cpu.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/include/asm/arch-exynos/cpu.h +2 -2
index bccce63..bd3300a 100644
@@ -44,11 +44,11 @@
 #define EXYNOS4_MODEM_BASE		0x13A00000
 #define EXYNOS4_USBPHY_CONTROL		0x10020704
 #define EXYNOS4_I2S_BASE		0xE2100000
+#define EXYNOS4_ACE_SFR_BASE		0x10830000
 
 #define EXYNOS4_GPIO_PART4_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DP_BASE			DEVICE_NOT_AVAILABLE
 #define EXYNOS4_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
@@ -80,6 +80,7 @@
 #define EXYNOS4X12_UART_BASE		0x13800000
 #define EXYNOS4X12_I2C_BASE		0x13860000
 #define EXYNOS4X12_PWMTIMER_BASE	0x139D0000
+#define EXYNOS4X12_ACE_SFR_BASE		0x10830000
 
 #define EXYNOS4X12_ADC_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_DP_BASE		DEVICE_NOT_AVAILABLE
@@ -87,7 +88,6 @@
 #define EXYNOS4X12_I2S_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
Signature · 1 line
1.9.0
#22 lore raw

PATCH v4 2/4 cpu: exynos4: add ace sha base address

Quoted 2 lines · Przemyslaw Marczak
Signature · 8 lines
Tom
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#23 lore raw

PATCH v4 2/4 cpu: exynos4: add ace sha base address

In reply to Przemyslaw Marczak

Dear Przemyslaw Marczak,

Quoted 19 lines · Przemyslaw Marczak

---
Changes v3:
- new commit - after separate changes from next commit

Changes v4:
- none

---
 arch/arm/include/asm/arch-exynos/cpu.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/include/asm/arch-exynos/cpu.h +0 -0
index bccce63..bd3300a 100644

arch/arm/include/asm/arch-exynos/cpu.h line 48

Quoted 5 lines
arch/arm/include/asm/arch-exynos/cpu.h +1 -0
@@ -44,11 +44,11 @@
 #define EXYNOS4_MODEM_BASE             0x13A00000
 #define EXYNOS4_USBPHY_CONTROL         0x10020704
 #define EXYNOS4_I2S_BASE               0xE2100000
+#define EXYNOS4_ACE_SFR_BASE           0x10830000
 

Could you please align this list?

Quoted 9 lines
arch/arm/include/asm/arch-exynos/cpu.h +0 -1
 #define EXYNOS4_GPIO_PART4_BASE                DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DP_BASE                        DEVICE_NOT_AVAILABLE
 #define EXYNOS4_SPI_ISP_BASE           DEVICE_NOT_AVAILABLE
-#define EXYNOS4_ACE_SFR_BASE           DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DMC_PHY_BASE           DEVICE_NOT_AVAILABLE
 #define EXYNOS4_AUDIOSS_BASE           DEVICE_NOT_AVAILABLE
 #define EXYNOS4_USB_HOST_XHCI_BASE     DEVICE_NOT_AVAILABLE

arch/arm/include/asm/arch-exynos/cpu.h line 84

Quoted 5 lines
arch/arm/include/asm/arch-exynos/cpu.h +1 -0
@@ -80,6 +80,7 @@
 #define EXYNOS4X12_UART_BASE           0x13800000
 #define EXYNOS4X12_I2C_BASE            0x13860000
 #define EXYNOS4X12_PWMTIMER_BASE       0x139D0000
+#define EXYNOS4X12_ACE_SFR_BASE                0x10830000
 

ditto.

Quoted 19 lines
arch/arm/include/asm/arch-exynos/cpu.h +0 -2
 #define EXYNOS4X12_ADC_BASE            DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_DP_BASE             DEVICE_NOT_AVAILABLE
@@ -87,7 +88,6 @@
 #define EXYNOS4X12_I2S_BASE            DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_BASE            DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_ISP_BASE                DEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_ACE_SFR_BASE                DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_DMC_PHY_BASE                DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_AUDIOSS_BASE                DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_USB_HOST_XHCI_BASE  DEVICE_NOT_AVAILABLE
--

1.9.0

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Signature · 2 lines
from. prom.
www.promsoft.net
#24 lore raw

PATCH v4 2/4 cpu: exynos4: add ace sha base address

Hello Minkyu,

Quoted 18 lines · Minkyu Kang

Dear Przemyslaw Marczak,

Quoted 13 lines · Przemyslaw Marczak

---
Changes v3:
- new commit - after separate changes from next commit

Changes v4:
- none

---
  arch/arm/include/asm/arch-exynos/cpu.h | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
Quoted 15 lines

arch/arm/include/asm/arch-exynos/cpu.h line 48

Quoted 11 lines
arch/arm/include/asm/arch-exynos/cpu.h +1 -0
index bccce63..bd3300a 100644
@@ -44,11 +44,11 @@
  #define EXYNOS4_MODEM_BASE             0x13A00000
  #define EXYNOS4_USBPHY_CONTROL         0x10020704
  #define EXYNOS4_I2S_BASE               0xE2100000
+#define EXYNOS4_ACE_SFR_BASE           0x10830000
 

Could you please align this list?

I am not sure why this is not aligned in patch - it was generated by "git format patch". The source was aligned and after apply this patch by "git am" the code is also aligned.

Thanks

Signature · 4 lines
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marczak at samsung.com
#25 lore raw

PATCH v4 2/4 cpu: exynos4: add ace sha base address

Quoted 37 lines · Przemyslaw Marczak

Hello Minkyu,

Quoted 18 lines · Minkyu Kang

Dear Przemyslaw Marczak,

Quoted 13 lines · Przemyslaw Marczak

---
Changes v3:
- new commit - after separate changes from next commit

Changes v4:
- none

---
  arch/arm/include/asm/arch-exynos/cpu.h | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
Quoted 15 lines

arch/arm/include/asm/arch-exynos/cpu.h line 48

Quoted 11 lines
arch/arm/include/asm/arch-exynos/cpu.h +1 -0
index bccce63..bd3300a 100644
@@ -44,11 +44,11 @@
  #define EXYNOS4_MODEM_BASE             0x13A00000
  #define EXYNOS4_USBPHY_CONTROL         0x10020704
  #define EXYNOS4_I2S_BASE               0xE2100000
+#define EXYNOS4_ACE_SFR_BASE           0x10830000
 

Could you please align this list?

Quoted 1 line

I am not sure why this is not aligned in patch - it was generated by "git format patch". The source was aligned and after apply this patch by "git am" the code is also aligned.

hm, sorry to misunderstanding.
It means the ordering.
I want to keep ordering of this list by base address. (although it looks already broken)

#define EXYNOS4_DMC_CTRL_BASE 0x10400000
+#define EXYNOS4_ACE_SFR_BASE 0x10830000
#define EXYNOS4_GPIO_PART2_BASE 0x11000000

Thanks,
Minkyu Kang.

#26 lore raw

PATCH v4 2/4 cpu: exynos4: add ace sha base address

Hello Minkyu,

Quoted 44 lines · Minkyu Kang
Quoted 37 lines · Przemyslaw Marczak

Hello Minkyu,

Quoted 18 lines · Minkyu Kang

Dear Przemyslaw Marczak,

Quoted 13 lines · Przemyslaw Marczak

---
Changes v3:
- new commit - after separate changes from next commit

Changes v4:
- none

---
   arch/arm/include/asm/arch-exynos/cpu.h | 4 ++--
   1 file changed, 2 insertions(+), 2 deletions(-)
Quoted 15 lines

arch/arm/include/asm/arch-exynos/cpu.h line 48

Quoted 11 lines
arch/arm/include/asm/arch-exynos/cpu.h +1 -0
index bccce63..bd3300a 100644
@@ -44,11 +44,11 @@
   #define EXYNOS4_MODEM_BASE             0x13A00000
   #define EXYNOS4_USBPHY_CONTROL         0x10020704
   #define EXYNOS4_I2S_BASE               0xE2100000
+#define EXYNOS4_ACE_SFR_BASE           0x10830000
 

Could you please align this list?

Quoted 1 line

I am not sure why this is not aligned in patch - it was generated by "git format patch". The source was aligned and after apply this patch by "git am" the code is also aligned.

hm, sorry to misunderstanding.
It means the ordering.
I want to keep ordering of this list by base address. (although it looks already broken)

Quoted 7 lines

#define EXYNOS4_DMC_CTRL_BASE 0x10400000
+#define EXYNOS4_ACE_SFR_BASE 0x10830000
#define EXYNOS4_GPIO_PART2_BASE 0x11000000

Thanks,
Minkyu Kang.

ok, I will move those lines for proper address order.

Thanks

Signature · 4 lines
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marczak at samsung.com
#27 lore raw

PATCH v4 3/4 drivers: crypto: ace_sha: add implementation of hardware based lib rand

In reply to Przemyslaw Marczak

This patch adds implementation of rand library based on hardware random number generator of security subsystem in Exynos SOC.

This library includes:
- srand() - used for seed hardware block
- rand() - returns random number
- rand_r() - the same as above with given seed

which depends on CONFIG_EXYNOS_ACE_SHA and CONFIG_LIB_HW_RAND.

cc Akshay Saraswat <[email protected]>
cc ARUN MANKUZHI <[email protected]>
cc Minkyu Kang <[email protected]>
Cc Michael Walle <[email protected]>
Cc Tom Rini <[email protected]>
Cc Masahiro Yamada <[email protected]>

---
Changes v2:
- none

Changes v3:
- add implementation of rand library to ace_sha
- add proper ifdef for ace_sha SHA functions
- move cpu refer change to new commit

Changes v4:
- remove unused variables

---
 drivers/crypto/ace_sha.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++-
 drivers/crypto/ace_sha.h |  8 ++++--
 2 files changed, 77 insertions(+), 4 deletions(-)
drivers/crypto/ace_sha.c +72 -1
index acbafde..ed4f541 100644
@@ -5,10 +5,12 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 #include <common.h>
+#include "ace_sha.h"
+
+#ifdef CONFIG_SHA_HW_ACCEL
 #include <sha256.h>
 #include <sha1.h>
 #include <asm/errno.h>
-#include "ace_sha.h"
 
 /* SHA1 value for the message of zero length */
 static const unsigned char sha1_digest_emptymsg[SHA1_SUM_LEN] = {
@@ -111,3 +113,72 @@ void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,
 	if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA1))
 		debug("ACE was not setup properly or it is faulty\n");
 }
+#endif /* CONFIG_SHA_HW_ACCEL */
+
+#ifdef CONFIG_LIB_HW_RAND
+static unsigned int seed_done;
+
+void srand(unsigned int seed)
+{
+	struct exynos_ace_sfr *reg =
+		(struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
+	int i, status;
+
+	/* Seed data */
+	for (i = 0; i < ACE_HASH_PRNG_REG_NUM; i++)
+		writel(seed << i, &reg->hash_seed[i]);
+
+	/* Wait for seed setup done */
+	while (1) {
+		status = readl(&reg->hash_status);
+		if ((status & ACE_HASH_SEEDSETTING_MASK) ||
+		    (status & ACE_HASH_PRNGERROR_MASK))
+			break;
+	}
+
+	seed_done = 1;
+}
+
+unsigned int rand(void)
+{
+	struct exynos_ace_sfr *reg =
+		(struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
+	int i, status;
+	unsigned int seed = (unsigned int)&status;
+	unsigned int ret = 0;
+
+	if (!seed_done)
+		srand(seed);
+
+	/* Start PRNG */
+	writel(ACE_HASH_ENGSEL_PRNG | ACE_HASH_STARTBIT_ON, &reg->hash_control);
+
+	/* Wait for PRNG done */
+	while (1) {
+		status = readl(&reg->hash_status);
+		if (status & ACE_HASH_PRNGDONE_MASK)
+			break;
+		if (status & ACE_HASH_PRNGERROR_MASK) {
+			seed_done = 0;
+			return 0;
+		}
+	}
+
+	/* Clear Done IRQ */
+	writel(ACE_HASH_PRNGDONE_MASK, &reg->hash_status);
+
+	/* Read a PRNG result */
+	for (i = 0; i < ACE_HASH_PRNG_REG_NUM; i++)
+		ret += readl(&reg->hash_prng[i]);
+
+	seed_done = 0;
+	return ret;
+}
+
+unsigned int rand_r(unsigned int *seedp)
+{
+	srand(*seedp);
+
+	return rand();
+}
+#endif /* CONFIG_LIB_HW_RAND */
drivers/crypto/ace_sha.h +5 -3
index a426d52..f1097f7 100644
@@ -72,9 +72,10 @@ struct exynos_ace_sfr {
 	unsigned char   res12[0x30];
 	unsigned int	hash_result[8];
 	unsigned char   res13[0x20];
-	unsigned int	hash_seed[8];
-	unsigned int	hash_prng[8];
-	unsigned char   res14[0x180];
+	unsigned int	hash_seed[5];
+	unsigned char	res14[12];
+	unsigned int	hash_prng[5];
+	unsigned char	res15[0x18c];
 
 	unsigned int	pka_sfr[5];		/* base + 0x700 */
 };
@@ -291,6 +292,7 @@ struct exynos_ace_sfr {
 #define ACE_HASH_PRNGERROR_MASK	(1 << 7)
 #define ACE_HASH_PRNGERROR_OFF		(0 << 7)
 #define ACE_HASH_PRNGERROR_ON		(1 << 7)
+#define ACE_HASH_PRNG_REG_NUM		5
 
 #define ACE_SHA_TYPE_SHA1		1
 #define ACE_SHA_TYPE_SHA256		2
Signature · 1 line
1.9.0
#28 lore raw

PATCH v4 3/4 drivers: crypto: ace_sha: add implementation of hardware based lib rand

Quoted 9 lines · Przemyslaw Marczak

This patch adds implementation of rand library based on hardware random number generator of security subsystem in Exynos SOC.

This library includes:
- srand() - used for seed hardware block
- rand() - returns random number
- rand_r() - the same as above with given seed

which depends on CONFIG_EXYNOS_ACE_SHA and CONFIG_LIB_HW_RAND.

Signature · 8 lines
Tom
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#29 lore raw

PATCH v4 4/4 trats/trats2: enable exynos ace sha subsystem and hardware based lib rand

In reply to Przemyslaw Marczak

This allows to use exynos random number generator by enabling configs:
- CONFIG_EXYNOS_ACE_SHA
- CONFIG_LIB_HW_RAND

---
Changes v2:
- none

Changes v3:
- change config name CONFIG_RAND_HW_ACCEL to CONFIG_LIB_HW_RAND

Changes v4:
- correct config name to CONFIG_LIB_HW_RAND after mistake
- add more info to commit message

---
 include/configs/trats.h  | 4 ++++
 include/configs/trats2.h | 4 ++++
 2 files changed, 8 insertions(+)
include/configs/trats.h +4 -0
index 7cea259..c00d60a 100644
@@ -313,6 +313,10 @@
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 #define CONFIG_USB_CABLE_CHECK
 
+/* Security subsystem - enable hw_rand() */
+#define CONFIG_EXYNOS_ACE_SHA
+#define CONFIG_LIB_HW_RAND
+
 /* Common misc for Samsung */
 #define CONFIG_MISC_COMMON
 
include/configs/trats2.h +4 -0
index 6d389df..59896b1 100644
@@ -324,6 +324,10 @@ int get_soft_i2c_sda_pin(void);
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 #define CONFIG_USB_CABLE_CHECK
 
+/* Security subsystem - enable hw_rand() */
+#define CONFIG_EXYNOS_ACE_SHA
+#define CONFIG_LIB_HW_RAND
+
 /* Common misc for Samsung */
 #define CONFIG_MISC_COMMON
 
Signature · 1 line
1.9.0
#30 lore raw

PATCH v4 4/4 trats/trats2: enable exynos ace sha subsystem and hardware based lib rand

Quoted 8 lines · Przemyslaw Marczak

This allows to use exynos random number generator by enabling configs:
- CONFIG_EXYNOS_ACE_SHA
- CONFIG_LIB_HW_RAND

Signature · 8 lines
Tom
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#31 lore raw

PATCH v5 1/4 lib: rand: introduce new configs: CONFIG_LIB_RAND and CONFIG_LIB_HW_RAND

In reply to Przemyslaw Marczak

New configs:
- CONFIG_LIB_RAND - to enable implementation of rand library in lib/rand.c
- CONFIG_LIB_HW_RAND - to enable hardware based implementations of lib rand

Other changes:
- add CONFIG_LIB_RAND to boards configs which needs rand()
- put only one rand.o dependency in lib/Makefile

CONFIG_LIB_HW_RAND should be defined for drivers which implements rand library (declared in include/common.h):
- void srand(unsigned int seed)
- unsigned int rand(void)
- unsigned int rand_r(unsigned int *seedp)

Cc Michael Walle <[email protected]>
Cc Tom Rini <[email protected]>
Cc Masahiro Yamada <[email protected]>

---
Changes v3:
- new commit

Changes v4:
- cosmetic change in commit subject

Changes v5:
- none

---
 include/common.h                  | 4 +---
 include/configs/MERGERBOX.h       | 1 +
 include/configs/MVBC_P.h          | 1 +
 include/configs/MVBLM7.h          | 1 +
 include/configs/MVSMR.h           | 1 +
 include/configs/a3m071.h          | 1 +
 include/configs/bfin_adi_common.h | 1 +
 include/configs/lsxl.h            | 1 +
 include/configs/sacsng.h          | 1 +
 lib/Makefile                      | 4 +---
 10 files changed, 10 insertions(+), 6 deletions(-)
include/common.h +1 -3
index 090fcde..fcf4318 100644
@@ -829,9 +829,7 @@ char *	strmhz(char *buf, unsigned long hz);
 #include <u-boot/crc.h>
 
 /* lib/rand.c */
-#if defined(CONFIG_RANDOM_MACADDR) || \
-	defined(CONFIG_BOOTP_RANDOM_DELAY) || \
-	defined(CONFIG_CMD_LINK_LOCAL)
+#if defined(CONFIG_LIB_RAND) || defined(CONFIG_LIB_HW_RAND)
 #define RAND_MAX -1U
 void srand(unsigned int seed);
 unsigned int rand(void);
include/configs/MERGERBOX.h +1 -0
index 930699b..19ea316 100644
@@ -312,6 +312,7 @@
 #define CONFIG_BOOTP_NTPSERVER
 #define CONFIG_BOOTP_RANDOM_DELAY
 #define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_LIB_RAND
 
 /*
  * Command line configuration.
include/configs/MVBC_P.h +1 -0
index 99e4e90..036396c 100644
@@ -104,6 +104,7 @@
 #define CONFIG_BOOTP_NTPSERVER
 #define CONFIG_BOOTP_RANDOM_DELAY
 #define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_LIB_RAND
 
 /*
  * Autoboot
include/configs/MVBLM7.h +1 -0
index 30af691..27c2fa0 100644
@@ -227,6 +227,7 @@
 #define CONFIG_BOOTP_NTPSERVER
 #define CONFIG_BOOTP_RANDOM_DELAY
 #define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_LIB_RAND
 
 /* USB */
 #define CONFIG_SYS_USB_HOST
include/configs/MVSMR.h +1 -0
index bb565b6..ad15506 100644
@@ -92,6 +92,7 @@
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_BOOTP_VENDOREX
+#define CONFIG_LIB_RAND
 
 /*
  * Autoboot
include/configs/a3m071.h +1 -0
index 1e65cd1..205adfd 100644
@@ -58,6 +58,7 @@
 #define CONFIG_BOOTP_SERVERIP
 #define CONFIG_NET_RETRY_COUNT 3
 #define CONFIG_CMD_LINK_LOCAL
+#define CONFIG_LIB_RAND
 #define CONFIG_NETCONSOLE
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define CONFIG_CMD_PING
include/configs/bfin_adi_common.h +1 -0
index 08ccce0..ea9acf6 100644
@@ -17,6 +17,7 @@
 #  define CONFIG_BOOTP_DNS
 #  define CONFIG_BOOTP_NTPSERVER
 #  define CONFIG_BOOTP_RANDOM_DELAY
+#  define CONFIG_LIB_RAND
 #  define CONFIG_KEEP_SERVERADDR
 #  define CONFIG_CMD_DNS
 #  define CONFIG_CMD_PING
include/configs/lsxl.h +1 -0
index 2ae8a27..96a889f 100644
@@ -37,6 +37,7 @@
 #define CONFIG_SHOW_BOOT_PROGRESS
 
 #define CONFIG_RANDOM_MACADDR
+#define CONFIG_LIB_RAND
 #define CONFIG_KIRKWOOD_GPIO
 #define CONFIG_OF_LIBFDT
 
include/configs/sacsng.h +1 -0
index 0a694fb..b5064ab 100644
@@ -457,6 +457,7 @@
 #endif /* CONFIG_BOOT_ROOT_NFS */
 
 #define CONFIG_BOOTP_RANDOM_DELAY       /* Randomize the BOOTP retry delay */
+#define CONFIG_LIB_RAND
 
 /*
  * BOOTP options
lib/Makefile +1 -3
index 8814ff9..ae80865 100644
@@ -62,8 +62,6 @@ obj-y += time.o
 obj-$(CONFIG_TRACE) += trace.o
 obj-$(CONFIG_BOOTP_PXE) += uuid.o
 obj-y += vsprintf.o
-obj-$(CONFIG_RANDOM_MACADDR) += rand.o
-obj-$(CONFIG_BOOTP_RANDOM_DELAY) += rand.o
-obj-$(CONFIG_CMD_LINK_LOCAL) += rand.o
+obj-$(CONFIG_LIB_RAND) += rand.o
 
 subdir-ccflags-$(CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED) += -O2
Signature · 1 line
1.9.0
#32 lore raw

PATCH v5 1/4 lib: rand: introduce new configs: CONFIG_LIB_RAND and CONFIG_LIB_HW_RAND

Hello Tom,

Quoted 23 lines · Przemyslaw Marczak

New configs:
- CONFIG_LIB_RAND - to enable implementation of rand library in lib/rand.c
- CONFIG_LIB_HW_RAND - to enable hardware based implementations of lib rand

Other changes:
- add CONFIG_LIB_RAND to boards configs which needs rand()
- put only one rand.o dependency in lib/Makefile

CONFIG_LIB_HW_RAND should be defined for drivers which implements rand library (declared in include/common.h):
- void srand(unsigned int seed)
- unsigned int rand(void)
- unsigned int rand_r(unsigned int *seedp)

Cc Michael Walle <[email protected]>
Cc Tom Rini <[email protected]>
Cc Masahiro Yamada <[email protected]>

---
Changes v3:
- new commit

Quoted 5 lines

Changes v4:
- cosmetic change in commit subject

Changes v5:
- none

This patch set is rebased onto u-boot master. Could you apply this in the next few days? Then I will rebase and send again patch set for UUID generation feature starting from this patch:
http://patchwork.ozlabs.org/patch/331816/

Thanks

Signature · 4 lines
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marczak at samsung.com
#33 lore raw

PATCH v5 2/4 cpu: exynos4: add ace sha base address

In reply to Przemyslaw Marczak

---
Changes v3:
- new commit - after separate changes from next commit

Changes v4:
- none

Changes v5:
- put base addresses in growing order

---
 arch/arm/include/asm/arch-exynos/cpu.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
arch/arm/include/asm/arch-exynos/cpu.h +4 -4
index bccce63..fdf73b5 100644
@@ -25,8 +25,9 @@
 #define EXYNOS4_SYSTIMER_BASE		0x10050000
 #define EXYNOS4_WATCHDOG_BASE		0x10060000
 #define EXYNOS4_TZPC_BASE		0x10110000
-#define EXYNOS4_MIU_BASE		0x10600000
 #define EXYNOS4_DMC_CTRL_BASE		0x10400000
+#define EXYNOS4_MIU_BASE		0x10600000
+#define EXYNOS4_ACE_SFR_BASE		0x10830000
 #define EXYNOS4_GPIO_PART2_BASE		0x11000000
 #define EXYNOS4_GPIO_PART1_BASE		0x11400000
 #define EXYNOS4_FIMD_BASE		0x11C00000
@@ -48,7 +49,6 @@
 #define EXYNOS4_GPIO_PART4_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DP_BASE			DEVICE_NOT_AVAILABLE
 #define EXYNOS4_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
@@ -68,6 +68,7 @@
 #define EXYNOS4X12_TZPC_BASE		0x10110000
 #define EXYNOS4X12_DMC_CTRL_BASE	0x10600000
 #define EXYNOS4X12_GPIO_PART4_BASE	0x106E0000
+#define EXYNOS4X12_ACE_SFR_BASE		0x10830000
 #define EXYNOS4X12_GPIO_PART2_BASE	0x11000000
 #define EXYNOS4X12_GPIO_PART1_BASE	0x11400000
 #define EXYNOS4X12_FIMD_BASE		0x11C00000
@@ -87,7 +88,6 @@
 #define EXYNOS4X12_I2S_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_ACE_SFR_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_DMC_PHY_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_AUDIOSS_BASE		DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_USB_HOST_XHCI_BASE	DEVICE_NOT_AVAILABLE
@@ -106,7 +106,7 @@
 #define EXYNOS5_SYSREG_BASE		0x10050000
 #define EXYNOS5_TZPC_BASE		0x10100000
 #define EXYNOS5_WATCHDOG_BASE		0x101D0000
-#define EXYNOS5_ACE_SFR_BASE            0x10830000
+#define EXYNOS5_ACE_SFR_BASE		0x10830000
 #define EXYNOS5_DMC_PHY_BASE		0x10C00000
 #define EXYNOS5_GPIO_PART3_BASE		0x10D10000
 #define EXYNOS5_DMC_CTRL_BASE		0x10DD0000
Signature · 1 line
1.9.0
#34 lore raw

PATCH v5 2/4 cpu: exynos4: add ace sha base address

Quoted 2 lines · Przemyslaw Marczak

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#35 lore raw

PATCH v5 3/4 drivers: crypto: ace_sha: add implementation of hardware based lib rand

In reply to Przemyslaw Marczak

This patch adds implementation of rand library based on hardware random number generator of security subsystem in Exynos SOC.

This library includes:
- srand() - used for seed hardware block
- rand() - returns random number
- rand_r() - the same as above with given seed

which depends on CONFIG_EXYNOS_ACE_SHA and CONFIG_LIB_HW_RAND.

cc Akshay Saraswat <[email protected]>
cc ARUN MANKUZHI <[email protected]>
cc Minkyu Kang <[email protected]>
Cc Michael Walle <[email protected]>
Cc Tom Rini <[email protected]>
Cc Masahiro Yamada <[email protected]>

---
Changes v2:
- none

Changes v3:
- add implementation of rand library to ace_sha
- add proper ifdef for ace_sha SHA functions
- move cpu refer change to new commit

Changes v4:
- remove unused variables

Changes v5:
- none

---
 drivers/crypto/ace_sha.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++-
 drivers/crypto/ace_sha.h |  8 ++++--
 2 files changed, 77 insertions(+), 4 deletions(-)
drivers/crypto/ace_sha.c +72 -1
index acbafde..ed4f541 100644
@@ -5,10 +5,12 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 #include <common.h>
+#include "ace_sha.h"
+
+#ifdef CONFIG_SHA_HW_ACCEL
 #include <sha256.h>
 #include <sha1.h>
 #include <asm/errno.h>
-#include "ace_sha.h"
 
 /* SHA1 value for the message of zero length */
 static const unsigned char sha1_digest_emptymsg[SHA1_SUM_LEN] = {
@@ -111,3 +113,72 @@ void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,
 	if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA1))
 		debug("ACE was not setup properly or it is faulty\n");
 }
+#endif /* CONFIG_SHA_HW_ACCEL */
+
+#ifdef CONFIG_LIB_HW_RAND
+static unsigned int seed_done;
+
+void srand(unsigned int seed)
+{
+	struct exynos_ace_sfr *reg =
+		(struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
+	int i, status;
+
+	/* Seed data */
+	for (i = 0; i < ACE_HASH_PRNG_REG_NUM; i++)
+		writel(seed << i, &reg->hash_seed[i]);
+
+	/* Wait for seed setup done */
+	while (1) {
+		status = readl(&reg->hash_status);
+		if ((status & ACE_HASH_SEEDSETTING_MASK) ||
+		    (status & ACE_HASH_PRNGERROR_MASK))
+			break;
+	}
+
+	seed_done = 1;
+}
+
+unsigned int rand(void)
+{
+	struct exynos_ace_sfr *reg =
+		(struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
+	int i, status;
+	unsigned int seed = (unsigned int)&status;
+	unsigned int ret = 0;
+
+	if (!seed_done)
+		srand(seed);
+
+	/* Start PRNG */
+	writel(ACE_HASH_ENGSEL_PRNG | ACE_HASH_STARTBIT_ON, &reg->hash_control);
+
+	/* Wait for PRNG done */
+	while (1) {
+		status = readl(&reg->hash_status);
+		if (status & ACE_HASH_PRNGDONE_MASK)
+			break;
+		if (status & ACE_HASH_PRNGERROR_MASK) {
+			seed_done = 0;
+			return 0;
+		}
+	}
+
+	/* Clear Done IRQ */
+	writel(ACE_HASH_PRNGDONE_MASK, &reg->hash_status);
+
+	/* Read a PRNG result */
+	for (i = 0; i < ACE_HASH_PRNG_REG_NUM; i++)
+		ret += readl(&reg->hash_prng[i]);
+
+	seed_done = 0;
+	return ret;
+}
+
+unsigned int rand_r(unsigned int *seedp)
+{
+	srand(*seedp);
+
+	return rand();
+}
+#endif /* CONFIG_LIB_HW_RAND */
drivers/crypto/ace_sha.h +5 -3
index a426d52..f1097f7 100644
@@ -72,9 +72,10 @@ struct exynos_ace_sfr {
 	unsigned char   res12[0x30];
 	unsigned int	hash_result[8];
 	unsigned char   res13[0x20];
-	unsigned int	hash_seed[8];
-	unsigned int	hash_prng[8];
-	unsigned char   res14[0x180];
+	unsigned int	hash_seed[5];
+	unsigned char	res14[12];
+	unsigned int	hash_prng[5];
+	unsigned char	res15[0x18c];
 
 	unsigned int	pka_sfr[5];		/* base + 0x700 */
 };
@@ -291,6 +292,7 @@ struct exynos_ace_sfr {
 #define ACE_HASH_PRNGERROR_MASK	(1 << 7)
 #define ACE_HASH_PRNGERROR_OFF		(0 << 7)
 #define ACE_HASH_PRNGERROR_ON		(1 << 7)
+#define ACE_HASH_PRNG_REG_NUM		5
 
 #define ACE_SHA_TYPE_SHA1		1
 #define ACE_SHA_TYPE_SHA256		2
Signature · 1 line
1.9.0
#36 lore raw

PATCH v5 3/4 drivers: crypto: ace_sha: add implementation of hardware based lib rand

Quoted 10 lines · Przemyslaw Marczak

This patch adds implementation of rand library based on hardware random number generator of security subsystem in Exynos SOC.

This library includes:
- srand() - used for seed hardware block
- rand() - returns random number
- rand_r() - the same as above with given seed

which depends on CONFIG_EXYNOS_ACE_SHA and CONFIG_LIB_HW_RAND.

Quoted 7 lines
cc Akshay Saraswat <[email protected]>
cc ARUN MANKUZHI <[email protected]>
cc Minkyu Kang <[email protected]>
Cc Michael Walle <[email protected]>
Cc Tom Rini <[email protected]>
Cc Masahiro Yamada <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#37 lore raw

PATCH v5 4/4 trats/trats2: enable exynos ace sha subsystem and hardware based lib rand

In reply to Przemyslaw Marczak

This allows to use exynos random number generator by enabling configs:
- CONFIG_EXYNOS_ACE_SHA
- CONFIG_LIB_HW_RAND

---
Changes v2:
- none

Changes v3:
- change config name CONFIG_RAND_HW_ACCEL to CONFIG_LIB_HW_RAND

Changes v4:
- correct config name to CONFIG_LIB_HW_RAND after mistake
- add more info to commit message

Changes v5:
- none

---
 include/configs/trats.h  | 4 ++++
 include/configs/trats2.h | 4 ++++
 2 files changed, 8 insertions(+)
include/configs/trats.h +4 -0
index 7cea259..c00d60a 100644
@@ -313,6 +313,10 @@
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 #define CONFIG_USB_CABLE_CHECK
 
+/* Security subsystem - enable hw_rand() */
+#define CONFIG_EXYNOS_ACE_SHA
+#define CONFIG_LIB_HW_RAND
+
 /* Common misc for Samsung */
 #define CONFIG_MISC_COMMON
 
include/configs/trats2.h +4 -0
index 6d389df..59896b1 100644
@@ -324,6 +324,10 @@ int get_soft_i2c_sda_pin(void);
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 #define CONFIG_USB_CABLE_CHECK
 
+/* Security subsystem - enable hw_rand() */
+#define CONFIG_EXYNOS_ACE_SHA
+#define CONFIG_LIB_HW_RAND
+
 /* Common misc for Samsung */
 #define CONFIG_MISC_COMMON
 
Signature · 1 line
1.9.0
#38 lore raw

PATCH v5 4/4 trats/trats2: enable exynos ace sha subsystem and hardware based lib rand

Quoted 8 lines · Przemyslaw Marczak

This allows to use exynos random number generator by enabling configs:
- CONFIG_EXYNOS_ACE_SHA
- CONFIG_LIB_HW_RAND

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#39 lore raw

PATCH v5 1/4 lib: rand: introduce new configs: CONFIG_LIB_RAND and CONFIG_LIB_HW_RAND

In reply to Przemyslaw Marczak
Quoted 14 lines · Przemyslaw Marczak

New configs:
- CONFIG_LIB_RAND - to enable implementation of rand library in lib/rand.c
- CONFIG_LIB_HW_RAND - to enable hardware based implementations of lib rand

Other changes:
- add CONFIG_LIB_RAND to boards configs which needs rand()
- put only one rand.o dependency in lib/Makefile

CONFIG_LIB_HW_RAND should be defined for drivers which implements rand library (declared in include/common.h):
- void srand(unsigned int seed)
- unsigned int rand(void)
- unsigned int rand_r(unsigned int *seedp)

Quoted 4 lines
Cc Michael Walle <[email protected]>
Cc Tom Rini <[email protected]>
Cc Masahiro Yamada <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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