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board: samsung: trats2: Add DW MMC controller initialization

PATCH Superseded Beomho Seo 2 participants 3 messages Mar 5, 2014 – Mar 6, 2014

v1 of 3 Superseded Latest is v3 →

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Beomho Seo

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#0 lore raw

PATCH 1/3 board: samsung: trats2: Add DW MMC controller initialization

Add DW MMC controller initialization.
Selectively use DW MMC controller instead of SDHCI controller.

Signed-off-by Beomho Seo <[email protected]>
Signed-off-by Jaehoon Chung <[email protected]>
Cc Minkyu Kang <[email protected]>
---
 board/samsung/trats2/trats2.c |   31 +++++++++++++++++++++----------
 1 file changed, 21 insertions(+), 10 deletions(-)
board/samsung/trats2/trats2.c +21 -10
index c17c24d..11bebb9 100644
@@ -11,6 +11,7 @@
 #include <asm/io.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/dwmmc.h>
 #include <asm/arch/power.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/clock.h>

@@ -280,18 +281,19 @@ int board_mmc_init(bd_t *bis)
 
 	gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
 
-	/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
+	/* eMMC_EN: SD_0_CDn or SD_4_CDn: GPK0[2] Output High */
 	s5p_gpio_direction_output(&gpio2->k0, 2, 1);
 	s5p_gpio_set_pull(&gpio2->k0, 2, GPIO_PULL_NONE);
 
 	/*
 	 * eMMC GPIO:
 	 * SDR 8-bit at 48MHz at MMC0
-	 * GPK0[0]      SD_0_CLK(2)
-	 * GPK0[1]      SD_0_CMD(2)
-	 * GPK0[2]      SD_0_CDn        -> Not used
-	 * GPK0[3:6]    SD_0_DATA[0:3](2)
-	 * GPK1[3:6]    SD_0_DATA[0:3](3)
+	 *		SDHCI			DW-MMC
+	 * GPK0[0]      SD_0_CLK(2)		SD_4_CLK(3)
+	 * GPK0[1]      SD_0_CMD(2)		SD_4_CMD(3)
+	 * GPK0[2]      SD_0_CDn		SD_4_CDn	-> Not used
+	 * GPK0[3:6]    SD_0_DATA[0:3](2)	SD_4_DATA[0:3](3)
+	 * GPK1[3:6]    SD_0_DATA[4:7](3)	SD_4_DATA[4:7](4)
 	 *
 	 * DDR 4-bit at 26MHz at MMC4
 	 * GPK0[0]      SD_4_CLK(3)

@@ -301,17 +303,26 @@ int board_mmc_init(bd_t *bis)
 	 * GPK1[3:6]    SD_4_DATA[4:7](4)
 	 */
 
-	err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
-
 	/*
 	 * MMC device init
-	 * mmc0  : eMMC (8-bit buswidth)
-	 * mmc2  : SD card (4-bit buswidth)
+	 * mmc0  : eMMC, sdhci controller (8-bit buswidth)
+	 * mmc2  : SD card, sdhci controller (4-bit buswidth)
+	 * mmc4  : eMMC, dw-mmc controller (8-bit buswidth)
 	 */
+
+#ifndef CONFIG_DWMMC
+	err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
 	if (err0)
 		debug("SDMMC0 not configured\n");
 	else
 		err0 = s5p_mmc_init(0, 8);
+#else
+	err0 = exynos_pinmux_config(PERIPH_ID_SDMMC4, PINMUX_FLAG_8BIT_MODE);
+	if (err0)
+		debug("SDMMC4 not configured\n");
+	else
+		err0 = exynos_dwmci_add_port(4, 0x12550000, 8, 0x00010000);
+#endif
 
 	/* T-flash detect */
 	s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
Signature · 4 lines
1.7.9.5

-- 
Best Regards,
#1 lore raw

PATCH 1/3 board: samsung: trats2: Add DW MMC controller initialization

Quoted 65 lines · Beomho Seo

Add DW MMC controller initialization.
Selectively use DW MMC controller instead of SDHCI controller.

Signed-off-by Beomho Seo <[email protected]>
Signed-off-by Jaehoon Chung <[email protected]>
Cc Minkyu Kang <[email protected]>
---
 board/samsung/trats2/trats2.c |   31 +++++++++++++++++++++----------
 1 file changed, 21 insertions(+), 10 deletions(-)
board/samsung/trats2/trats2.c +14 -10
index c17c24d..11bebb9 100644
@@ -11,6 +11,7 @@
 #include <asm/io.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/dwmmc.h>
 #include <asm/arch/power.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/clock.h>

@@ -280,18 +281,19 @@ int board_mmc_init(bd_t *bis)
 
 	gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
 
-	/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
+	/* eMMC_EN: SD_0_CDn or SD_4_CDn: GPK0[2] Output High */
 	s5p_gpio_direction_output(&gpio2->k0, 2, 1);
 	s5p_gpio_set_pull(&gpio2->k0, 2, GPIO_PULL_NONE);
 
 	/*
 	 * eMMC GPIO:
 	 * SDR 8-bit at 48MHz at MMC0
-	 * GPK0[0]      SD_0_CLK(2)
-	 * GPK0[1]      SD_0_CMD(2)
-	 * GPK0[2]      SD_0_CDn        -> Not used
-	 * GPK0[3:6]    SD_0_DATA[0:3](2)
-	 * GPK1[3:6]    SD_0_DATA[0:3](3)
+	 *		SDHCI			DW-MMC
+	 * GPK0[0]      SD_0_CLK(2)		SD_4_CLK(3)
+	 * GPK0[1]      SD_0_CMD(2)		SD_4_CMD(3)
+	 * GPK0[2]      SD_0_CDn		SD_4_CDn	-> Not used
+	 * GPK0[3:6]    SD_0_DATA[0:3](2)	SD_4_DATA[0:3](3)
+	 * GPK1[3:6]    SD_0_DATA[4:7](3)	SD_4_DATA[4:7](4)
 	 *
 	 * DDR 4-bit at 26MHz at MMC4
 	 * GPK0[0]      SD_4_CLK(3)

@@ -301,17 +303,26 @@ int board_mmc_init(bd_t *bis)
 	 * GPK1[3:6]    SD_4_DATA[4:7](4)
 	 */
 
-	err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
-
 	/*
 	 * MMC device init
-	 * mmc0  : eMMC (8-bit buswidth)
-	 * mmc2  : SD card (4-bit buswidth)
+	 * mmc0  : eMMC, sdhci controller (8-bit buswidth)
+	 * mmc2  : SD card, sdhci controller (4-bit buswidth)
+	 * mmc4  : eMMC, dw-mmc controller (8-bit buswidth)
 	 */
+
+#ifndef CONFIG_DWMMC
+	err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);

board/samsung/trats2/trats2.c int board_mmc_init(bd_t *bis) · line 324

Quoted 10 lines
board/samsung/trats2/trats2.c +6 -0
 	if (err0)
 		debug("SDMMC0 not configured\n");
 	else
 		err0 = s5p_mmc_init(0, 8);
+#else
+	err0 = exynos_pinmux_config(PERIPH_ID_SDMMC4, PINMUX_FLAG_8BIT_MODE);
+	if (err0)
+		debug("SDMMC4 not configured\n");
+	else
+		err0 = exynos_dwmci_add_port(4, 0x12550000, 8, 0x00010000);

what means 0x12550000, 0x00010000?

board/samsung/trats2/trats2.c int board_mmc_init(bd_t *bis) · line 328

Quoted 5 lines
board/samsung/trats2/trats2.c +1 -0
+#endif
 
 	/* T-flash detect */
 	s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);

Thanks,
Minkyu Kang.

author
#2 lore raw

PATCH 1/3 board: samsung: trats2: Add DW MMC controller initialization

Thank you for your reply.

Quoted 70 lines · Minkyu Kang
Quoted 69 lines · Beomho Seo

Add DW MMC controller initialization.
Selectively use DW MMC controller instead of SDHCI controller.

Signed-off-by Beomho Seo <[email protected]>
Signed-off-by Jaehoon Chung <[email protected]>
Cc Minkyu Kang <[email protected]>
---
 board/samsung/trats2/trats2.c |   31 +++++++++++++++++++++----------
 1 file changed, 21 insertions(+), 10 deletions(-)
board/samsung/trats2/trats2.c +14 -10
index c17c24d..11bebb9 100644
@@ -11,6 +11,7 @@
 #include <asm/io.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/dwmmc.h>
 #include <asm/arch/power.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/clock.h>

@@ -280,18 +281,19 @@ int board_mmc_init(bd_t *bis)
 
 	gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
 
-	/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
+	/* eMMC_EN: SD_0_CDn or SD_4_CDn: GPK0[2] Output High */
 	s5p_gpio_direction_output(&gpio2->k0, 2, 1);
 	s5p_gpio_set_pull(&gpio2->k0, 2, GPIO_PULL_NONE);
 
 	/*
 	 * eMMC GPIO:
 	 * SDR 8-bit at 48MHz at MMC0
-	 * GPK0[0]      SD_0_CLK(2)
-	 * GPK0[1]      SD_0_CMD(2)
-	 * GPK0[2]      SD_0_CDn        -> Not used
-	 * GPK0[3:6]    SD_0_DATA[0:3](2)
-	 * GPK1[3:6]    SD_0_DATA[0:3](3)
+	 *		SDHCI			DW-MMC
+	 * GPK0[0]      SD_0_CLK(2)		SD_4_CLK(3)
+	 * GPK0[1]      SD_0_CMD(2)		SD_4_CMD(3)
+	 * GPK0[2]      SD_0_CDn		SD_4_CDn	-> Not used
+	 * GPK0[3:6]    SD_0_DATA[0:3](2)	SD_4_DATA[0:3](3)
+	 * GPK1[3:6]    SD_0_DATA[4:7](3)	SD_4_DATA[4:7](4)
 	 *
 	 * DDR 4-bit at 26MHz at MMC4
 	 * GPK0[0]      SD_4_CLK(3)

@@ -301,17 +303,26 @@ int board_mmc_init(bd_t *bis)
 	 * GPK1[3:6]    SD_4_DATA[4:7](4)
 	 */
 
-	err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
-
 	/*
 	 * MMC device init
-	 * mmc0  : eMMC (8-bit buswidth)
-	 * mmc2  : SD card (4-bit buswidth)
+	 * mmc0  : eMMC, sdhci controller (8-bit buswidth)
+	 * mmc2  : SD card, sdhci controller (4-bit buswidth)
+	 * mmc4  : eMMC, dw-mmc controller (8-bit buswidth)
 	 */
+
+#ifndef CONFIG_DWMMC
+	err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
 	if (err0)
 		debug("SDMMC0 not configured\n");
 	else
 		err0 = s5p_mmc_init(0, 8);
Quoted 9 lines

board/samsung/trats2/trats2.c int board_mmc_init(bd_t *bis) · line 324

Quoted 6 lines
board/samsung/trats2/trats2.c +6 -0
+#else
+	err0 = exynos_pinmux_config(PERIPH_ID_SDMMC4, PINMUX_FLAG_8BIT_MODE);
+	if (err0)
+		debug("SDMMC4 not configured\n");
+	else
+		err0 = exynos_dwmci_add_port(4, 0x12550000, 8, 0x00010000);

what means 0x12550000, 0x00010000?

Firstly, 0x12550000 is base address for mobile storage host(SDMMC4). 0x00010000 is value for set on CLKSEL register.
I will revise more readable.

Quoted 9 lines

board/samsung/trats2/trats2.c int board_mmc_init(bd_t *bis) · line 328

Quoted 5 lines
board/samsung/trats2/trats2.c +1 -0
+#endif
 
 	/* T-flash detect */
 	s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);

Thanks,
Minkyu Kang.

Signature · 2 lines
Best Regards,
Beomho Seo