ARM: OMAP: SATA support for OMAP5 & DRA7

From: Kishon Vijay Abraham I <[email protected]>

Rename struct omap_control_usb to struct omap_control_phy since it can be used to control PHY of USB, SATA and PCIE. Also move the driver and include files under *phy* and made the corresponding changes in the users of phy-omap-control.

Signed-off-by Kishon Vijay Abraham I <[email protected]>

Signed-off-by Roger Quadros <[email protected]>

---
  drivers/phy/Kconfig                                |  14 +-
  drivers/phy/Makefile                               |   1 +
  drivers/{usb => }/phy/phy-omap-control.c           | 165 +++++++++++----------
  drivers/phy/phy-omap-usb2.c                        |   8 +-
  drivers/phy/phy-ti-pipe3.c                         |   8 +-
  drivers/usb/musb/omap2430.c                        |   2 +-
  drivers/usb/phy/Kconfig                            |  10 --
  drivers/usb/phy/Makefile                           |   1 -

  .../omap_control_usb.h => phy/omap_control_phy.h}  |  36 ++---
  9 files changed, 123 insertions(+), 122 deletions(-)

rename drivers/{usb => }/phy/phy-omap-control.c (55%)
rename include/linux/{usb/omap_control_usb.h => phy/omap_control_phy.h} (68%)

drivers/phy/Kconfig +12 -2

index 1b607d7..fe8c009 100644
@@ -31,12 +31,22 @@ config PHY_MVEBU_SATA
  	depends on OF
  	select GENERIC_PHY
 
+config OMAP_CONTROL_PHY
+	tristate "OMAP CONTROL PHY Driver"
+	help
+	  Enable this to add support for the PHY part present in the control
+	  module. This driver has API to power on the USB2 PHY and to write to
+	  the mailbox. The mailbox is present only in omap4 and the register to
+	  power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
+	  additional register to power on USB3 PHY/SATA PHY/PCIE PHY
+	  (PIPE3 PHY).
+
  config OMAP_USB2
  	tristate "OMAP USB2 PHY Driver"
  	depends on ARCH_OMAP2PLUS
  	depends on USB_PHY
  	select GENERIC_PHY
-	select OMAP_CONTROL_USB
+	select OMAP_CONTROL_PHY
  	help
  	  Enable this to support the transceiver that is part of SOC. This
  	  driver takes care of all the PHY functionality apart from comparator.

@@ -47,7 +57,7 @@ config TI_PIPE3
  	tristate "TI PIPE3 PHY Driver"
  	depends on ARCH_OMAP2PLUS || COMPILE_TEST
  	select GENERIC_PHY
-	select OMAP_CONTROL_USB
+	select OMAP_CONTROL_PHY
  	help
  	  Enable this to support the PIPE3 PHY that is part of TI SOCs. This
  	  driver takes care of all the PHY functionality apart from comparator.

drivers/phy/Makefile +1 -0

index ecf0d3f..8da05a8 100644
@@ -7,6 +7,7 @@ obj-$(CONFIG_BCM_KONA_USB2_PHY)		+= phy-bcm-kona-usb2.o
  obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO)	+= phy-exynos-dp-video.o
  obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO)	+= phy-exynos-mipi-video.o
  obj-$(CONFIG_PHY_MVEBU_SATA)		+= phy-mvebu-sata.o
+obj-$(CONFIG_OMAP_CONTROL_PHY)		+= phy-omap-control.o
  obj-$(CONFIG_OMAP_USB2)			+= phy-omap-usb2.o
  obj-$(CONFIG_TI_PIPE3)			+= phy-ti-pipe3.o
  obj-$(CONFIG_TWL4030_USB)		+= phy-twl4030-usb.o

drivers/phy/phy-omap-control.c renamed from drivers/usb/phy/phy-omap-control.c +83 -82

similarity index 55%
rename from drivers/usb/phy/phy-omap-control.c
rename to drivers/phy/phy-omap-control.c
index e725318..17fc200 100644
@@ -1,5 +1,5 @@
  /*
- * omap-control-usb.c - The USB part of control module.
+ * omap-control-phy.c - The PHY part of control module.
   *
   * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
   * This program is free software; you can redistribute it and/or modify

@@ -24,36 +24,36 @@
  #include <linux/err.h>
  #include <linux/io.h>
  #include <linux/clk.h>
-#include <linux/usb/omap_control_usb.h>
+#include <linux/phy/omap_control_phy.h>
 
  /**
- * omap_control_usb_phy_power - power on/off the phy using control module reg
+ * omap_control_phy_power - power on/off the phy using control module reg
   * @dev: the control module device
   * @on: 0 or 1, based on powering on or off the PHY
   */
-void omap_control_usb_phy_power(struct device *dev, int on)
+void omap_control_phy_power(struct device *dev, int on)
  {
  	u32 val;
  	unsigned long rate;
-	struct omap_control_usb	*control_usb;
+	struct omap_control_phy	*control_phy;
 
  	if (IS_ERR(dev) || !dev) {
  		pr_err("%s: invalid device\n", __func__);
  		return;
  	}
 
-	control_usb = dev_get_drvdata(dev);
-	if (!control_usb) {
-		dev_err(dev, "%s: invalid control usb device\n", __func__);
+	control_phy = dev_get_drvdata(dev);
+	if (!control_phy) {
+		dev_err(dev, "%s: invalid control phy device\n", __func__);
  		return;
  	}
 
-	if (control_usb->type == OMAP_CTRL_TYPE_OTGHS)
+	if (control_phy->type == OMAP_CTRL_TYPE_OTGHS)
  		return;
 
-	val = readl(control_usb->power);
+	val = readl(control_phy->power);
 
-	switch (control_usb->type) {
+	switch (control_phy->type) {
  	case OMAP_CTRL_TYPE_USB2:
  		if (on)
  			val &= ~OMAP_CTRL_DEV_PHY_PD;

@@ -62,19 +62,20 @@ void omap_control_usb_phy_power(struct device *dev, int on)
  		break;
 
  	case OMAP_CTRL_TYPE_PIPE3:
-		rate = clk_get_rate(control_usb->sys_clk);
+		rate = clk_get_rate(control_phy->sys_clk);
  		rate = rate/1000000;
 
  		if (on) {
-			val &= ~(OMAP_CTRL_USB_PWRCTL_CLK_CMD_MASK |
-					OMAP_CTRL_USB_PWRCTL_CLK_FREQ_MASK);
-			val |= OMAP_CTRL_USB3_PHY_TX_RX_POWERON <<
-				OMAP_CTRL_USB_PWRCTL_CLK_CMD_SHIFT;
-			val |= rate << OMAP_CTRL_USB_PWRCTL_CLK_FREQ_SHIFT;
+			val &= ~(OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK |
+				OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK);
+			val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON <<
+				OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
+			val |= rate <<
+				OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT;
  		} else {
-			val &= ~OMAP_CTRL_USB_PWRCTL_CLK_CMD_MASK;
-			val |= OMAP_CTRL_USB3_PHY_TX_RX_POWEROFF <<
-				OMAP_CTRL_USB_PWRCTL_CLK_CMD_SHIFT;
+			val &= ~OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK;
+			val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF <<
+				OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
  		}
  		break;
 

@@ -100,66 +101,66 @@ void omap_control_usb_phy_power(struct device *dev, int on)
  		break;
  	default:
  		dev_err(dev, "%s: type %d not recognized\n",
-					__func__, control_usb->type);
+			__func__, control_phy->type);
  		break;
  	}
 
-	writel(val, control_usb->power);
+	writel(val, control_phy->power);
  }
-EXPORT_SYMBOL_GPL(omap_control_usb_phy_power);
+EXPORT_SYMBOL_GPL(omap_control_phy_power);
 
  /**
   * omap_control_usb_host_mode - set AVALID, VBUSVALID and ID pin in grounded
- * @ctrl_usb: struct omap_control_usb *
+ * @ctrl_phy: struct omap_control_phy *
   *
   * Writes to the mailbox register to notify the usb core that a usb
   * device has been connected.
   */
-static void omap_control_usb_host_mode(struct omap_control_usb *ctrl_usb)
+static void omap_control_usb_host_mode(struct omap_control_phy *ctrl_phy)
  {
  	u32 val;
 
-	val = readl(ctrl_usb->otghs_control);
+	val = readl(ctrl_phy->otghs_control);
  	val &= ~(OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_SESSEND);
  	val |= OMAP_CTRL_DEV_AVALID | OMAP_CTRL_DEV_VBUSVALID;
-	writel(val, ctrl_usb->otghs_control);
+	writel(val, ctrl_phy->otghs_control);
  }
 
  /**
   * omap_control_usb_device_mode - set AVALID, VBUSVALID and ID pin in high
   * impedance
- * @ctrl_usb: struct omap_control_usb *
+ * @ctrl_phy: struct omap_control_phy *
   *
   * Writes to the mailbox register to notify the usb core that it has been
   * connected to a usb host.
   */
-static void omap_control_usb_device_mode(struct omap_control_usb *ctrl_usb)
+static void omap_control_usb_device_mode(struct omap_control_phy *ctrl_phy)
  {
  	u32 val;
 
-	val = readl(ctrl_usb->otghs_control);
+	val = readl(ctrl_phy->otghs_control);
  	val &= ~OMAP_CTRL_DEV_SESSEND;
  	val |= OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_AVALID |
  		OMAP_CTRL_DEV_VBUSVALID;
-	writel(val, ctrl_usb->otghs_control);
+	writel(val, ctrl_phy->otghs_control);
  }
 
  /**
   * omap_control_usb_set_sessionend - Enable SESSIONEND and IDIG to high
   * impedance
- * @ctrl_usb: struct omap_control_usb *
+ * @ctrl_phy: struct omap_control_phy *
   *
   * Writes to the mailbox register to notify the usb core it's now in
   * disconnected state.
   */
-static void omap_control_usb_set_sessionend(struct omap_control_usb *ctrl_usb)
+static void omap_control_usb_set_sessionend(struct omap_control_phy *ctrl_phy)
  {
  	u32 val;
 
-	val = readl(ctrl_usb->otghs_control);
+	val = readl(ctrl_phy->otghs_control);
  	val &= ~(OMAP_CTRL_DEV_AVALID | OMAP_CTRL_DEV_VBUSVALID);
  	val |= OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_SESSEND;
-	writel(val, ctrl_usb->otghs_control);
+	writel(val, ctrl_phy->otghs_control);
  }
 
  /**

@@ -174,30 +175,30 @@ static void omap_control_usb_set_sessionend(struct omap_control_usb *ctrl_usb)
  void omap_control_usb_set_mode(struct device *dev,
  	enum omap_control_usb_mode mode)
  {
-	struct omap_control_usb	*ctrl_usb;
+	struct omap_control_phy	*ctrl_phy;
 
  	if (IS_ERR(dev) || !dev)
  		return;
 
-	ctrl_usb = dev_get_drvdata(dev);
+	ctrl_phy = dev_get_drvdata(dev);
 
-	if (!ctrl_usb) {
-		dev_err(dev, "Invalid control usb device\n");
+	if (!ctrl_phy) {
+		dev_err(dev, "Invalid control phy device\n");
  		return;
  	}
 
-	if (ctrl_usb->type != OMAP_CTRL_TYPE_OTGHS)
+	if (ctrl_phy->type != OMAP_CTRL_TYPE_OTGHS)
  		return;
 
  	switch (mode) {
  	case USB_MODE_HOST:
-		omap_control_usb_host_mode(ctrl_usb);
+		omap_control_usb_host_mode(ctrl_phy);
  		break;
  	case USB_MODE_DEVICE:
-		omap_control_usb_device_mode(ctrl_usb);
+		omap_control_usb_device_mode(ctrl_phy);
  		break;
  	case USB_MODE_DISCONNECT:
-		omap_control_usb_set_sessionend(ctrl_usb);
+		omap_control_usb_set_sessionend(ctrl_phy);
  		break;
  	default:
  		dev_vdbg(dev, "invalid omap control usb mode\n");

@@ -207,13 +208,13 @@ EXPORT_SYMBOL_GPL(omap_control_usb_set_mode);
 
  #ifdef CONFIG_OF
 
-static const enum omap_control_usb_type otghs_data = OMAP_CTRL_TYPE_OTGHS;
-static const enum omap_control_usb_type usb2_data = OMAP_CTRL_TYPE_USB2;
-static const enum omap_control_usb_type pipe3_data = OMAP_CTRL_TYPE_PIPE3;
-static const enum omap_control_usb_type dra7usb2_data = OMAP_CTRL_TYPE_DRA7USB2;
-static const enum omap_control_usb_type am437usb2_data = OMAP_CTRL_TYPE_AM437USB2;
+static const enum omap_control_phy_type otghs_data = OMAP_CTRL_TYPE_OTGHS;
+static const enum omap_control_phy_type usb2_data = OMAP_CTRL_TYPE_USB2;
+static const enum omap_control_phy_type pipe3_data = OMAP_CTRL_TYPE_PIPE3;
+static const enum omap_control_phy_type dra7usb2_data = OMAP_CTRL_TYPE_DRA7USB2;
+static const enum omap_control_phy_type am437usb2_data = OMAP_CTRL_TYPE_AM437USB2;
 
-static const struct of_device_id omap_control_usb_id_table[] = {
+static const struct of_device_id omap_control_phy_id_table[] = {
  	{
  		.compatible = "ti,control-phy-otghs",
  		.data = &otghs_data,

@@ -236,84 +237,84 @@ static const struct of_device_id omap_control_usb_id_table[] = {
  	},
  	{},
  };
-MODULE_DEVICE_TABLE(of, omap_control_usb_id_table);
+MODULE_DEVICE_TABLE(of, omap_control_phy_id_table);
  #endif
 
 
-static int omap_control_usb_probe(struct platform_device *pdev)
+static int omap_control_phy_probe(struct platform_device *pdev)
  {
  	struct resource	*res;
  	const struct of_device_id *of_id;
-	struct omap_control_usb *control_usb;
+	struct omap_control_phy *control_phy;
 
-	of_id = of_match_device(of_match_ptr(omap_control_usb_id_table),
-								&pdev->dev);
+	of_id = of_match_device(of_match_ptr(omap_control_phy_id_table),
+				&pdev->dev);
  	if (!of_id)
  		return -EINVAL;
 
-	control_usb = devm_kzalloc(&pdev->dev, sizeof(*control_usb),
+	control_phy = devm_kzalloc(&pdev->dev, sizeof(*control_phy),
  		GFP_KERNEL);
-	if (!control_usb) {
-		dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
+	if (!control_phy) {
+		dev_err(&pdev->dev, "unable to alloc memory for control phy\n");
  		return -ENOMEM;
  	}
 
-	control_usb->dev = &pdev->dev;
-	control_usb->type = *(enum omap_control_usb_type *)of_id->data;
+	control_phy->dev = &pdev->dev;
+	control_phy->type = *(enum omap_control_phy_type *)of_id->data;
 
-	if (control_usb->type == OMAP_CTRL_TYPE_OTGHS) {
+	if (control_phy->type == OMAP_CTRL_TYPE_OTGHS) {
  		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  			"otghs_control");
-		control_usb->otghs_control = devm_ioremap_resource(
+		control_phy->otghs_control = devm_ioremap_resource(
  			&pdev->dev, res);
-		if (IS_ERR(control_usb->otghs_control))
-			return PTR_ERR(control_usb->otghs_control);
+		if (IS_ERR(control_phy->otghs_control))
+			return PTR_ERR(control_phy->otghs_control);
  	} else {
  		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  				"power");
-		control_usb->power = devm_ioremap_resource(&pdev->dev, res);
-		if (IS_ERR(control_usb->power)) {
+		control_phy->power = devm_ioremap_resource(&pdev->dev, res);
+		if (IS_ERR(control_phy->power)) {
  			dev_err(&pdev->dev, "Couldn't get power register\n");
-			return PTR_ERR(control_usb->power);
+			return PTR_ERR(control_phy->power);
  		}
  	}
 
-	if (control_usb->type == OMAP_CTRL_TYPE_PIPE3) {
-		control_usb->sys_clk = devm_clk_get(control_usb->dev,
+	if (control_phy->type == OMAP_CTRL_TYPE_PIPE3) {
+		control_phy->sys_clk = devm_clk_get(control_phy->dev,
  			"sys_clkin");
-		if (IS_ERR(control_usb->sys_clk)) {
+		if (IS_ERR(control_phy->sys_clk)) {
  			pr_err("%s: unable to get sys_clkin\n", __func__);
  			return -EINVAL;
  		}
  	}
 
-	dev_set_drvdata(control_usb->dev, control_usb);
+	dev_set_drvdata(control_phy->dev, control_phy);
 
  	return 0;
  }
 
-static struct platform_driver omap_control_usb_driver = {
-	.probe		= omap_control_usb_probe,
+static struct platform_driver omap_control_phy_driver = {
+	.probe		= omap_control_phy_probe,
  	.driver		= {
-		.name	= "omap-control-usb",
+		.name	= "omap-control-phy",
  		.owner	= THIS_MODULE,
-		.of_match_table = of_match_ptr(omap_control_usb_id_table),
+		.of_match_table = of_match_ptr(omap_control_phy_id_table),
  	},
  };
 
-static int __init omap_control_usb_init(void)
+static int __init omap_control_phy_init(void)
  {
-	return platform_driver_register(&omap_control_usb_driver);
+	return platform_driver_register(&omap_control_phy_driver);
  }
-subsys_initcall(omap_control_usb_init);
+subsys_initcall(omap_control_phy_init);
 
-static void __exit omap_control_usb_exit(void)
+static void __exit omap_control_phy_exit(void)
  {
-	platform_driver_unregister(&omap_control_usb_driver);
+	platform_driver_unregister(&omap_control_phy_driver);
  }
-module_exit(omap_control_usb_exit);
+module_exit(omap_control_phy_exit);
 
-MODULE_ALIAS("platform: omap_control_usb");
+MODULE_ALIAS("platform: omap_control_phy");
  MODULE_AUTHOR("Texas Instruments Inc.");
-MODULE_DESCRIPTION("OMAP Control Module USB Driver");
+MODULE_DESCRIPTION("OMAP Control Module PHY Driver");
  MODULE_LICENSE("GPL v2");

drivers/phy/phy-omap-usb2.c +4 -4

index 3cc4aba..a2205a8 100644
@@ -27,7 +27,7 @@
  #include <linux/err.h>
  #include <linux/pm_runtime.h>
  #include <linux/delay.h>
-#include <linux/usb/omap_control_usb.h>
+#include <linux/phy/omap_control_phy.h>
  #include <linux/phy/phy.h>
  #include <linux/of_platform.h>
 

@@ -105,7 +105,7 @@ static int omap_usb_power_off(struct phy *x)
  {
  	struct omap_usb *phy = phy_get_drvdata(x);
 
-	omap_control_usb_phy_power(phy->control_dev, 0);
+	omap_control_phy_power(phy->control_dev, 0);
 
  	return 0;
  }

@@ -114,7 +114,7 @@ static int omap_usb_power_on(struct phy *x)
  {
  	struct omap_usb *phy = phy_get_drvdata(x);
 
-	omap_control_usb_phy_power(phy->control_dev, 1);
+	omap_control_phy_power(phy->control_dev, 1);
 
  	return 0;
  }

@@ -251,7 +251,7 @@ static int omap_usb2_probe(struct platform_device *pdev)
  	}
 
  	phy->control_dev = &control_pdev->dev;
-	omap_control_usb_phy_power(phy->control_dev, 0);
+	omap_control_phy_power(phy->control_dev, 0);
 
  	otg->set_host		= omap_usb_set_host;
  	otg->set_peripheral	= omap_usb_set_peripheral;

drivers/phy/phy-ti-pipe3.c +4 -4

index c8d1674..fd029b1 100644
@@ -26,7 +26,7 @@
  #include <linux/io.h>
  #include <linux/pm_runtime.h>
  #include <linux/delay.h>
-#include <linux/usb/omap_control_usb.h>
+#include <linux/phy/omap_control_phy.h>
  #include <linux/of_platform.h>
 
  #define	PLL_STATUS		0x00000004

@@ -134,7 +134,7 @@ static int ti_pipe3_power_off(struct phy *x)
  		return -EBUSY;
  	}
 
-	omap_control_usb_phy_power(phy->control_dev, 0);
+	omap_control_phy_power(phy->control_dev, 0);
 
  	return 0;
  }

@@ -232,7 +232,7 @@ static int ti_pipe3_init(struct phy *x)
  	if (ret)
  		return ret;
 
-	omap_control_usb_phy_power(phy->control_dev, 1);
+	omap_control_phy_power(phy->control_dev, 1);
 
  	return 0;
  }

@@ -304,7 +304,7 @@ static int ti_pipe3_probe(struct platform_device *pdev)
 
  	phy->control_dev = &control_pdev->dev;
 
-	omap_control_usb_phy_power(phy->control_dev, 0);
+	omap_control_phy_power(phy->control_dev, 0);
 
  	platform_set_drvdata(pdev, phy);
  	pm_runtime_enable(phy->dev);

drivers/usb/musb/omap2430.c +1 -1

index 8aa59a2..d341c14 100644
@@ -37,7 +37,7 @@
  #include <linux/err.h>
  #include <linux/delay.h>
  #include <linux/usb/musb-omap.h>
-#include <linux/usb/omap_control_usb.h>
+#include <linux/phy/omap_control_phy.h>
  #include <linux/of_platform.h>
 
  #include "musb_core.h"

drivers/usb/phy/Kconfig +0 -10

index c337ba2..416e0c8 100644
@@ -75,16 +75,6 @@ config NOP_USB_XCEIV
  	  built-in with usb ip or which are autonomous and doesn't require any
  	  phy programming such as ISP1x04 etc.
 
-config OMAP_CONTROL_USB
-	tristate "OMAP CONTROL USB Driver"
-	depends on ARCH_OMAP2PLUS || COMPILE_TEST
-	help
-	  Enable this to add support for the USB part present in the control
-	  module. This driver has API to power on the USB2 PHY and to write to
-	  the mailbox. The mailbox is present only in omap4 and the register to
-	  power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
-	  additional register to power on USB3 PHY.
-
  config AM335X_CONTROL_USB
  	tristate
 

drivers/usb/phy/Makefile +0 -1

index 15f1878..f8fa719 100644
@@ -13,7 +13,6 @@ obj-$(CONFIG_ISP1301_OMAP)		+= phy-isp1301-omap.o
  obj-$(CONFIG_MV_U3D_PHY)		+= phy-mv-u3d-usb.o
  obj-$(CONFIG_NOP_USB_XCEIV)		+= phy-generic.o
  obj-$(CONFIG_TAHVO_USB)			+= phy-tahvo.o
-obj-$(CONFIG_OMAP_CONTROL_USB)		+= phy-omap-control.o
  obj-$(CONFIG_AM335X_CONTROL_USB)	+= phy-am335x-control.o
  obj-$(CONFIG_AM335X_PHY_USB)		+= phy-am335x.o
  obj-$(CONFIG_OMAP_OTG)			+= phy-omap-otg.o

include/linux/phy/omap_control_phy.h renamed from include/linux/usb/omap_control_usb.h +18 -18

similarity index 68%
rename from include/linux/usb/omap_control_usb.h
rename to include/linux/phy/omap_control_phy.h
index 69ae383..5450403 100644
@@ -1,5 +1,5 @@
  /*
- * omap_control_usb.h - Header file for the USB part of control module.
+ * omap_control_phy.h - Header file for the PHY part of control module.
   *
   * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
   * This program is free software; you can redistribute it and/or modify

@@ -16,10 +16,10 @@
   *
   */
 
-#ifndef __OMAP_CONTROL_USB_H__
-#define __OMAP_CONTROL_USB_H__
+#ifndef __OMAP_CONTROL_PHY_H__
+#define __OMAP_CONTROL_PHY_H__
 
-enum omap_control_usb_type {
+enum omap_control_phy_type {
  	OMAP_CTRL_TYPE_OTGHS = 1,	/* Mailbox OTGHS_CONTROL */
  	OMAP_CTRL_TYPE_USB2,	/* USB2_PHY, power down in CONTROL_DEV_CONF */
  	OMAP_CTRL_TYPE_PIPE3,	/* PIPE3 PHY, DPLL & seperate Rx/Tx power */

@@ -27,7 +27,7 @@ enum omap_control_usb_type {
  	OMAP_CTRL_TYPE_AM437USB2, /* USB2 PHY, power e.g. AM437x */
  };
 
-struct omap_control_usb {
+struct omap_control_phy {
  	struct device *dev;
 
  	u32 __iomem *otghs_control;

@@ -36,7 +36,7 @@ struct omap_control_usb {
 
  	struct clk *sys_clk;
 
-	enum omap_control_usb_type type;
+	enum omap_control_phy_type type;
  };
 
  enum omap_control_usb_mode {

@@ -54,14 +54,14 @@ enum omap_control_usb_mode {
  #define	OMAP_CTRL_DEV_SESSEND		BIT(3)
  #define	OMAP_CTRL_DEV_IDDIG		BIT(4)
 
-#define	OMAP_CTRL_USB_PWRCTL_CLK_CMD_MASK	0x003FC000
-#define	OMAP_CTRL_USB_PWRCTL_CLK_CMD_SHIFT	0xE
+#define	OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK		0x003FC000
+#define	OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT	0xE
 
-#define	OMAP_CTRL_USB_PWRCTL_CLK_FREQ_MASK	0xFFC00000
-#define	OMAP_CTRL_USB_PWRCTL_CLK_FREQ_SHIFT	0x16
+#define	OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK	0xFFC00000
+#define	OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT	0x16
 
-#define	OMAP_CTRL_USB3_PHY_TX_RX_POWERON	0x3
-#define	OMAP_CTRL_USB3_PHY_TX_RX_POWEROFF	0x0
+#define	OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON	0x3
+#define	OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF	0x0
 
  #define OMAP_CTRL_USB2_PHY_PD		BIT(28)
 

@@ -70,13 +70,13 @@ enum omap_control_usb_mode {
  #define AM437X_CTRL_USB2_OTGVDET_EN	BIT(19)
  #define AM437X_CTRL_USB2_OTGSESSEND_EN	BIT(20)
 
-#if IS_ENABLED(CONFIG_OMAP_CONTROL_USB)
-extern void omap_control_usb_phy_power(struct device *dev, int on);
-extern void omap_control_usb_set_mode(struct device *dev,
-	enum omap_control_usb_mode mode);
+#if IS_ENABLED(CONFIG_OMAP_CONTROL_PHY)
+void omap_control_phy_power(struct device *dev, int on);
+void omap_control_usb_set_mode(struct device *dev,
+			       enum omap_control_usb_mode mode);
  #else
 
-static inline void omap_control_usb_phy_power(struct device *dev, int on)
+static inline void omap_control_phy_power(struct device *dev, int on)
  {
  }
 

@@ -86,4 +86,4 @@ static inline void omap_control_usb_set_mode(struct device *dev,
  }
  #endif
 
-#endif	/* __OMAP_CONTROL_USB_H__ */
+#endif	/* __OMAP_CONTROL_PHY_H__ */

Felipe,

Quoted 9 lines · Roger Quadros

From: Kishon Vijay Abraham I <[email protected]>

Rename struct omap_control_usb to struct omap_control_phy since it can be used to control PHY of USB, SATA and PCIE. Also move the driver and include files under *phy* and made the corresponding changes in the users of phy-omap-control.

Signed-off-by Kishon Vijay Abraham I <[email protected]>

Signed-off-by Roger Quadros <[email protected]>

Quoted 9 lines

---
 drivers/phy/Kconfig                                |  14 +-
 drivers/phy/Makefile                               |   1 +
 drivers/{usb => }/phy/phy-omap-control.c           | 165 +++++++++++----------
 drivers/phy/phy-omap-usb2.c                        |   8 +-
 drivers/phy/phy-ti-pipe3.c                         |   8 +-
 drivers/usb/musb/omap2430.c                        |   2 +-
 drivers/usb/phy/Kconfig                            |  10 --
 drivers/usb/phy/Makefile                           |   1 -

Hope you are fine with the changes in drivers/usb/? Can you give your Acked-by?

Move omap-control binding information to the right location.

Signed-off-by Roger Quadros <[email protected]>

---
  Documentation/devicetree/bindings/phy/ti-phy.txt   | 25 ++++++++++++++++++++++

  Documentation/devicetree/bindings/usb/omap-usb.txt | 24 ---------------------
  2 files changed, 25 insertions(+), 24 deletions(-)

Documentation/devicetree/bindings/phy/ti-phy.txt +25 -0

index f671163..5c5b1b0 100644
@@ -1,5 +1,30 @@
  TI PHY: DT DOCUMENTATION FOR PHYs in TI PLATFORMs
 
+OMAP CONTROL PHY
+
+Required properties:
+ - compatible: Should be one of
+ "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
+ "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
+                        e.g. USB2_PHY on OMAP5.
+ "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
+                        e.g. USB3 PHY and SATA PHY on OMAP5.
+ "ti,control-phy-dra7usb2" - if it has power down register like USB2 PHY on
+                        DRA7 platform.
+ "ti,control-phy-am437usb2" - if it has power down register like USB2 PHY on
+                        AM437 platform.
+ - reg : Address and length of the register set for the device. It contains
+   the address of "otghs_control" for control-phy-otghs or "power" register
+   for other types.
+ - reg-names: should be "otghs_control" control-phy-otghs and "power" for
+   other types.
+
+omap_control_usb: omap-control-usb at 4a002300 {
+        compatible = "ti,control-phy-otghs";
+        reg = <0x4a00233c 0x4>;
+        reg-names = "otghs_control";
+};
+
  OMAP USB2 PHY
 
  Required properties:

Documentation/devicetree/bindings/usb/omap-usb.txt +0 -24

index c495135..38b2fae 100644
@@ -76,27 +76,3 @@ omap_dwc3 {
  	ranges;
  };
 
-OMAP CONTROL USB
-
-Required properties:
- - compatible: Should be one of
- "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
- "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
-			e.g. USB2_PHY on OMAP5.
- "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
-			e.g. USB3 PHY and SATA PHY on OMAP5.
- "ti,control-phy-dra7usb2" - if it has power down register like USB2 PHY on
-			DRA7 platform.
- "ti,control-phy-am437usb2" - if it has power down register like USB2 PHY on
-			AM437 platform.
- - reg : Address and length of the register set for the device. It contains
-   the address of "otghs_control" for control-phy-otghs or "power" register
-   for other types.
- - reg-names: should be "otghs_control" control-phy-otghs and "power" for
-   other types.
-
-omap_control_usb: omap-control-usb at 4a002300 {
-	compatible = "ti,control-phy-otghs";
-	reg = <0x4a00233c 0x4>;
-	reg-names = "otghs_control";
-};

Felipe,

Quoted 5 lines · Roger Quadros

Move omap-control binding information to the right location.

Signed-off-by Roger Quadros <[email protected]>

---
 Documentation/devicetree/bindings/phy/ti-phy.txt   | 25 ++++++++++++++++++++++

This patch is dependent on

"Documentation: dt bindings: move ..usb/usb-phy.txt to
..phy/ti-phy.txt"

which got merged in your tree. So can you take this patch also?

Acked-by Kishon Vijay Abraham I <[email protected]>

The dra7-usb2 and am437-usb2 bindings have not yet been used. Change them to be more elegant.

Signed-off-by Roger Quadros <[email protected]>

---
  Documentation/devicetree/bindings/phy/ti-phy.txt | 4 ++--

  drivers/phy/phy-omap-control.c                   | 4 ++--
  2 files changed, 4 insertions(+), 4 deletions(-)

Documentation/devicetree/bindings/phy/ti-phy.txt +2 -2

index 5c5b1b0..28e674b 100644
@@ -9,9 +9,9 @@ Required properties:
                          e.g. USB2_PHY on OMAP5.
   "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
                          e.g. USB3 PHY and SATA PHY on OMAP5.
- "ti,control-phy-dra7usb2" - if it has power down register like USB2 PHY on
+ "ti,control-phy-dra7-usb2" - if it has power down register like USB2 PHY on
                          DRA7 platform.
- "ti,control-phy-am437usb2" - if it has power down register like USB2 PHY on
+ "ti,control-phy-am437-usb2" - if it has power down register like USB2 PHY on
                          AM437 platform.
   - reg : Address and length of the register set for the device. It contains
     the address of "otghs_control" for control-phy-otghs or "power" register

drivers/phy/phy-omap-control.c +2 -2

index 17fc200..a7e2d7f 100644
@@ -228,11 +228,11 @@ static const struct of_device_id omap_control_phy_id_table[] = {
  		.data = &pipe3_data,
  	},
  	{
-		.compatible = "ti,control-phy-dra7usb2",
+		.compatible = "ti,control-phy-dra7-usb2",
  		.data = &dra7usb2_data,
  	},
  	{
-		.compatible = "ti,control-phy-am437usb2",
+		.compatible = "ti,control-phy-am437-usb2",
  		.data = &am437usb2_data,
  	},
  	{},

From: Felipe Balbi <[email protected]>

From: Roger Quadros <[email protected]>

The dra7-usb2 and am437-usb2 bindings have not yet been used. Change them to be more elegant.

Acked-by Kishon Vijay Abraham I <[email protected]>

Signed-off-by Roger Quadros <[email protected]>

Signed-off-by Felipe Balbi <[email protected]>

---
Changes from v3:
* changed the compatible name to 'ti,control-phy-usb2-dra7' and 'ti,control-phy-usb2-am437'

  Documentation/devicetree/bindings/phy/ti-phy.txt | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

Documentation/devicetree/bindings/phy/ti-phy.txt +2 -2

index 41dc132..8694aae 100644
@@ -9,9 +9,9 @@ Required properties:
                          e.g. USB2_PHY on OMAP5.
   "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
                          e.g. USB3 PHY and SATA PHY on OMAP5.
- "ti,control-phy-dra7usb2" - if it has power down register like USB2 PHY on
+ "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
                          DRA7 platform.
- "ti,control-phy-am437usb2" - if it has power down register like USB2 PHY on
+ "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
                          AM437 platform.
   - reg : Address and length of the register set for the device. It contains
     the address of "otghs_control" for control-phy-otghs or "power" register

The dra7-usb2 and am437-usb2 bindings have not yet been used. Change them to be more elegant.

Signed-off-by Roger Quadros <[email protected]>

---
 Documentation/devicetree/bindings/phy/ti-phy.txt | 4 ++--
 drivers/phy/phy-omap-control.c                   | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

Documentation/devicetree/bindings/phy/ti-phy.txt +0 -0

index 5c5b1b0..28e674b 100644
@@ -9,9 +9,9 @@ Required properties:
                         e.g. USB2_PHY on OMAP5.

drivers/phy/phy-omap-control.c +0 -0

index 17fc200..a7e2d7f 100644
@@ -228,11 +228,11 @@ static const struct of_device_id omap_control_phy_id_table[] = {
 		.data = &pipe3_data,
 	},
 	{

As this driver is no longer USB specific, use generic clock names.
- Use 'wkupclk', 'sysclk' and 'refclk' clock-names. Update DT binding info.
- Fix PLL_SD_SHIFT from 9 to 10
- Don't separate prepare/unprepare clock from enable/disable. This ensures optimal power savings.

Update omap5 usb3_phy device tree node.

CC Beno?t Cousson <[email protected]>

CC Tony Lindgren <[email protected]>

Signed-off-by Roger Quadros <[email protected]>

---
  Documentation/devicetree/bindings/phy/ti-phy.txt | 12 ++++++
  arch/arm/boot/dts/omap5.dtsi                     |  7 ++-
  drivers/phy/phy-ti-pipe3.c                       | 55 ++++++++++++------------

  3 files changed, 46 insertions(+), 28 deletions(-)

Documentation/devicetree/bindings/phy/ti-phy.txt +12 -0

index 28e674b..8d13349 100644
@@ -59,6 +59,12 @@ Required properties:
     filled in "reg".
   - #phy-cells: determine the number of cells that should be given in the
     phandle while referencing this phy.
+ - clocks: a list of phandles and clock-specifier pairs, one for each entry in
+   clock-names.
+ - clock-names: should include:
+   * "wkupclk" - wakup clock.
+   * "sysclk" - system clock.
+   * "refclk" - reference clock.
 
  Optional properties:
   - ctrl-module : phandle of the control module used by PHY driver to power on

@@ -74,4 +80,10 @@ usb3phy at 4a084400 {
  	reg-names = "phy_rx", "phy_tx", "pll_ctrl";
  	ctrl-module = <&omap_control_usb>;
  	#phy-cells = <0>;
+	clocks = <&usb_phy_cm_clk32k>,
+		 <&sys_clkin>,
+		 <&usb_otg_ss_refclk960m>;
+	clock-names =	"wkupclk",
+			"sysclk",
+			"refclk";
  };

arch/arm/boot/dts/omap5.dtsi +6 -1

index 859a800..e47601a 100644
@@ -778,7 +778,12 @@
  				      <0x4a084800 0x64>,
  				      <0x4a084c00 0x40>;
  				reg-names = "phy_rx", "phy_tx", "pll_ctrl";
-				ctrl-module = <&omap_control_usb3phy>;
+				clocks = <&usb_phy_cm_clk32k>,
+					 <&sys_clkin>,
+					 <&usb_otg_ss_refclk960m>;
+				clock-names =	"wkupclk",
+						"sysclk",
+						"refclk";
  				#phy-cells = <0>;
  			};
  		};

drivers/phy/phy-ti-pipe3.c +28 -27

index fd029b1..211703c 100644
@@ -45,7 +45,7 @@
  #define	PLL_SELFREQDCO_MASK	0x0000000E
  #define	PLL_SELFREQDCO_SHIFT	0x1
  #define	PLL_SD_MASK		0x0003FC00
-#define	PLL_SD_SHIFT		0x9
+#define	PLL_SD_SHIFT		10
  #define	SET_PLL_GO		0x1
  #define	PLL_TICOPWDN		0x10000
  #define	PLL_LOCK		0x2

@@ -72,7 +72,7 @@ struct ti_pipe3 {
  	struct device		*control_dev;
  	struct clk		*wkupclk;
  	struct clk		*sys_clk;
-	struct clk		*optclk;
+	struct clk		*refclk;
  };
 
  struct pipe3_dpll_map {

@@ -270,23 +270,21 @@ static int ti_pipe3_probe(struct platform_device *pdev)
 
  	phy->dev		= &pdev->dev;
 
-	phy->wkupclk = devm_clk_get(phy->dev, "usb_phy_cm_clk32k");
+	phy->wkupclk = devm_clk_get(phy->dev, "wkupclk");
  	if (IS_ERR(phy->wkupclk)) {
-		dev_err(&pdev->dev, "unable to get usb_phy_cm_clk32k\n");
+		dev_err(&pdev->dev, "unable to get wkupclk\n");
  		return PTR_ERR(phy->wkupclk);
  	}
-	clk_prepare(phy->wkupclk);
 
-	phy->optclk = devm_clk_get(phy->dev, "usb_otg_ss_refclk960m");
-	if (IS_ERR(phy->optclk)) {
-		dev_err(&pdev->dev, "unable to get usb_otg_ss_refclk960m\n");
-		return PTR_ERR(phy->optclk);
+	phy->refclk = devm_clk_get(phy->dev, "refclk");
+	if (IS_ERR(phy->refclk)) {
+		dev_err(&pdev->dev, "unable to get refclk\n");
+		return PTR_ERR(phy->refclk);
  	}
-	clk_prepare(phy->optclk);
 
-	phy->sys_clk = devm_clk_get(phy->dev, "sys_clkin");
+	phy->sys_clk = devm_clk_get(phy->dev, "sysclk");
  	if (IS_ERR(phy->sys_clk)) {
-		pr_err("%s: unable to get sys_clkin\n", __func__);
+		dev_err(&pdev->dev, "unable to get sysclk\n");
  		return -EINVAL;
  	}
 

@@ -326,10 +324,6 @@ static int ti_pipe3_probe(struct platform_device *pdev)
 
  static int ti_pipe3_remove(struct platform_device *pdev)
  {
-	struct ti_pipe3 *phy = platform_get_drvdata(pdev);
-
-	clk_unprepare(phy->wkupclk);
-	clk_unprepare(phy->optclk);
  	if (!pm_runtime_suspended(&pdev->dev))
  		pm_runtime_put(&pdev->dev);
  	pm_runtime_disable(&pdev->dev);

@@ -343,8 +337,10 @@ static int ti_pipe3_runtime_suspend(struct device *dev)
  {
  	struct ti_pipe3	*phy = dev_get_drvdata(dev);
 
-	clk_disable(phy->wkupclk);
-	clk_disable(phy->optclk);
+	if (!IS_ERR(phy->wkupclk))
+		clk_disable_unprepare(phy->wkupclk);
+	if (!IS_ERR(phy->refclk))
+		clk_disable_unprepare(phy->refclk);
 
  	return 0;
  }

@@ -354,22 +350,27 @@ static int ti_pipe3_runtime_resume(struct device *dev)
  	u32 ret = 0;
  	struct ti_pipe3	*phy = dev_get_drvdata(dev);
 
-	ret = clk_enable(phy->optclk);
-	if (ret) {
-		dev_err(phy->dev, "Failed to enable optclk %d\n", ret);
-		goto err1;
+	if (!IS_ERR(phy->refclk)) {
+		ret = clk_prepare_enable(phy->refclk);
+		if (ret) {
+			dev_err(phy->dev, "Failed to enable refclk %d\n", ret);
+			goto err1;
+		}
  	}
 
-	ret = clk_enable(phy->wkupclk);
-	if (ret) {
-		dev_err(phy->dev, "Failed to enable wkupclk %d\n", ret);
-		goto err2;
+	if (!IS_ERR(phy->wkupclk)) {
+		ret = clk_prepare_enable(phy->wkupclk);
+		if (ret) {
+			dev_err(phy->dev, "Failed to enable wkupclk %d\n", ret);
+			goto err2;
+		}
  	}
 
  	return 0;
 
  err2:
-	clk_disable(phy->optclk);
+	if (!IS_ERR(phy->refclk))
+		clk_disable_unprepare(phy->refclk);
 
  err1:
  	return ret;

USB and SATA DPLLs need different settings. Provide the SATA DPLL settings and use the proper DPLL settings based on device tree node's compatible_id.

Update the DT binding information.

Signed-off-by Roger Quadros <[email protected]>

---
  Documentation/devicetree/bindings/phy/ti-phy.txt |  3 +-
  drivers/phy/phy-ti-pipe3.c                       | 76 +++++++++++++++++-------

  2 files changed, 57 insertions(+), 22 deletions(-)

Documentation/devicetree/bindings/phy/ti-phy.txt +2 -1

index 8d13349..2c2d66a 100644
@@ -53,7 +53,8 @@ usb2phy at 4a0ad080 {
  TI PIPE3 PHY
 
  Required properties:
- - compatible: Should be "ti,phy-usb3". "ti,omap-usb3" is deprecated.
+ - compatible: Should be "ti,phy-usb3" or "ti,phy-pipe3-sata".
+   "ti,omap-usb3" is deprecated.
   - reg : Address and length of the register set for the device.
   - reg-names: The names of the register addresses corresponding to the registers
     filled in "reg".

drivers/phy/phy-ti-pipe3.c +55 -21

index 211703c..f141237 100644
@@ -66,6 +66,11 @@ struct pipe3_dpll_params {
  	u32	mf;
  };
 
+struct pipe3_dpll_map {
+	unsigned long rate;
+	struct pipe3_dpll_params params;
+};
+
  struct ti_pipe3 {
  	void __iomem		*pll_ctrl_base;
  	struct device		*dev;

@@ -73,20 +78,27 @@ struct ti_pipe3 {
  	struct clk		*wkupclk;
  	struct clk		*sys_clk;
  	struct clk		*refclk;
+	struct pipe3_dpll_map	*dpll_map;
  };
 
-struct pipe3_dpll_map {
-	unsigned long rate;
-	struct pipe3_dpll_params params;
-};
-
-static struct pipe3_dpll_map dpll_map[] = {
+static struct pipe3_dpll_map dpll_map_usb[] = {
  	{12000000, {1250, 5, 4, 20, 0} },	/* 12 MHz */
  	{16800000, {3125, 20, 4, 20, 0} },	/* 16.8 MHz */
  	{19200000, {1172, 8, 4, 20, 65537} },	/* 19.2 MHz */
  	{20000000, {1000, 7, 4, 10, 0} },	/* 20 MHz */
  	{26000000, {1250, 12, 4, 20, 0} },	/* 26 MHz */
  	{38400000, {3125, 47, 4, 20, 92843} },	/* 38.4 MHz */
+	{ },					/* Terminator */
+};
+
+static struct pipe3_dpll_map dpll_map_sata[] = {
+	{12000000, {1000, 7, 4, 6, 0} },	/* 12 MHz */
+	{16800000, {714, 7, 4, 6, 0} },		/* 16.8 MHz */
+	{19200000, {625, 7, 4, 6, 0} },		/* 19.2 MHz */
+	{20000000, {600, 7, 4, 6, 0} },		/* 20 MHz */
+	{26000000, {461, 7, 4, 6, 0} },		/* 26 MHz */
+	{38400000, {312, 7, 4, 6, 0} },		/* 38.4 MHz */
+	{ },					/* Terminator */
  };
 
  static inline u32 ti_pipe3_readl(void __iomem *addr, unsigned offset)

@@ -100,15 +112,20 @@ static inline void ti_pipe3_writel(void __iomem *addr, unsigned offset,
  	__raw_writel(data, addr + offset);
  }
 
-static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(unsigned long rate)
+static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy)
  {
-	int i;
+	unsigned long rate;
+	struct pipe3_dpll_map *dpll_map = phy->dpll_map;
 
-	for (i = 0; i < ARRAY_SIZE(dpll_map); i++) {
-		if (rate == dpll_map[i].rate)
-			return &dpll_map[i].params;
+	rate = clk_get_rate(phy->sys_clk);
+
+	for (; dpll_map->rate; dpll_map++) {
+		if (rate == dpll_map->rate)
+			return &dpll_map->params;
  	}
 
+	dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate);
+
  	return NULL;
  }
 

@@ -182,16 +199,11 @@ static void ti_pipe3_dpll_relock(struct ti_pipe3 *phy)
  static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
  {
  	u32			val;
-	unsigned long		rate;
  	struct pipe3_dpll_params *dpll_params;
 
-	rate = clk_get_rate(phy->sys_clk);
-	dpll_params = ti_pipe3_get_dpll_params(rate);
-	if (!dpll_params) {
-		dev_err(phy->dev,
-			  "No DPLL configuration for %lu Hz SYS CLK\n", rate);
+	dpll_params = ti_pipe3_get_dpll_params(phy);
+	if (!dpll_params)
  		return -EINVAL;
-	}
 
  	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
  	val &= ~PLL_REGN_MASK;

@@ -244,6 +256,10 @@ static struct phy_ops ops = {
  	.owner		= THIS_MODULE,
  };
 
+#ifdef CONFIG_OF
+static const struct of_device_id ti_pipe3_id_table[];
+#endif
+
  static int ti_pipe3_probe(struct platform_device *pdev)
  {
  	struct ti_pipe3 *phy;

@@ -253,8 +269,10 @@ static int ti_pipe3_probe(struct platform_device *pdev)
  	struct device_node *node = pdev->dev.of_node;
  	struct device_node *control_node;
  	struct platform_device *control_pdev;
+	const struct of_device_id *match;
 
-	if (!node)
+	match = of_match_device(of_match_ptr(ti_pipe3_id_table), &pdev->dev);
+	if (!match)
  		return -EINVAL;
 
  	phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL);

@@ -263,6 +281,12 @@ static int ti_pipe3_probe(struct platform_device *pdev)
  		return -ENOMEM;
  	}
 
+	phy->dpll_map = (struct pipe3_dpll_map *)match->data;
+	if (!phy->dpll_map) {
+		dev_err(&pdev->dev, "no DPLL data\n");
+		return -EINVAL;
+	}
+
  	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pll_ctrl");
  	phy->pll_ctrl_base = devm_ioremap_resource(&pdev->dev, res);
  	if (IS_ERR(phy->pll_ctrl_base))

@@ -388,8 +412,18 @@ static const struct dev_pm_ops ti_pipe3_pm_ops = {
 
  #ifdef CONFIG_OF
  static const struct of_device_id ti_pipe3_id_table[] = {
-	{ .compatible = "ti,phy-usb3" },
-	{ .compatible = "ti,omap-usb3" },
+	{
+		.compatible = "ti,phy-usb3",
+		.data = dpll_map_usb,
+	},
+	{
+		.compatible = "ti,omap-usb3",
+		.data = dpll_map_usb,
+	},
+	{
+		.compatible = "ti,phy-pipe3-sata",
+		.data = dpll_map_sata,
+	},
  	{}
  };
  MODULE_DEVICE_TABLE(of, ti_pipe3_id_table);