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mtd: Support for 4GB partitions

PATCH In review Dmitry Lavnikevich 1 participant 4 messages Mar 7, 2014 1 message not in the archive

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A message that is not in the archive (sent off-list or not yet received): 1394190783-12978-1-git-send-email-d.lavnikevich@sam-solutions.com

#1 lore raw

PATCH 2/5 mtd: Support for 4GB partitions

This patch implements correct way of creating partitions on mtd devices with size >= 4GB.

---
 commands/partition.c    | 4 ++--
 drivers/mtd/partition.c | 4 ++--
 include/linux/mtd/mtd.h | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)
commands/partition.c +2 -2
index f825722..44b91d1 100644
@@ -59,11 +59,11 @@ static int mtd_part_do_parse_one(char *devname, const char *partstr,
 		size = SIZE_REMAINING;
 		end = (char *)partstr + 1;
 	} else {
-		size = strtoul_suffix(partstr, &end, 0);
+		size = strtoull_suffix(partstr, &end, 0);
 	}
  	if (*end == '@')
-		*offset = strtoul_suffix(end+1, &end, 0);
+		*offset = strtoull_suffix(end+1, &end, 0);
  	if (size == SIZE_REMAINING)
 		size = devsize - *offset;
drivers/mtd/partition.c +0 -0
index 85f486d..1b8d36e 100644
@@ -90,8 +90,8 @@ static int mtd_part_block_markbad(struct mtd_info *mtd, loff_t ofs)
 	return res;
 }
 -struct mtd_info *mtd_add_partition(struct mtd_info *mtd, off_t 

offset, size_t size,
- unsigned long flags, const char *name)
+struct mtd_info *mtd_add_partition(struct mtd_info *mtd, off_t offset,
+ uint64_t size, unsigned long flags, const char *name)
{
struct mtd_part *slave;
struct mtd_info *slave_mtd;

include/linux/mtd/mtd.h +0 -0
index d337455..165bc88 100644
@@ -277,8 +277,8 @@ struct mtd_notifier {
 	struct list_head list;
 };
 -struct mtd_info *mtd_add_partition(struct mtd_info *mtd, off_t 

offset, size_t size,
- unsigned long flags, const char *name);
+struct mtd_info *mtd_add_partition(struct mtd_info *mtd, off_t offset,
+ uint64_t size, unsigned long flags, const char *name);
void mtd_del_partition(struct mtd_info *mtd);
extern void register_mtd_user (struct mtd_notifier *new);

Signature · 7 lines
1.8.5.1


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#2 lore raw

PATCH 3/5 ubi: Fix for creating ubi volumes with 64bit size

In reply to a message not in the archive

Since MTD is already supports >= 4GB device sizes it is better to allow ubi valumes also be created of larger sizes.

---
 commands/ubi.c         | 4 ++--
 drivers/mtd/ubi/cdev.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)
commands/ubi.c +2 -1
index 57ae790..8a409c2 100644
@@ -15,12 +15,12 @@ static int do_ubimkvol(int argc, char *argv[])
 {
 	struct ubi_mkvol_req req;
 	int fd, ret;
-	size_t size;
+	uint64_t size;
  	if (argc != 4)
 		return COMMAND_ERROR_USAGE;
 -	size = strtoul_suffix(argv[3], NULL, 0);
+	size = strtoull_suffix(argv[3], NULL, 0);
 	req.name_len = min_t(int, strlen(argv[2]), UBI_VOL_NAME_MAX);
 	strncpy(req.name, argv[2], req.name_len);
 	req.name[req.name_len] = 0;
drivers/mtd/ubi/cdev.c +1 -1
index 129f2e2..b97739a 100644
@@ -220,7 +220,7 @@ static int ubi_cdev_ioctl(struct cdev *cdev, int cmd, void *buf)
 		break;
 	case UBI_IOCMKVOL:
 		if (!req->bytes)
-			req->bytes = ubi->avail_pebs * ubi->leb_size;
+			req->bytes = (__s64)ubi->avail_pebs * ubi->leb_size;
 		return ubi_create_volume(ubi, req);
 	};
 -- 1.8.5.1

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#3 lore raw

PATCH 4/5 nand: mxs: Check for up to 4 NAND chips

In reply to a message not in the archive

Since i.MX6 has only one R/B actual pin, if there are several R/B signals (from different NAND chips) they must be connected to this pin.

---
 drivers/mtd/nand/nand_mxs.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)
drivers/mtd/nand/nand_mxs.c +9 -2
index d1e4b57..237a423 100644
@@ -33,6 +33,7 @@
 #include <dma/apbh-dma.h>
 #include <stmp-device.h>
 #include <asm/mmu.h>
+#include <mach/generic.h>
  #define	MX28_BLOCK_SFTRST				(1 << 31)
 #define	MX28_BLOCK_CLKGATE				(1 << 30)
@@ -427,7 +428,13 @@ static int mxs_nand_device_ready(struct mtd_info *mtd)
  	if (nand_info->version > GPMI_VERSION_TYPE_MX23) {
 		tmp = readl(gpmi_regs + GPMI_STAT);
-		tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip);
+		/* i.MX6 has only one R/B actual pin, so if there are several
+		   R/B signals they must be all connected to this pin */
+		if (cpu_is_mx6())
+			tmp >>= GPMI_STAT_READY_BUSY_OFFSET;
+		else
+			tmp >>= (GPMI_STAT_READY_BUSY_OFFSET +
+					 nand_info->cur_chip);
 	} else {
 		tmp = readl(gpmi_regs + GPMI_DEBUG);
 		tmp >>= (GPMI_DEBUG_READY0_OFFSET + nand_info->cur_chip);
@@ -1304,7 +1311,7 @@ static int mxs_nand_probe(struct device_d *dev)
 	nand->ecc.strength	= 8;
  	/* first scan to find the device and get the page size */
-	err = nand_scan_ident(mtd, 1, NULL);
+	err = nand_scan_ident(mtd, 4, NULL);
 	if (err)
 		goto err2;
 -- 1.8.5.1
 

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#4 lore raw

PATCH 5/5 nand: mxs: Fix for calculating ecc strength on some types of NAND flash

In reply to a message not in the archive

Was tested on NAND with {writesize=4096, oobsize=224} and {writesize=2048, oobsize=64}.

This patch will not break any NAND that was working before. Implemented calculation way may be used for other NAND chips with writesize == 2048 but oobsize != 64.

---
 drivers/mtd/nand/nand_mxs.c | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)
drivers/mtd/nand/nand_mxs.c +17 -3
index 237a423..b06b558 100644
@@ -234,18 +234,31 @@ static uint32_t mxs_nand_aux_status_offset(void)
 static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
 						uint32_t page_oob_size)
 {
+	int ecc_chunk_count = mxs_nand_ecc_chunk_cnt(page_data_size);
+	int ecc_strength = 0;
+	int gf_len = 13;  /* length of Galois Field for non-DDR nand */
+
+	/*
+	 * Possibly this if-else calculation may be removed since
+	 * ecc_strength calculated after it is taken from kernel driver
+	 * and therefore should work for all cases. But it was tested only
+	 * on devices with {data_size = 2046, oob_size = 64} and
+	 * {data_size = 4096, oob_size = 224} configuration.
+	 */
 	if (page_data_size == 2048)
 		return 8;
-
-	if (page_data_size == 4096) {
+	else if (page_data_size == 4096) {
 		if (page_oob_size == 128)
 			return 8;
-
 		if (page_oob_size == 218)
 			return 16;
 	}
 -	return 0;
+	ecc_strength = ((page_oob_size - MXS_NAND_METADATA_SIZE) * 8)
+		/ (gf_len * ecc_chunk_count);
+
+	/* We need the minor even number. */
+	return rounddown(ecc_strength, 2);
 }
  static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size,
Signature · 7 lines
1.8.5.1


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