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Disable Subpage nand write when using Atmel PMECC

PATCH New Herve Codina 3 participants 5 messages Mar 3, 2014 – Mar 11, 2014

Subsystems (3)
Memory technology devices (MTD) Arm/Microchip (AT91) SoC support NAND flash
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Herve Codina

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#0 lore raw

PATCH 1/1 Disable Subpage nand write when using Atmel PMECC

Crash detected on sam5d35 and its pmecc nand ecc controller.

The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc (nand_base.c) when we write a sub page.
chip->ecc.hwctl function is not set when we are using PMECC controller. As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in order to disable sub page access in nand_write_page.

Signed-off-by Herve Codina <[email protected]>
---
 drivers/mtd/nand/atmel_nand.c |    1 +
 1 file changed, 1 insertion(+)
drivers/mtd/nand/atmel_nand.c +1 -0
index 1f719e0..4ce181a 100644
@@ -1220,6 +1220,7 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
 		goto err;
 	}
 
+	nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
 	nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
 	nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH 1/1 Disable Subpage nand write when using Atmel PMECC

Dear Herve

I add the Brian in the email, who is the maintainer of the mtd.

Quoted 10 lines · Herve Codina

Crash detected on sam5d35 and its pmecc nand ecc controller.

The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc (nand_base.c) when we write a sub page.
chip->ecc.hwctl function is not set when we are using PMECC controller. As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in order to disable sub page access in nand_write_page.

Signed-off-by Herve Codina <[email protected]>
Acked-by Josh Wu <[email protected]>
Quoted 9 lines
---
  drivers/mtd/nand/atmel_nand.c |    1 +
  1 file changed, 1 insertion(+)
drivers/mtd/nand/atmel_nand.c +0 -0
index 1f719e0..4ce181a 100644

drivers/mtd/nand/atmel_nand.c static int atmel_pmecc_nand_init_params(struct platform_device *pdev, · line 1226

Quoted 7 lines
drivers/mtd/nand/atmel_nand.c +1 -0
@@ -1220,6 +1220,7 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
  		goto err;
  	}
 
+	nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
  	nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
  	nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;

Best Regards,
Josh Wu

Applied
#2 lore raw

PATCH 1/1 Disable Subpage nand write when using Atmel PMECC

Quoted 10 lines · Josh Wu
Quoted 9 lines · Herve Codina

Crash detected on sam5d35 and its pmecc nand ecc controller.

The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc (nand_base.c) when we write a sub page.
chip->ecc.hwctl function is not set when we are using PMECC controller. As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in order to disable sub page access in nand_write_page.

Quoted 3 lines
Quoted 1 line
Signed-off-by Herve Codina <[email protected]>
Acked-by Josh Wu <[email protected]>

Pushed to l2-mtd.git. Thanks!

Brian

#3 lore raw

PATCH 1/1 Disable Subpage nand write when using Atmel PMECC

Hi, Brian

Quoted 11 lines · Brian Norris
Quoted 10 lines · Josh Wu
Quoted 9 lines · Herve Codina

Crash detected on sam5d35 and its pmecc nand ecc controller.

The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc (nand_base.c) when we write a sub page.
chip->ecc.hwctl function is not set when we are using PMECC controller. As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in order to disable sub page access in nand_write_page.

Quoted 3 lines
Quoted 2 lines
Quoted 1 line
Signed-off-by Herve Codina <[email protected]>
Acked-by Josh Wu <[email protected]>

Pushed to l2-mtd.git. Thanks!

Sorry for the later thought. But I think this patch should go to the stable Linux branch
since any subpage write will cause crash in SAMA5D3 and AT91SAM9X5. So is it possible to add a tag: "Cc: stable at vger.kernel.org" for this commit?

Best Regards,
Josh Wu

Quoted 2 lines

Brian

#4 lore raw

PATCH 1/1 Disable Subpage nand write when using Atmel PMECC

Quoted 13 lines · Josh Wu
Quoted 12 lines · Brian Norris
Quoted 11 lines · Josh Wu
Quoted 10 lines · Herve Codina

Crash detected on sam5d35 and its pmecc nand ecc controller.

The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc (nand_base.c) when we write a sub page.
chip->ecc.hwctl function is not set when we are using PMECC controller. As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in order to disable sub page access in nand_write_page.

Signed-off-by Herve Codina <[email protected]>
Quoted 8 lines
Quoted 2 lines
Quoted 1 line
Acked-by Josh Wu <[email protected]>

Pushed to l2-mtd.git. Thanks!

Sorry for the later thought. But I think this patch should go to the stable Linux branch
since any subpage write will cause crash in SAMA5D3 and AT91SAM9X5. So is it possible to add a tag: "Cc: stable at vger.kernel.org" for this commit?

Done, thanks for mentioning it! I was thinking of this when I applied it, actually.

Brian