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Watchdog support for Armada 375/38x SoC

PATCH Superseded Ezequiel Garcia 3 participants 13 messages Mar 15, 2014 – Mar 17, 2014

Subsystems (2)
Device tree bindings Watchdog device drivers
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Ezequiel Garcia

author
#0 lore raw

v4 cover Watchdog support for Armada 375/38x SoC

Fourth round of the patchset adding support for watchdog on Armada 375 and Armada 38x SoCs.

The new Armada 375/385 SoCs have two registers for the watchdog RSTOUT:

1. It has a dedicated register (similar to the one in A370/XP)
2. Also has a bit in a shared RSTOUT register.

Therefore, in order to support this two-folded RSTOUT, we extend the 'reg' property in the watchdog devicetree and require a new pair of cells to specify the shared RSTOUT.

On the driver side, we need to implement per-SoC stop() and enabled() functions. Such somewhat complex infrastructure is needed to ensure the driver performs proper reset of the watchdog timer, by masking and disabling the RSTOUT before the interrupt is enabled.

I've pushed a branch so people can test this easily, e.g. ensuring no regressions on Dove, Kirkwood and A370/XP:

https://github.com/MISL-EBU-System-SW/mainline-public/tree/wdt_a385_a375_v4

Series based on today's mvebu for-next. Will send a rebased version on top of v3.15-rc1. Tested on A375-DB, A385-DB, A370-RD and Dove Cubox.

Changes from v3:

* Added orion_wdt_get_regs() to do the ioremap'ing (and region request for non-shared regions), as previously suggested by Guenter. The probe() function is a bit more readable after this.

Changes from v2:

* Cleaned-up usage of atomic_io_modify(), using it only when needed. For instance, the RSTOUT dedicated register on Armada 370/375/380/XP can be safely access without any lock.

* Use devm_ioremap_resource() for the non-shared registers. The shared registers need to use devm_ioremap(), which does not request the memory region.

Changes from v1:

* Reworked entirely!

Ezequiel Garcia (9):
watchdog: orion: Move the register ioremap'ing to its own function
watchdog: orion: Introduce a SoC-specific RSTOUT mapping
watchdog: orion: Remove unneeded atomic access
watchdog: orion: Introduce per-SoC stop() function
watchdog: orion: Introduce per-SoC enabled() function
watchdog: orion: Add Armada 375/380 SoC support
ARM: mvebu: Enable Armada 375 watchdog in the devicetree
ARM: mvebu: Enable Armada 380/385 watchdog in the devicetree
ARM: mvebu: Add A375/A380 watchdog binding documentation

 .../devicetree/bindings/watchdog/marvel.txt        |   7 +
 arch/arm/boot/dts/armada-375.dtsi                  |   6 +
 arch/arm/boot/dts/armada-38x.dtsi                  |   7 +
 drivers/watchdog/orion_wdt.c                       | 213 ++++++++++++++++++---
 4 files changed, 210 insertions(+), 23 deletions(-)
Signature · 1 line
1.9.0
author
#1 lore raw

PATCH v4 1/9 watchdog: orion: Move the register ioremap'ing to its own function

Follow-up patches will extend the registers ioremap and request to handle SoC-specific quirks on the RSTOUT register. Therefore, in order to keep the code readable, this commit introduces a special function for this.

Signed-off-by Ezequiel Garcia <[email protected]>
---
 drivers/watchdog/orion_wdt.c | 38 ++++++++++++++++++++++++--------------
 1 file changed, 24 insertions(+), 14 deletions(-)
drivers/watchdog/orion_wdt.c +24 -14
index 6f9b4c6..b7d57bb 100644
@@ -314,12 +314,32 @@ static const struct of_device_id orion_wdt_of_match_table[] = {
 };
 MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);
 
+static int orion_wdt_get_regs(struct platform_device *pdev,
+			      struct orion_watchdog *dev)
+{
+	struct resource *res;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res)
+		return -ENODEV;
+	dev->reg = devm_ioremap(&pdev->dev, res->start,
+				resource_size(res));
+	if (!dev->reg)
+		return -ENOMEM;
+
+	dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start &
+						     INTERNAL_REGS_MASK);
+	if (!dev->rstout)
+		return -ENODEV;
+
+	return 0;
+}
+
 static int orion_wdt_probe(struct platform_device *pdev)
 {
 	struct orion_watchdog *dev;
 	const struct of_device_id *match;
 	unsigned int wdt_max_duration;	/* (seconds) */
-	struct resource *res;
 	int ret, irq;
 
 	dev = devm_kzalloc(&pdev->dev, sizeof(struct orion_watchdog),

@@ -337,19 +357,9 @@ static int orion_wdt_probe(struct platform_device *pdev)
 	dev->wdt.min_timeout = 1;
 	dev->data = match->data;
 
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (!res)
-		return -ENODEV;
-
-	dev->reg = devm_ioremap(&pdev->dev, res->start,
-			       resource_size(res));
-	if (!dev->reg)
-		return -ENOMEM;
-
-	dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start &
-						     INTERNAL_REGS_MASK);
-	if (!dev->rstout)
-		return -ENODEV;
+	ret = orion_wdt_get_regs(pdev, dev);
+	if (ret)
+		return ret;
 
 	ret = dev->data->clock_init(pdev, dev);
 	if (ret) {
Signature · 1 line
1.9.0
maintainer
#2 lore raw

PATCH v4 1/9 watchdog: orion: Move the register ioremap'ing to its own function

Quoted 6 lines · Ezequiel Garcia

Follow-up patches will extend the registers ioremap and request to handle SoC-specific quirks on the RSTOUT register. Therefore, in order to keep the code readable, this commit introduces a special function for this.

Signed-off-by Ezequiel Garcia <[email protected]>
Reviewed-by Guenter Roeck <[email protected]>
author
#3 lore raw

PATCH v4 2/9 watchdog: orion: Introduce a SoC-specific RSTOUT mapping

In reply to Ezequiel Garcia

Separate the RSTOUT register mapping for the different compatible strings supported by the driver. This allows to use devm_ioremap on SoC variants that share the RSTOUT register, and devm_ioremap_resource (which requests the MMIO region) on SoCs that have a dedicated RSTOUT register.

Reviewed-by Guenter Roeck <[email protected]>
Signed-off-by Ezequiel Garcia <[email protected]>
---
 drivers/watchdog/orion_wdt.c | 27 ++++++++++++++++++++-------
 1 file changed, 20 insertions(+), 7 deletions(-)
drivers/watchdog/orion_wdt.c +20 -7
index b7d57bb..9b513e8 100644
@@ -263,10 +263,6 @@ static void __iomem *orion_wdt_ioremap_rstout(struct platform_device *pdev,
 		return devm_ioremap(&pdev->dev, res->start,
 				    resource_size(res));
 
-	/* This workaround works only for "orion-wdt", DT-enabled */
-	if (!of_device_is_compatible(pdev->dev.of_node, "marvell,orion-wdt"))
-		return NULL;
-
 	rstout = internal_regs + ORION_RSTOUT_MASK_OFFSET;
 
 	WARN(1, FW_BUG "falling back to harcoded RSTOUT reg %pa\n", &rstout);

@@ -317,6 +313,7 @@ MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);
 static int orion_wdt_get_regs(struct platform_device *pdev,
 			      struct orion_watchdog *dev)
 {
+	struct device_node *node = pdev->dev.of_node;
 	struct resource *res;
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

@@ -327,10 +324,26 @@ static int orion_wdt_get_regs(struct platform_device *pdev,
 	if (!dev->reg)
 		return -ENOMEM;
 
-	dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start &
-						     INTERNAL_REGS_MASK);
-	if (!dev->rstout)
+	/* Each supported compatible has some RSTOUT register quirk */
+	if (of_device_is_compatible(node, "marvell,orion-wdt")) {
+
+		dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start &
+						       INTERNAL_REGS_MASK);
+		if (!dev->rstout)
+			return -ENODEV;
+
+	} else if (of_device_is_compatible(node, "marvell,armada-370-wdt") ||
+		   of_device_is_compatible(node, "marvell,armada-xp-wdt")) {
+
+		/* Dedicated RSTOUT register, can be requested. */
+		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+		dev->rstout = devm_ioremap_resource(&pdev->dev, res);
+		if (IS_ERR(dev->rstout))
+			return PTR_ERR(dev->rstout);
+
+	} else {
 		return -ENODEV;
+	}
 
 	return 0;
 }
Signature · 1 line
1.9.0
author
#4 lore raw

PATCH v4 3/9 watchdog: orion: Remove unneeded atomic access

In reply to Ezequiel Garcia

The RSTOUT register on the Armada 370 SoC variant is a dedicated register (not shared across orthogonal subsystems) and so it's not needed to write it atomically.

Reviewed-by Guenter Roeck <[email protected]>
Signed-off-by Ezequiel Garcia <[email protected]>
---
 drivers/watchdog/orion_wdt.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)
drivers/watchdog/orion_wdt.c +5 -2
index 9b513e8..7d9f93f 100644
@@ -146,6 +146,7 @@ static int orion_wdt_ping(struct watchdog_device *wdt_dev)
 static int armada370_start(struct watchdog_device *wdt_dev)
 {
 	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+	u32 reg;
 
 	/* Set watchdog duration */
 	writel(dev->clk_rate * wdt_dev->timeout,

@@ -158,8 +159,10 @@ static int armada370_start(struct watchdog_device *wdt_dev)
 	atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
 						dev->data->wdt_enable_bit);
 
-	atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit,
-				      dev->data->rstout_enable_bit);
+	/* Enable reset on watchdog */
+	reg = readl(dev->rstout);
+	reg |= dev->data->rstout_enable_bit;
+	writel(reg, dev->rstout);
 	return 0;
 }
Signature · 1 line
1.9.0
author
#5 lore raw

PATCH v4 4/9 watchdog: orion: Introduce per-SoC stop() function

In reply to Ezequiel Garcia

In order to support other SoCs, it's needed to have a different stop() implementation for each SoC. This commit adds no functionality, and it consists of preparation work.

Reviewed-by Guenter Roeck <[email protected]>
Signed-off-by Ezequiel Garcia <[email protected]>
---
 drivers/watchdog/orion_wdt.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)
drivers/watchdog/orion_wdt.c +28 -1
index 7d9f93f..2d07e6d 100644
@@ -59,6 +59,7 @@ struct orion_watchdog_data {
 	int (*clock_init)(struct platform_device *,
 			  struct orion_watchdog *);
 	int (*start)(struct watchdog_device *);
+	int (*stop)(struct watchdog_device *);
 };
 
 struct orion_watchdog {

@@ -193,7 +194,7 @@ static int orion_wdt_start(struct watchdog_device *wdt_dev)
 	return dev->data->start(wdt_dev);
 }
 
-static int orion_wdt_stop(struct watchdog_device *wdt_dev)
+static int orion_stop(struct watchdog_device *wdt_dev)
 {
 	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
 

@@ -206,6 +207,29 @@ static int orion_wdt_stop(struct watchdog_device *wdt_dev)
 	return 0;
 }
 
+static int armada370_stop(struct watchdog_device *wdt_dev)
+{
+	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+	u32 reg;
+
+	/* Disable reset on watchdog */
+	reg = readl(dev->rstout);
+	reg &= ~dev->data->rstout_enable_bit;
+	writel(reg, dev->rstout);
+
+	/* Disable watchdog timer */
+	atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
+
+	return 0;
+}
+
+static int orion_wdt_stop(struct watchdog_device *wdt_dev)
+{
+	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+
+	return dev->data->stop(wdt_dev);
+}
+
 static int orion_wdt_enabled(struct orion_watchdog *dev)
 {
 	bool enabled, running;

@@ -278,6 +302,7 @@ static const struct orion_watchdog_data orion_data = {
 	.wdt_counter_offset = 0x24,
 	.clock_init = orion_wdt_clock_init,
 	.start = orion_start,
+	.stop = orion_stop,
 };
 
 static const struct orion_watchdog_data armada370_data = {

@@ -286,6 +311,7 @@ static const struct orion_watchdog_data armada370_data = {
 	.wdt_counter_offset = 0x34,
 	.clock_init = armada370_wdt_clock_init,
 	.start = armada370_start,
+	.stop = armada370_stop,
 };
 
 static const struct orion_watchdog_data armadaxp_data = {

@@ -294,6 +320,7 @@ static const struct orion_watchdog_data armadaxp_data = {
 	.wdt_counter_offset = 0x34,
 	.clock_init = armadaxp_wdt_clock_init,
 	.start = armada370_start,
+	.stop = armada370_stop,
 };
 
 static const struct of_device_id orion_wdt_of_match_table[] = {
Signature · 1 line
1.9.0
author
#6 lore raw

PATCH v4 5/9 watchdog: orion: Introduce per-SoC enabled() function

In reply to Ezequiel Garcia

In order to support other SoCs, it's needed to have a different enabled() implementation for each SoC. This commit adds no functionality, and it consists of preparation work.

Reviewed-by Guenter Roeck <[email protected]>
Signed-off-by Ezequiel Garcia <[email protected]>
---
 drivers/watchdog/orion_wdt.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)
drivers/watchdog/orion_wdt.c +13 -2
index 2d07e6d..6c230e2 100644
@@ -58,6 +58,7 @@ struct orion_watchdog_data {
 	int rstout_enable_bit;
 	int (*clock_init)(struct platform_device *,
 			  struct orion_watchdog *);
+	int (*enabled)(struct orion_watchdog *);
 	int (*start)(struct watchdog_device *);
 	int (*stop)(struct watchdog_device *);
 };

@@ -230,7 +231,7 @@ static int orion_wdt_stop(struct watchdog_device *wdt_dev)
 	return dev->data->stop(wdt_dev);
 }
 
-static int orion_wdt_enabled(struct orion_watchdog *dev)
+static int orion_enabled(struct orion_watchdog *dev)
 {
 	bool enabled, running;
 

@@ -240,6 +241,13 @@ static int orion_wdt_enabled(struct orion_watchdog *dev)
 	return enabled && running;
 }
 
+static int orion_wdt_enabled(struct watchdog_device *wdt_dev)
+{
+	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+
+	return dev->data->enabled(dev);
+}
+
 static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev)
 {
 	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);

@@ -301,6 +309,7 @@ static const struct orion_watchdog_data orion_data = {
 	.wdt_enable_bit = BIT(4),
 	.wdt_counter_offset = 0x24,
 	.clock_init = orion_wdt_clock_init,
+	.enabled = orion_enabled,
 	.start = orion_start,
 	.stop = orion_stop,
 };

@@ -310,6 +319,7 @@ static const struct orion_watchdog_data armada370_data = {
 	.wdt_enable_bit = BIT(8),
 	.wdt_counter_offset = 0x34,
 	.clock_init = armada370_wdt_clock_init,
+	.enabled = orion_enabled,
 	.start = armada370_start,
 	.stop = armada370_stop,
 };

@@ -319,6 +329,7 @@ static const struct orion_watchdog_data armadaxp_data = {
 	.wdt_enable_bit = BIT(8),
 	.wdt_counter_offset = 0x34,
 	.clock_init = armadaxp_wdt_clock_init,
+	.enabled = orion_enabled,
 	.start = armada370_start,
 	.stop = armada370_stop,
 };

@@ -425,7 +436,7 @@ static int orion_wdt_probe(struct platform_device *pdev)
 	 * removed and re-insterted, or if the bootloader explicitly
 	 * set a running watchdog before booting the kernel.
 	 */
-	if (!orion_wdt_enabled(dev))
+	if (!orion_wdt_enabled(&dev->wdt))
 		orion_wdt_stop(&dev->wdt);
 
 	/* Request the IRQ only after the watchdog is disabled */
Signature · 1 line
1.9.0
author
#7 lore raw

PATCH v4 6/9 watchdog: orion: Add Armada 375/380 SoC support

In reply to Ezequiel Garcia

This commit adds support for the Armada 375 and Armada 380 SoCs.

This SoC variant has a second RSTOUT register, in addition to the already existent, which is shared with the system-controller. To handle this RSTOUT, we introduce a new MMIO register 'rstout_mask' to be required on 'armada-{375,380}-watchdog' new compatible string.

Reviewed-by Guenter Roeck <[email protected]>
Signed-off-by Ezequiel Garcia <[email protected]>
---
 drivers/watchdog/orion_wdt.c | 103 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 103 insertions(+)
drivers/watchdog/orion_wdt.c +103 -0
index 6c230e2..c843523 100644
@@ -56,6 +56,7 @@ struct orion_watchdog_data {
 	int wdt_counter_offset;
 	int wdt_enable_bit;
 	int rstout_enable_bit;
+	int rstout_mask_bit;
 	int (*clock_init)(struct platform_device *,
 			  struct orion_watchdog *);
 	int (*enabled)(struct orion_watchdog *);

@@ -67,6 +68,7 @@ struct orion_watchdog {
 	struct watchdog_device wdt;
 	void __iomem *reg;
 	void __iomem *rstout;
+	void __iomem *rstout_mask;
 	unsigned long clk_rate;
 	struct clk *clk;
 	const struct orion_watchdog_data *data;

@@ -145,6 +147,31 @@ static int orion_wdt_ping(struct watchdog_device *wdt_dev)
 	return 0;
 }
 
+static int armada375_start(struct watchdog_device *wdt_dev)
+{
+	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+	u32 reg;
+
+	/* Set watchdog duration */
+	writel(dev->clk_rate * wdt_dev->timeout,
+	       dev->reg + dev->data->wdt_counter_offset);
+
+	/* Clear the watchdog expiration bit */
+	atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0);
+
+	/* Enable watchdog timer */
+	atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
+						dev->data->wdt_enable_bit);
+
+	/* Enable reset on watchdog */
+	reg = readl(dev->rstout);
+	reg |= dev->data->rstout_enable_bit;
+	writel(reg, dev->rstout);
+
+	atomic_io_modify(dev->rstout_mask, dev->data->rstout_mask_bit, 0);
+	return 0;
+}
+
 static int armada370_start(struct watchdog_device *wdt_dev)
 {
 	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);

@@ -208,6 +235,24 @@ static int orion_stop(struct watchdog_device *wdt_dev)
 	return 0;
 }
 
+static int armada375_stop(struct watchdog_device *wdt_dev)
+{
+	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+	u32 reg;
+
+	/* Disable reset on watchdog */
+	atomic_io_modify(dev->rstout_mask, dev->data->rstout_mask_bit,
+					   dev->data->rstout_mask_bit);
+	reg = readl(dev->rstout);
+	reg &= ~dev->data->rstout_enable_bit;
+	writel(reg, dev->rstout);
+
+	/* Disable watchdog timer */
+	atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
+
+	return 0;
+}
+
 static int armada370_stop(struct watchdog_device *wdt_dev)
 {
 	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);

@@ -241,6 +286,17 @@ static int orion_enabled(struct orion_watchdog *dev)
 	return enabled && running;
 }
 
+static int armada375_enabled(struct orion_watchdog *dev)
+{
+	bool masked, enabled, running;
+
+	masked = readl(dev->rstout_mask) & dev->data->rstout_mask_bit;
+	enabled = readl(dev->rstout) & dev->data->rstout_enable_bit;
+	running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit;
+
+	return !masked && enabled && running;
+}
+
 static int orion_wdt_enabled(struct watchdog_device *wdt_dev)
 {
 	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);

@@ -334,6 +390,28 @@ static const struct orion_watchdog_data armadaxp_data = {
 	.stop = armada370_stop,
 };
 
+static const struct orion_watchdog_data armada375_data = {
+	.rstout_enable_bit = BIT(8),
+	.rstout_mask_bit = BIT(10),
+	.wdt_enable_bit = BIT(8),
+	.wdt_counter_offset = 0x34,
+	.clock_init = armada370_wdt_clock_init,
+	.enabled = armada375_enabled,
+	.start = armada375_start,
+	.stop = armada375_stop,
+};
+
+static const struct orion_watchdog_data armada380_data = {
+	.rstout_enable_bit = BIT(8),
+	.rstout_mask_bit = BIT(10),
+	.wdt_enable_bit = BIT(8),
+	.wdt_counter_offset = 0x34,
+	.clock_init = armadaxp_wdt_clock_init,
+	.enabled = armada375_enabled,
+	.start = armada375_start,
+	.stop = armada375_stop,
+};
+
 static const struct of_device_id orion_wdt_of_match_table[] = {
 	{
 		.compatible = "marvell,orion-wdt",

@@ -347,6 +425,14 @@ static const struct of_device_id orion_wdt_of_match_table[] = {
 		.compatible = "marvell,armada-xp-wdt",
 		.data = &armadaxp_data,
 	},
+	{
+		.compatible = "marvell,armada-375-wdt",
+		.data = &armada375_data,
+	},
+	{
+		.compatible = "marvell,armada-380-wdt",
+		.data = &armada380_data,
+	},
 	{},
 };
 MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);

@@ -382,6 +468,23 @@ static int orion_wdt_get_regs(struct platform_device *pdev,
 		if (IS_ERR(dev->rstout))
 			return PTR_ERR(dev->rstout);
 
+	} else if (of_device_is_compatible(node, "marvell,armada-375-wdt") ||
+		   of_device_is_compatible(node, "marvell,armada-380-wdt")) {
+
+		/* Dedicated RSTOUT register, can be requested. */
+		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+		dev->rstout = devm_ioremap_resource(&pdev->dev, res);
+		if (IS_ERR(dev->rstout))
+			return PTR_ERR(dev->rstout);
+
+		res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
+		if (!res)
+			return -ENODEV;
+		dev->rstout_mask = devm_ioremap(&pdev->dev, res->start,
+						resource_size(res));
+		if (!dev->rstout_mask)
+			return -ENOMEM;
+
 	} else {
 		return -ENODEV;
 	}
Signature · 1 line
1.9.0
author
#8 lore raw

PATCH v4 7/9 ARM: mvebu: Enable Armada 375 watchdog in the devicetree

In reply to Ezequiel Garcia

Add the DT nodes to enable the watchdog support available on Armada 375 SoC.

Reviewed-by Guenter Roeck <[email protected]>
Signed-off-by Ezequiel Garcia <[email protected]>
---
 arch/arm/boot/dts/armada-375.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm/boot/dts/armada-375.dtsi +6 -0
index 3877693f..0bfa57b 100644
@@ -320,6 +320,12 @@
 				clocks = <&coreclk 0>;
 			};
 
+			watchdog at 20300 {
+				compatible = "marvell,armada-375-wdt";
+				reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>;
+				clocks = <&coreclk 0>;
+			};
+
 			xor at 60800 {
 				compatible = "marvell,orion-xor";
 				reg = <0x60800 0x100
Signature · 1 line
1.9.0
author
#9 lore raw

PATCH v4 8/9 ARM: mvebu: Enable Armada 380/385 watchdog in the devicetree

In reply to Ezequiel Garcia

Add the DT nodes to enable the watchdog support available on Armada 380/385 SoC.

Reviewed-by Guenter Roeck <[email protected]>
Signed-off-by Ezequiel Garcia <[email protected]>
---
 arch/arm/boot/dts/armada-38x.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm/boot/dts/armada-38x.dtsi +7 -0
index a064f59..9a94196 100644
@@ -267,6 +267,13 @@
 				clock-names = "nbclk", "fixed";
 			};
 
+			watchdog at 20300 {
+				compatible = "marvell,armada-380-wdt";
+				reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>;
+				clocks = <&coreclk 2>, <&refclk>;
+				clock-names = "nbclk", "fixed";
+			};
+
 			eth1: ethernet at 30000 {
 				compatible = "marvell,armada-370-neta";
 				reg = <0x30000 0x4000>;
Signature · 1 line
1.9.0
author
#10 lore raw

PATCH v4 9/9 ARM: mvebu: Add A375/A380 watchdog binding documentation

In reply to Ezequiel Garcia

This commit documents the new support for "marvell,armada-{375,380}-wdt" compatible strings and the extra 'reg' entry requirement.

Reviewed-by Guenter Roeck <[email protected]>
Signed-off-by Ezequiel Garcia <[email protected]>
---
 Documentation/devicetree/bindings/watchdog/marvel.txt | 7 +++++++
 1 file changed, 7 insertions(+)
Documentation/devicetree/bindings/watchdog/marvel.txt +7 -0
index de11eb4..97223fd 100644
@@ -5,11 +5,18 @@ Required Properties:
 - Compatibility : "marvell,orion-wdt"
 		  "marvell,armada-370-wdt"
 		  "marvell,armada-xp-wdt"
+		  "marvell,armada-375-wdt"
+		  "marvell,armada-380-wdt"
 
 - reg		: Should contain two entries: first one with the
 		  timer control address, second one with the
 		  rstout enable address.
 
+For "marvell,armada-375-wdt" and "marvell,armada-380-wdt":
+
+- reg		: A third entry is mandatory and should contain the
+                  shared mask/unmask RSTOUT address.
+
 Optional properties:
 
 - interrupts	: Contains the IRQ for watchdog expiration
Signature · 1 line
1.9.0
#11 lore raw

v4 cover Watchdog support for Armada 375/38x SoC

In reply to Ezequiel Garcia
Quoted 12 lines · Ezequiel Garcia

Fourth round of the patchset adding support for watchdog on Armada 375 and Armada 38x SoCs.

The new Armada 375/385 SoCs have two registers for the watchdog RSTOUT:

1. It has a dedicated register (similar to the one in A370/XP)
2. Also has a bit in a shared RSTOUT register.

Therefore, in order to support this two-folded RSTOUT, we extend the 'reg' property in the watchdog devicetree and require a new pair of cells to specify the shared RSTOUT.

Quoted 7 lines

On the driver side, we need to implement per-SoC stop() and enabled() functions. Such somewhat complex infrastructure is needed to ensure the driver performs proper reset of the watchdog timer, by masking and disabling the RSTOUT before the interrupt is enabled.

I've pushed a branch so people can test this easily, e.g. ensuring no regressions on Dove, Kirkwood and A370/XP:

Ezequiel,

Although, I just saw below that you actually already tested on Dove, you can add my

Tested-by Sebastian Hesselbarth <[email protected]>
Quoted 4 lines

https://github.com/MISL-EBU-System-SW/mainline-public/tree/wdt_a385_a375_v4

Series based on today's mvebu for-next. Will send a rebased version on top of v3.15-rc1. Tested on A375-DB, A385-DB, A370-RD and Dove Cubox.

Sebastian

author
#12 lore raw

v4 cover Watchdog support for Armada 375/38x SoC

Quoted 21 lines · Sebastian Hesselbarth
Quoted 12 lines · Ezequiel Garcia

Fourth round of the patchset adding support for watchdog on Armada 375 and Armada 38x SoCs.

The new Armada 375/385 SoCs have two registers for the watchdog RSTOUT:

1. It has a dedicated register (similar to the one in A370/XP)
2. Also has a bit in a shared RSTOUT register.

Therefore, in order to support this two-folded RSTOUT, we extend the 'reg' property in the watchdog devicetree and require a new pair of cells to specify the shared RSTOUT.

Quoted 7 lines

On the driver side, we need to implement per-SoC stop() and enabled() functions. Such somewhat complex infrastructure is needed to ensure the driver performs proper reset of the watchdog timer, by masking and disabling the RSTOUT before the interrupt is enabled.

I've pushed a branch so people can test this easily, e.g. ensuring no regressions on Dove, Kirkwood and A370/XP:

Quoted 7 lines

Ezequiel,

Although, I just saw below that you actually already tested on Dove, you can add my

Tested-by Sebastian Hesselbarth <[email protected]>

Great, thanks!

Signature · 3 lines
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com