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arm: exynos: pinmux: Add sdmmc4 gpio configuration

PATCH Superseded Beomho Seo 2 participants 2 messages Mar 14, 2014 – Mar 17, 2014

Subsystems (2)

v2 of 3 Superseded Latest is v3 →

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Beomho Seo

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#0 lore raw

PATCH v2 2/4 arm: exynos: pinmux: Add sdmmc4 gpio configuration

For use dwmmc controller at exynos4, add SDMMC gpio configuration. In case SDMMC2, do not use 8bit mode at exynos4.

Cc Lukasz Majewski <[email protected]>
Cc Piotr Wilczek <[email protected]>
Cc Minkyu Kang <[email protected]>

---
Changes for v2:
- Fixed value initialise.
- Comment add in function.

 arch/arm/cpu/armv7/exynos/pinmux.c |   19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)
arch/arm/cpu/armv7/exynos/pinmux.c +15 -4
index 9edb475..3dce5d2 100644
@@ -632,16 +632,26 @@ static int exynos4_mmc_config(int peripheral, int flags)
 	struct exynos4_gpio_part2 *gpio2 =
 		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
 	struct s5p_gpio_bank *bank, *bank_ext;
+	unsigned int  func, func_ext;
 	int i;
 
 	switch (peripheral) {
 	case PERIPH_ID_SDMMC0:
 		bank = &gpio2->k0;
 		bank_ext = &gpio2->k1;
+		func = GPIO_FUNC(0x2);
+		func_ext = GPIO_FUNC(0x3);
 		break;
 	case PERIPH_ID_SDMMC2:
 		bank = &gpio2->k2;
-		bank_ext = &gpio2->k3;
+		func = GPIO_FUNC(0x2);
+		func_ext = 0;
+		break;
+	case PERIPH_ID_SDMMC4:
+		bank = &gpio2->k0;
+		bank_ext = &gpio2->k1;
+		func = GPIO_FUNC(0x3);
+		func_ext = GPIO_FUNC(0x4);
 		break;
 	default:
 		return -1;
@@ -649,13 +659,14 @@ static int exynos4_mmc_config(int peripheral, int flags)
 	for (i = 0; i < 7; i++) {
 		if (i == 2)
 			continue;
-		s5p_gpio_cfg_pin(bank, i,  GPIO_FUNC(0x2));
+		s5p_gpio_cfg_pin(bank, i,  func);
 		s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
 		s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
 	}
+	/* SDMMC do not use 8bit mode@exynos4 */
 	if (flags & PINMUX_FLAG_8BIT_MODE) {
 		for (i = 3; i < 7; i++) {
-			s5p_gpio_cfg_pin(bank_ext, i,  GPIO_FUNC(0x3));
+			s5p_gpio_cfg_pin(bank_ext, i,  func_ext);
 			s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
 			s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
 		}
@@ -722,10 +733,10 @@ static int exynos4_pinmux_config(int peripheral, int flags)
 		break;
 	case PERIPH_ID_SDMMC0:
 	case PERIPH_ID_SDMMC2:
+	case PERIPH_ID_SDMMC4:
 		return exynos4_mmc_config(peripheral, flags);
 	case PERIPH_ID_SDMMC1:
 	case PERIPH_ID_SDMMC3:
-	case PERIPH_ID_SDMMC4:
 		debug("SDMMC device %d not implemented\n", peripheral);
 		return -1;
 	default:
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH v2 2/4 arm: exynos: pinmux: Add sdmmc4 gpio configuration

Dear Beomho Seo,

Quoted 27 lines · Beomho Seo

For use dwmmc controller at exynos4, add SDMMC gpio configuration. In case SDMMC2, do not use 8bit mode at exynos4.

Cc Lukasz Majewski <[email protected]>
Cc Piotr Wilczek <[email protected]>
Cc Minkyu Kang <[email protected]>

---
Changes for v2:
- Fixed value initialise.
- Comment add in function.

  arch/arm/cpu/armv7/exynos/pinmux.c |   19 +++++++++++++++----
  1 file changed, 15 insertions(+), 4 deletions(-)
arch/arm/cpu/armv7/exynos/pinmux.c +1 -0
index 9edb475..3dce5d2 100644
@@ -632,16 +632,26 @@ static int exynos4_mmc_config(int peripheral, int flags)
  	struct exynos4_gpio_part2 *gpio2 =
  		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
  	struct s5p_gpio_bank *bank, *bank_ext;
+	unsigned int  func, func_ext;
  	int i;
 

arch/arm/cpu/armv7/exynos/pinmux.c static int exynos4_mmc_config(int peripheral, int flags) · line 644

Quoted 10 lines
arch/arm/cpu/armv7/exynos/pinmux.c +2 -1
  	switch (peripheral) {
  	case PERIPH_ID_SDMMC0:
  		bank = &gpio2->k0;
  		bank_ext = &gpio2->k1;
+		func = GPIO_FUNC(0x2);
+		func_ext = GPIO_FUNC(0x3);
  		break;
  	case PERIPH_ID_SDMMC2:
  		bank = &gpio2->k2;
-		bank_ext = &gpio2->k3;

that causes warning 'bank_ext' may be used uninitialized in this function

Quoted 31 lines
arch/arm/cpu/armv7/exynos/pinmux.c +11 -2
+		func = GPIO_FUNC(0x2);
+		func_ext = 0;
+		break;
+	case PERIPH_ID_SDMMC4:
+		bank = &gpio2->k0;
+		bank_ext = &gpio2->k1;
+		func = GPIO_FUNC(0x3);
+		func_ext = GPIO_FUNC(0x4);
  		break;
  	default:
  		return -1;
@@ -649,13 +659,14 @@ static int exynos4_mmc_config(int peripheral, int flags)
  	for (i = 0; i < 7; i++) {
  		if (i == 2)
  			continue;
-		s5p_gpio_cfg_pin(bank, i,  GPIO_FUNC(0x2));
+		s5p_gpio_cfg_pin(bank, i,  func);
  		s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
  		s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
  	}
+	/* SDMMC do not use 8bit mode at exynos4 */
  	if (flags & PINMUX_FLAG_8BIT_MODE) {
  		for (i = 3; i < 7; i++) {
-			s5p_gpio_cfg_pin(bank_ext, i,  GPIO_FUNC(0x3));
+			s5p_gpio_cfg_pin(bank_ext, i,  func_ext);
  			s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
  			s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
  		}
@@ -722,10 +733,10 @@ static int exynos4_pinmux_config(int peripheral, int flags)
  		break;

arch/arm/cpu/armv7/exynos/pinmux.c static int exynos4_pinmux_config(int peripheral, int flags) · line 742

Quoted 10 lines
arch/arm/cpu/armv7/exynos/pinmux.c +1 -1
  	case PERIPH_ID_SDMMC0:
  	case PERIPH_ID_SDMMC2:
+	case PERIPH_ID_SDMMC4:
  		return exynos4_mmc_config(peripheral, flags);
  	case PERIPH_ID_SDMMC1:
  	case PERIPH_ID_SDMMC3:
-	case PERIPH_ID_SDMMC4:
  		debug("SDMMC device %d not implemented\n", peripheral);
  		return -1;
  	default:

Best regards,
Piotr Wilczek