{PATCH v3 3/4] arm: exynos: clock: Remove exynos4x12_set_mmc_clk function

U-Boot Beomho Seo 2 participants 3 messages Mar 20, 2014 – Apr 8, 2014

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Arm (32-bit) Arm Samsung Exynos

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Beomho Seo

author

2014-03-20 04:14 UTC #0 lore raw

exynos4x12_set_mmc_clk function have been removed.
Because, exynos4x12_clock and exynos4_clock return smae div_fsys* value.

Signed-off-by Beomho Seo <[email protected]>

Signed-off-by Jaehoon Chung <[email protected]>

Tested-by Piotr Wilczek <[email protected]>

Cc Lukasz Majewski <[email protected]>

Cc Piotr Wilczek <[email protected]>

Cc Minkyu Kang <[email protected]>

---
Changes for v3:
- None.

Changes for v2:
- None.

 arch/arm/cpu/armv7/exynos/clock.c |   29 +----------------------------
 1 file changed, 1 insertion(+), 28 deletions(-)

arch/arm/cpu/armv7/exynos/clock.c +1 ~~-28~~

index 1fea4d6..2c2029a 100644
@@ -893,30 +893,6 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div)
 			(div & 0xff) << ((dev_index << 4) + 8));
 }
 
-/* exynos4x12: set the mmc clock */
-static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div)
-{
-	struct exynos4x12_clock *clk =
-		(struct exynos4x12_clock *)samsung_get_base_clock();
-	unsigned int addr;
-
-	/*
-	 * CLK_DIV_FSYS1
-	 * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
-	 * CLK_DIV_FSYS2
-	 * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
-	 */
-	if (dev_index < 2) {
-		addr = (unsigned int)&clk->div_fsys1;
-	} else {
-		addr = (unsigned int)&clk->div_fsys2;
-		dev_index -= 2;
-	}
-
-	clrsetbits_le32(addr, 0xff << ((dev_index << 4) + 8),
-			(div & 0xff) << ((dev_index << 4) + 8));
-}
-
 /* exynos5: set the mmc clock */
 static void exynos5_set_mmc_clk(int dev_index, unsigned int div)
 {

@@ -1612,10 +1588,7 @@ void set_mmc_clk(int dev_index, unsigned int div)
 		else
 			exynos5_set_mmc_clk(dev_index, div);
 	} else {
-		if (proid_is_exynos4412())
-			exynos4x12_set_mmc_clk(dev_index, div);
-		else
-			exynos4_set_mmc_clk(dev_index, div);
+		exynos4_set_mmc_clk(dev_index, div);
 	}
 }

Signature · 1 line

1.7.9.5

Minkyu Kang

2014-04-08 02:53 UTC #1 lore raw

Dear Beomho Seo,

Quoted 2 lines · Beomho Seo

exynos4x12_set_mmc_clk function have been removed.
Because, exynos4x12_clock and exynos4_clock return smae div_fsys* value.

typo, smae -> same?

Quoted 54 lines

Signed-off-by Beomho Seo <[email protected]>

Signed-off-by Jaehoon Chung <[email protected]>

Tested-by Piotr Wilczek <[email protected]>

Cc Lukasz Majewski <[email protected]>

Cc Piotr Wilczek <[email protected]>

Cc Minkyu Kang <[email protected]>

---
Changes for v3:
- None.

Changes for v2:
- None.

 arch/arm/cpu/armv7/exynos/clock.c |   29 +----------------------------
 1 file changed, 1 insertion(+), 28 deletions(-)

arch/arm/cpu/armv7/exynos/clock.c +0 ~~-24~~

index 1fea4d6..2c2029a 100644
@@ -893,30 +893,6 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div)
 			(div & 0xff) << ((dev_index << 4) + 8));
 }
 
-/* exynos4x12: set the mmc clock */
-static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div)
-{
-	struct exynos4x12_clock *clk =
-		(struct exynos4x12_clock *)samsung_get_base_clock();
-	unsigned int addr;
-
-	/*
-	 * CLK_DIV_FSYS1
-	 * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
-	 * CLK_DIV_FSYS2
-	 * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
-	 */
-	if (dev_index < 2) {
-		addr = (unsigned int)&clk->div_fsys1;
-	} else {
-		addr = (unsigned int)&clk->div_fsys2;
-		dev_index -= 2;
-	}
-
-	clrsetbits_le32(addr, 0xff << ((dev_index << 4) + 8),
-			(div & 0xff) << ((dev_index << 4) + 8));
-}
-
 /* exynos5: set the mmc clock */
 static void exynos5_set_mmc_clk(int dev_index, unsigned int div)
 {

@@ -1612,10 +1588,7 @@ void set_mmc_clk(int dev_index, unsigned int div)
 		else

arch/arm/cpu/armv7/exynos/clock.c void set_mmc_clk(int dev_index, unsigned int div) · line 1594

Quoted 10 lines

arch/arm/cpu/armv7/exynos/clock.c +1 -4

 			exynos5_set_mmc_clk(dev_index, div);
 	} else {
-		if (proid_is_exynos4412())
-			exynos4x12_set_mmc_clk(dev_index, div);
-		else
-			exynos4_set_mmc_clk(dev_index, div);
+		exynos4_set_mmc_clk(dev_index, div);
 	}
 }

Thanks,
Minkyu Kang.

Beomho Seo

author

2014-04-08 03:42 UTC #2 lore raw

Quoted 8 lines · Minkyu Kang

Dear Beomho Seo,
Quoted 2 lines · Beomho Seo
exynos4x12_set_mmc_clk function have been removed.
Because, exynos4x12_clock and exynos4_clock return smae div_fsys* value.
typo, smae -> same?

Thank you. I will fix this mistake.

Quoted 68 lines

Quoted 54 lines

Signed-off-by Beomho Seo <[email protected]>

Signed-off-by Jaehoon Chung <[email protected]>

Tested-by Piotr Wilczek <[email protected]>

Cc Lukasz Majewski <[email protected]>

Cc Piotr Wilczek <[email protected]>

Cc Minkyu Kang <[email protected]>

---
Changes for v3:
- None.

Changes for v2:
- None.

 arch/arm/cpu/armv7/exynos/clock.c |   29 +----------------------------
 1 file changed, 1 insertion(+), 28 deletions(-)

arch/arm/cpu/armv7/exynos/clock.c +0 ~~-24~~

index 1fea4d6..2c2029a 100644
@@ -893,30 +893,6 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div)
 			(div & 0xff) << ((dev_index << 4) + 8));
 }
 
-/* exynos4x12: set the mmc clock */
-static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div)
-{
-	struct exynos4x12_clock *clk =
-		(struct exynos4x12_clock *)samsung_get_base_clock();
-	unsigned int addr;
-
-	/*
-	 * CLK_DIV_FSYS1
-	 * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
-	 * CLK_DIV_FSYS2
-	 * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
-	 */
-	if (dev_index < 2) {
-		addr = (unsigned int)&clk->div_fsys1;
-	} else {
-		addr = (unsigned int)&clk->div_fsys2;
-		dev_index -= 2;
-	}
-
-	clrsetbits_le32(addr, 0xff << ((dev_index << 4) + 8),
-			(div & 0xff) << ((dev_index << 4) + 8));
-}
-
 /* exynos5: set the mmc clock */
 static void exynos5_set_mmc_clk(int dev_index, unsigned int div)
 {

@@ -1612,10 +1588,7 @@ void set_mmc_clk(int dev_index, unsigned int div)
 		else

arch/arm/cpu/armv7/exynos/clock.c void set_mmc_clk(int dev_index, unsigned int div) · line 1594

Quoted 10 lines

arch/arm/cpu/armv7/exynos/clock.c +1 -4

 			exynos5_set_mmc_clk(dev_index, div);
 	} else {
-		if (proid_is_exynos4412())
-			exynos4x12_set_mmc_clk(dev_index, div);
-		else
-			exynos4_set_mmc_clk(dev_index, div);
+		exynos4_set_mmc_clk(dev_index, div);
 	}
 }

Thanks,
Minkyu Kang.