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QE/FMAN: modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR

PATCH New Zhao Qiang 3 participants 10 messages Mar 21, 2014 – Apr 23, 2014

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Zhao Qiang

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PATCH v7 1/3 QE/FMAN: modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR

CONFIG_SYS_QE_FMAN_FW_ADDR is used to both Fman and QE for microcode address. Now using CONFIG_SYS_FMAN_FW_ADDR for Fman microcode address,
and CONFIG_SYS_QE_FW_ADDR for QE microcode address.

---
Changes for v2:
- no
Changes for v3:
- no
Changes for v4:
- no
Changes for v5:
- modify CONFIG_SYS_QE_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR for kmp204x
Changes for v6:
- rebase
Changes for v7:
- no

 README                              |  9 +++++++--
 arch/powerpc/cpu/mpc85xx/cpu_init.c |  2 +-
 drivers/net/fm/fm.c                 | 12 ++++++------
 drivers/qe/qe.c                     |  2 +-
 include/configs/B4860QDS.h          | 10 +++++-----
 include/configs/MPC8569MDS.h        |  2 +-
 include/configs/P1023RDB.h          |  2 +-
 include/configs/P1023RDS.h          |  4 ++--
 include/configs/P2041RDB.h          | 10 +++++-----
 include/configs/T1040QDS.h          |  8 ++++----
 include/configs/T1040RDB.h          |  8 ++++----
 include/configs/T1042RDB_PI.h       |  8 ++++----
 include/configs/T208xQDS.h          | 10 +++++-----
 include/configs/T208xRDB.h          | 10 +++++-----
 include/configs/T4240EMU.h          |  2 +-
 include/configs/T4240QDS.h          | 10 +++++-----
 include/configs/corenet_ds.h        | 10 +++++-----
 include/configs/km/km8309-common.h  |  2 +-
 include/configs/km/kmp204x-common.h |  2 +-
 include/configs/p1_p2_rdb_pc.h      |  2 +-
 include/configs/p1_twr.h            |  2 +-
 21 files changed, 66 insertions(+), 61 deletions(-)
README +7 -2
index 216f0c7..c49efee 100644
@@ -4485,8 +4485,13 @@ This firmware often needs to be loaded during U-Boot booting, so macros
 are used to identify the storage device (NOR flash, SPI, etc) and the address
 within that device.
 
-- CONFIG_SYS_QE_FMAN_FW_ADDR
-	The address in the storage device where the firmware is located.  The
+- CONFIG_SYS_FMAN_FW_ADDR
+	The address in the storage device where the FMAN microcode is located.  The
+	meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
+	is also specified.
+
+- CONFIG_SYS_QE_FW_ADDR
+	The address in the storage device where the QE microcode is located.  The
 	meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
 	is also specified.
 
arch/powerpc/cpu/mpc85xx/cpu_init.c +1 -1
index 81aeadd..e0fb3e5 100644
@@ -805,7 +805,7 @@ void cpu_secondary_init_r(void)
 
 	/* load QE firmware from NAND flash to DDR first */
 	ret = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FMAN_FW_IN_NAND,
-			&fw_length, (u_char *)CONFIG_SYS_QE_FMAN_FW_ADDR);
+			&fw_length, (u_char *)CONFIG_SYS_QE_FW_ADDR);
 
 	if (ret && ret == -EUCLEAN) {
 		printf ("NAND read for QE firmware at offset %x failed %d\n",
drivers/net/fm/fm.c +6 -6
index bca20b3..400e9dd 100644
@@ -350,16 +350,16 @@ int fm_init_common(int index, struct ccsr_fman *reg)
 {
 	int rc;
 #if defined(CONFIG_SYS_QE_FMAN_FW_IN_NOR)
-	void *addr = (void *)CONFIG_SYS_QE_FMAN_FW_ADDR;
+	void *addr = (void *)CONFIG_SYS_FMAN_FW_ADDR;
 #elif defined(CONFIG_SYS_QE_FMAN_FW_IN_NAND)
 	size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
 	void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
 
-	rc = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FMAN_FW_ADDR,
+	rc = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_FMAN_FW_ADDR,
 		       &fw_length, (u_char *)addr);
 	if (rc == -EUCLEAN) {
 		printf("NAND read of FMAN firmware at offset 0x%x failed %d\n",
-			CONFIG_SYS_QE_FMAN_FW_ADDR, rc);
+			CONFIG_SYS_FMAN_FW_ADDR, rc);
 	}
 #elif defined(CONFIG_SYS_QE_FW_IN_SPIFLASH)
 	struct spi_flash *ucode_flash;
@@ -371,7 +371,7 @@ int fm_init_common(int index, struct ccsr_fman *reg)
 	if (!ucode_flash)
 		printf("SF: probe for ucode failed\n");
 	else {
-		ret = spi_flash_read(ucode_flash, CONFIG_SYS_QE_FMAN_FW_ADDR,
+		ret = spi_flash_read(ucode_flash, CONFIG_SYS_FMAN_FW_ADDR,
 				CONFIG_SYS_QE_FMAN_FW_LENGTH, addr);
 		if (ret)
 			printf("SF: read for ucode failed\n");
@@ -381,7 +381,7 @@ int fm_init_common(int index, struct ccsr_fman *reg)
 	int dev = CONFIG_SYS_MMC_ENV_DEV;
 	void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
 	u32 cnt = CONFIG_SYS_QE_FMAN_FW_LENGTH / 512;
-	u32 blk = CONFIG_SYS_QE_FMAN_FW_ADDR / 512;
+	u32 blk = CONFIG_SYS_FMAN_FW_ADDR / 512;
 	struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV);
 
 	if (!mmc)
@@ -395,7 +395,7 @@ int fm_init_common(int index, struct ccsr_fman *reg)
 		flush_cache((ulong)addr, cnt * 512);
 	}
 #elif defined(CONFIG_SYS_QE_FMAN_FW_IN_REMOTE)
-	void *addr = (void *)CONFIG_SYS_QE_FMAN_FW_ADDR;
+	void *addr = (void *)CONFIG_SYS_FMAN_FW_ADDR;
 #else
 	void *addr = NULL;
 #endif
drivers/qe/qe.c +1 -1
index b5ddc4b..b1da75e 100644
@@ -165,7 +165,7 @@ void qe_init(uint qe_base)
 	/*
 	 * Upload microcode to IRAM for those SOCs which do not have ROM in QE.
 	 */
-	qe_upload_firmware((const void *)CONFIG_SYS_QE_FMAN_FW_ADDR);
+	qe_upload_firmware((const void *)CONFIG_SYS_QE_FW_ADDR);
 
 	/* enable the microcode in IRAM */
 	out_be32(&qe_immr->iram.iready,QE_IRAM_READY);
include/configs/B4860QDS.h +5 -5
index b248302..b9ec957 100644
@@ -596,7 +596,7 @@ unsigned long get_board_ddr_clk(void);
  * env, so we got 0x110000.
  */
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0x110000
+#define CONFIG_SYS_FMAN_FW_ADDR	0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
@@ -604,10 +604,10 @@ unsigned long get_board_ddr_clk(void);
  * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1130)
+#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 1130)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
@@ -617,10 +617,10 @@ unsigned long get_board_ddr_clk(void);
  * master LAW->the ucode address in master's memory space.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xFFE00000
+#define CONFIG_SYS_FMAN_FW_ADDR	0xFFE00000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
+#define CONFIG_SYS_FMAN_FW_ADDR		0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
include/configs/MPC8569MDS.h +1 -1
index 58b9c26..5165a45 100644
@@ -493,7 +493,7 @@ extern unsigned long get_clock_freq(void);
 
 /* QE microcode/firmware address */
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xfff00000
+#define CONFIG_SYS_QE_FW_ADDR	0xfff00000
 
 /*
  * BOOTP options
include/configs/P1023RDB.h +1 -1
index b41cb4a..d7274f1 100644
@@ -360,7 +360,7 @@ extern unsigned long get_clock_freq(void);
 /* Default address of microcode for the Linux Fman driver */
 /* QE microcode/firmware address */
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xEFF00000
+#define CONFIG_SYS_FMAN_FW_ADDR	0xEFF00000
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
include/configs/P1023RDS.h +2 -2
index 2ffa354..0ee75dc 100644
@@ -500,10 +500,10 @@ extern unsigned long get_clock_freq(void);
 /* Default address of microcode for the Linux Fman driver */
 /* QE microcode/firmware address */
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xEFF00000
+#define CONFIG_SYS_FMAN_FW_ADDR	0xEFF00000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0x1f00000
+#define CONFIG_SYS_FMAN_FW_ADDR	0x1f00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
include/configs/P2041RDB.h +5 -5
index b3880f1..f024c29 100644
@@ -506,7 +506,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
  * env, so we got 0x110000.
  */
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0x110000
+#define CONFIG_SYS_FMAN_FW_ADDR	0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
@@ -514,10 +514,10 @@ unsigned long get_board_sys_clk(unsigned long dummy);
  * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
+#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
@@ -527,10 +527,10 @@ unsigned long get_board_sys_clk(unsigned long dummy);
  * master LAW->the ucode address in master's memory space.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xFFE00000
+#define CONFIG_SYS_FMAN_FW_ADDR	0xFFE00000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xEFF00000
+#define CONFIG_SYS_FMAN_FW_ADDR	0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
include/configs/T1040QDS.h +4 -4
index 993f9ae..84213b8 100644
@@ -602,7 +602,7 @@ unsigned long get_board_ddr_clk(void);
  * env, so we got 0x110000.
  */
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0x110000
+#define CONFIG_SYS_FMAN_FW_ADDR	0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
@@ -610,13 +610,13 @@ unsigned long get_board_ddr_clk(void);
  * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
+#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
+#define CONFIG_SYS_FMAN_FW_ADDR		0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
include/configs/T1040RDB.h +4 -4
index 395845b..7420db9 100644
@@ -517,7 +517,7 @@
  * env, so we got 0x110000.
  */
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0x110000
+#define CONFIG_SYS_FMAN_FW_ADDR	0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
@@ -525,13 +525,13 @@
  * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
+#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(4 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR	(4 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
+#define CONFIG_SYS_FMAN_FW_ADDR		0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
include/configs/T1042RDB_PI.h +4 -4
index 68656e6..a2af6b0 100644
@@ -525,7 +525,7 @@
  * env, so we got 0x110000.
  */
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0x110000
+#define CONFIG_SYS_FMAN_FW_ADDR	0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
@@ -533,13 +533,13 @@
  * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
+#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(4 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR	(4 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
+#define CONFIG_SYS_FMAN_FW_ADDR		0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
include/configs/T208xQDS.h +5 -5
index 399ddbb..04527e3 100644
@@ -552,7 +552,7 @@ unsigned long get_board_ddr_clk(void);
  * env, so we got 0x110000.
  */
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0x110000
+#define CONFIG_SYS_FMAN_FW_ADDR	0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
@@ -560,10 +560,10 @@ unsigned long get_board_ddr_clk(void);
  * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
+#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
@@ -573,10 +573,10 @@ unsigned long get_board_ddr_clk(void);
  * master LAW->the ucode address in master's memory space.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xFFE00000
+#define CONFIG_SYS_FMAN_FW_ADDR	0xFFE00000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xEFF00000
+#define CONFIG_SYS_FMAN_FW_ADDR	0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
include/configs/T208xRDB.h +5 -5
index 743eee3..66f8a4c 100644
@@ -510,7 +510,7 @@ unsigned long get_board_ddr_clk(void);
  * env, so we got 0x110000.
  */
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0x110000
+#define CONFIG_SYS_FMAN_FW_ADDR	0x110000
 #define CONFIG_CORTINA_FW_ADDR		0x120000
 
 #elif defined(CONFIG_SDCARD)
@@ -520,12 +520,12 @@ unsigned long get_board_ddr_clk(void);
  * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
+#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 1680)
 #define CONFIG_CORTINA_FW_ADDR		(512 * 1808)
 
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR	(6 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #define CONFIG_CORTINA_FW_ADDR		(7 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
@@ -536,11 +536,11 @@ unsigned long get_board_ddr_clk(void);
  * master LAW->the ucode address in master's memory space.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xFFE00000
+#define CONFIG_SYS_FMAN_FW_ADDR	0xFFE00000
 #define CONFIG_CORTINA_FW_ADDR		0xFFE10000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xEFF00000
+#define CONFIG_SYS_FMAN_FW_ADDR	0xEFF00000
 #define CONFIG_CORTINA_FW_ADDR		0xEFE00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
include/configs/T4240EMU.h +1 -1
index c81c457..ad5a9a6 100644
@@ -98,7 +98,7 @@
 #define CONFIG_SYS_INTERLAKEN
 
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
+#define CONFIG_SYS_FMAN_FW_ADDR		0xEFF00000
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
include/configs/T4240QDS.h +5 -5
index 56e1293..1b98cfd 100644
@@ -375,7 +375,7 @@ unsigned long get_board_ddr_clk(void);
  * env, so we got 0x110000.
  */
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0x110000
+#define CONFIG_SYS_FMAN_FW_ADDR	0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
@@ -383,10 +383,10 @@ unsigned long get_board_ddr_clk(void);
  * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
+#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
@@ -396,10 +396,10 @@ unsigned long get_board_ddr_clk(void);
  * master LAW->the ucode address in master's memory space.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xFFE00000
+#define CONFIG_SYS_FMAN_FW_ADDR	0xFFE00000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
+#define CONFIG_SYS_FMAN_FW_ADDR		0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
include/configs/corenet_ds.h +5 -5
index 1e4bfc4..ca14558 100644
@@ -509,7 +509,7 @@
  * env, so we got 0x110000.
  */
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0x110000
+#define CONFIG_SYS_FMAN_FW_ADDR	0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
@@ -517,10 +517,10 @@
  * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
+#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
@@ -530,10 +530,10 @@
  * master LAW->the ucode address in master's memory space.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xFFE00000
+#define CONFIG_SYS_FMAN_FW_ADDR	0xFFE00000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
+#define CONFIG_SYS_FMAN_FW_ADDR		0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
include/configs/km/km8309-common.h +1 -1
index 29c6f60..c8df23b 100644
@@ -27,7 +27,7 @@
 /* QE microcode/firmware address */
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 /* at end of uboot partition, before env */
-#define CONFIG_SYS_QE_FMAN_FW_ADDR   0xF00B0000
+#define CONFIG_SYS_QE_FW_ADDR   0xF00B0000
 
 /*
  * System IO Config
include/configs/km/kmp204x-common.h +1 -1
index 582978a..418e3d1 100644
@@ -350,7 +350,7 @@ int get_scl(void);
  * ucode is stored after env, so we got 0x120000.
  */
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0x120000
+#define CONFIG_SYS_FMAN_FW_ADDR	0x120000
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
include/configs/p1_p2_rdb_pc.h +1 -1
index 07b6179..d3a792a 100644
@@ -772,7 +772,7 @@
 #ifdef CONFIG_QE
 /* QE microcode/firmware address */
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xefec0000
+#define CONFIG_SYS_QE_FW_ADDR	0xefec0000
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #endif /* CONFIG_QE */
 
include/configs/p1_twr.h +1 -1
index c296a07..97ec593 100644
@@ -348,7 +348,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #ifdef CONFIG_QE
 /* QE microcode/firmware address */
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xefec0000
+#define CONFIG_SYS_QE_FW_ADDR	0xefec0000
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #endif /* CONFIG_QE */
 
Signature · 1 line
1.8.5
author
#1 lore raw

PATCH v7 2/3 QE/U-QE: Add U-QE support

Modify code to adapt to both u-qe and qe.

U_QE is a kind of cutted QE.
the differences between U_QE and QE
1. UCC: U_QE supports 2 UCCs while QE supports up to 8 UCCs.
2. IMMR: have different immr base addr.
3. iopin: U_QE doesn't need to config iopin.

---
Changes for v2:
- modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR
Changes for v3:
- use CONFIG_U_QE instead of CONFIG_PPC_T1040
Changes for v4:
- ifdef CONFIG_U_QE, include "../../../../drivers/qe/qe.h"
Changes for v5:
- no
Changes for v6:
- rebase
Changes for v7:
- split to two patches, the one to support u-qe and the other is to add u-qe to t1040qds

 arch/powerpc/cpu/mpc85xx/cpu_init.c       | 16 +++++++++++++---
 arch/powerpc/cpu/mpc85xx/qe_io.c          |  2 +-
 arch/powerpc/cpu/mpc85xx/speed.c          |  4 ++++
 arch/powerpc/cpu/mpc85xx/t1040_ids.c      |  1 +
 arch/powerpc/include/asm/config_mpc85xx.h |  3 +++
 arch/powerpc/include/asm/fsl_liodn.h      |  4 ++++
 arch/powerpc/include/asm/immap_85xx.h     |  5 ++++-
 drivers/qe/qe.h                           |  2 ++
 8 files changed, 32 insertions(+), 5 deletions(-)
arch/powerpc/cpu/mpc85xx/cpu_init.c +13 -3
index e0fb3e5..8e327b1 100644
@@ -33,6 +33,9 @@
 #endif
 
 #include "../../../../drivers/block/fsl_sata.h"
+#ifdef CONFIG_U_QE
+#include "../../../../drivers/qe/qe.h"
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -84,7 +87,7 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy)
 #endif
 
 
-#ifdef CONFIG_QE
+#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
 extern qe_iop_conf_t qe_iop_conf_tab[];
 extern void qe_config_iopin(u8 port, u8 pin, int dir,
 				int open_drain, int assign);
@@ -309,10 +312,12 @@ void cpu_init_f (void)
 #if defined(CONFIG_CPM2)
 	m8560_cpm_reset();
 #endif
-#ifdef CONFIG_QE
+
+#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
 	/* Config QE ioports */
 	config_qe_ioports();
 #endif
+
 #if defined(CONFIG_FSL_DMA)
 	dma_init();
 #endif
@@ -797,8 +802,13 @@ int sata_initialize(void)
 
 void cpu_secondary_init_r(void)
 {
-#ifdef CONFIG_QE
+#ifdef CONFIG_U_QE
+	uint qe_base = CONFIG_SYS_IMMR + 0x00140000; /* QE immr base */
+#elif defined CONFIG_QE
 	uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */
+#endif
+
+#ifdef CONFIG_QE
 #ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
 	int ret;
 	size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
arch/powerpc/cpu/mpc85xx/qe_io.c +1 -1
index 76c60da..d2825ec 100644
@@ -12,7 +12,7 @@
 #include "asm/io.h"
 #include "asm/immap_85xx.h"
 
-#if defined(CONFIG_QE)
+#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
 #define	NUM_OF_PINS	32
 void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)
 {
arch/powerpc/cpu/mpc85xx/speed.c +4 -0
index adf09ef..488fd5e 100644
@@ -336,6 +336,10 @@ void get_sys_info(sys_info_t *sys_info)
 
 #endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
 
+#ifdef CONFIG_U_QE
+	sys_info->freq_qe =  sys_info->freq_systembus / 2;
+#endif
+
 #else /* CONFIG_FSL_CORENET */
 	uint plat_ratio, e500_ratio, half_freq_systembus;
 	int i;
arch/powerpc/cpu/mpc85xx/t1040_ids.c +1 -0
index 68160a9..1034cd4 100644
@@ -46,6 +46,7 @@ struct liodn_id_table liodn_tbl[] = {
 	SET_DMA_LIODN(2, 227),
 
 	/* SET_NEXUS_LIODN(557), -- not yet implemented */
+	SET_QE_LIODN(559),
 };
 int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
 
arch/powerpc/include/asm/config_mpc85xx.h +3 -0
index 9a20b97..943ca6f 100644
@@ -734,6 +734,9 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 #define CONFIG_SYS_FSL_ERRATUM_A006261
 #define CONFIG_SYS_CCSRBAR_DEFAULT	0xfe000000
+#define QE_MURAM_SIZE          0x6000UL
+#define MAX_QE_RISC            1
+#define QE_NUM_OF_SNUM         28
 
 #elif defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T2081)
 #define CONFIG_E6500
arch/powerpc/include/asm/fsl_liodn.h +4 -0
index 44bc88d..f658bcb 100644
@@ -99,6 +99,10 @@ extern void fdt_fixup_liodn(void *blob);
 	SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
 		CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
 
+#define SET_QE_LIODN(liodn) \
+	SET_GUTS_LIODN("fsl,qe", liodn, qeliodnr,\
+		CONFIG_SYS_MPC85xx_QE_OFFSET)
+
 #define SET_QMAN_LIODN(liodn) \
 	SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \
 		CONFIG_SYS_FSL_QMAN_OFFSET, \
arch/powerpc/include/asm/immap_85xx.h +4 -1
index 4b6f9d0..4bda0f1 100644
@@ -1889,7 +1889,9 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
 	u32	sata2liodnr;	/* SATA 2 LIODN */
 	u32	sata3liodnr;	/* SATA 3 LIODN */
 	u32	sata4liodnr;	/* SATA 4 LIODN */
-	u8	res22[32];
+	u8      res22[24];
+	u32     qeliodnr;       /* QE LIODN */
+	u8      res_57c[4];
 	u32	dma1liodnr;	/* DMA 1 LIODN */
 	u32	dma2liodnr;	/* DMA 2 LIODN */
 	u32	dma3liodnr;	/* DMA 3 LIODN */
@@ -2877,6 +2879,7 @@ struct ccsr_pman {
 #define CONFIG_SYS_MPC85xx_LBC_OFFSET		0x124000
 #define CONFIG_SYS_MPC85xx_IFC_OFFSET		0x124000
 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET		0x130000
+#define CONFIG_SYS_MPC85xx_QE_OFFSET		0x140000
 #define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET	0x1e0000
 #if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && !defined(CONFIG_PPC_B4860)\
 	&& !defined(CONFIG_PPC_B4420)
drivers/qe/qe.h +2 -0
index c82ac7b..ebb7c5f 100644
@@ -282,5 +282,7 @@ int qe_set_mii_clk_src(int ucc_num);
 int qe_upload_firmware(const struct qe_firmware *firmware);
 struct qe_firmware_info *qe_get_firmware_info(void);
 void ft_qe_setup(void *blob);
+void qe_init(uint qe_base);
+void qe_reset(void);
 
 #endif /* __QE_H__ */
Signature · 1 line
1.8.5
#2 lore raw

PATCH v7 2/3 QE/U-QE: Add U-QE support

Quoted 9 lines · Zhao Qiang

Modify code to adapt to both u-qe and qe.

U_QE is a kind of cutted QE.
the differences between U_QE and QE
1. UCC: U_QE supports 2 UCCs while QE supports up to 8 UCCs.
2. IMMR: have different immr base addr.
3. iopin: U_QE doesn't need to config iopin.

Quoted 14 lines

---
Changes for v2:
- modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR
Changes for v3:
- use CONFIG_U_QE instead of CONFIG_PPC_T1040
Changes for v4:
- ifdef CONFIG_U_QE, include "../../../../drivers/qe/qe.h"
Changes for v5:
- no
Changes for v6:
- rebase
Changes for v7:
- split to two patches, the one to support u-qe and the other is to add u-qe to t1040qds

Applied to u-boot-mpc85xx/master, thanks.

York

author
#3 lore raw

PATCH v7 3/3 T1040QDS/U-QE: Add u-qe support to t1040qds

In reply to Zhao Qiang

Add u-qe support for t1040qds

---
Changes for v2:
- modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR
Changes for v3:
- use CONFIG_U_QE instead of CONFIG_PPC_T1040
Changes for v4:
- ifdef CONFIG_U_QE, include "../../../../drivers/qe/qe.h"
Changes for v5:
- no
Changes for v6:
- rebase
Changes for v7:
- split to two patches, the one to support u-qe and the other is to add u-qe to t1040qds

 board/freescale/t1040qds/t1040qds.c | 27 +++++++++++++++++++++++++++
 include/configs/T1040QDS.h          |  3 +++
 2 files changed, 30 insertions(+)
board/freescale/t1040qds/t1040qds.c +27 -0
index 3dec447..d50ad42 100644
@@ -18,6 +18,7 @@
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
 #include <fm_eth.h>
+#include <hwconfig.h>
 
 #include "../common/qixis.h"
 #include "t1040qds.h"
@@ -89,6 +90,30 @@ int select_i2c_ch_pca9547(u8 ch)
 	return 0;
 }
 
+static void qe_board_setup(void)
+{
+	u8 brdcfg15, brdcfg9;
+
+	if (hwconfig("qe") && hwconfig("tdm")) {
+		brdcfg15 = QIXIS_READ(brdcfg[15]);
+		/*
+		 * TDMRiser uses QE-TDM
+		 * Route QE_TDM signals to TDM Riser slot
+		 */
+		QIXIS_WRITE(brdcfg[15], brdcfg15 | 7);
+	} else if (hwconfig("qe") && hwconfig("uart")) {
+		brdcfg15 = QIXIS_READ(brdcfg[15]);
+		brdcfg9 = QIXIS_READ(brdcfg[9]);
+		/*
+		 * Route QE_TDM signals to UCC
+		 * ProfiBus controlled by UCC3
+		 */
+		brdcfg15 &= 0xfc;
+		QIXIS_WRITE(brdcfg[15], brdcfg15 | 2);
+		QIXIS_WRITE(brdcfg[9], brdcfg9 | 4);
+	}
+}
+
 int board_early_init_r(void)
 {
 #ifdef CONFIG_SYS_FLASH_BASE
@@ -196,6 +221,8 @@ int misc_init_r(void)
 		}
 	}
 
+	qe_board_setup();
+
 	return 0;
 }
 
include/configs/T1040QDS.h +3 -0
index 84213b8..0340bb4 100644
@@ -595,6 +595,8 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_DPAA_PME
 
+#define CONFIG_QE
+#define CONFIG_U_QE
 /* Default address of microcode for the Linux Fman driver */
 #if defined(CONFIG_SPIFLASH)
 /*
@@ -617,6 +619,7 @@ unsigned long get_board_ddr_clk(void);
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 #define CONFIG_SYS_FMAN_FW_ADDR		0xEFF00000
+#define CONFIG_SYS_QE_FW_ADDR		0xEFF10000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
Signature · 1 line
1.8.5
#4 lore raw

PATCH v7 3/3 T1040QDS/U-QE: Add u-qe support to t1040qds

Quoted 34 lines · Zhao Qiang

Add u-qe support for t1040qds

---
Changes for v2:
- modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR
Changes for v3:
- use CONFIG_U_QE instead of CONFIG_PPC_T1040
Changes for v4:
- ifdef CONFIG_U_QE, include "../../../../drivers/qe/qe.h"
Changes for v5:
- no
Changes for v6:
- rebase
Changes for v7:
- split to two patches, the one to support u-qe and the other is to add u-qe to t1040qds

 board/freescale/t1040qds/t1040qds.c | 27 +++++++++++++++++++++++++++
 include/configs/T1040QDS.h          |  3 +++
 2 files changed, 30 insertions(+)
board/freescale/t1040qds/t1040qds.c +1 -0
index 3dec447..d50ad42 100644
@@ -18,6 +18,7 @@
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
 #include <fm_eth.h>
+#include <hwconfig.h>
 
 #include "../common/qixis.h"
 #include "t1040qds.h"

board/freescale/t1040qds/t1040qds.c int select_i2c_ch_pca9547(u8 ch) · line 97

Quoted 8 lines
board/freescale/t1040qds/t1040qds.c +5 -0
@@ -89,6 +90,30 @@ int select_i2c_ch_pca9547(u8 ch)
 	return 0;
 }
 
+static void qe_board_setup(void)
+{
+	u8 brdcfg15, brdcfg9;
+
+	if (hwconfig("qe") && hwconfig("tdm")) {

This is called before environmental variables are relocated to DDR. It will cause a warning. Please use hwconfig_f.

York

#5 lore raw

PATCH v7 3/3 T1040QDS/U-QE: Add u-qe support to t1040qds

Quoted 12 lines · York Sun

board/freescale/t1040qds/t1040qds.c int select_i2c_ch_pca9547(u8 ch) · line 97

Quoted 6 lines · Zhao Qiang
board/freescale/t1040qds/t1040qds.c +5 -0
+static void qe_board_setup(void)
+{
+	u8 brdcfg15, brdcfg9;
+
+	if (hwconfig("qe") && hwconfig("tdm")) {

This is called before environmental variables are relocated to DDR. It will cause a warning. Please use hwconfig_f.

Please fix this patch with a new version. No need to submit other patches in this set.

York

#6 lore raw

PATCH v7 3/3 T1040QDS/U-QE: Add u-qe support to t1040qds

Quoted 22 lines · York Sun

-----Original Message-----
From: Sun York-R58495
Sent: Thursday, April 17, 2014 7:03 AM
To: Zhao Qiang-B45475; u-boot at lists.denx.de
Cc: Xie Xiaobo-R63061
Subject: Re: [U-Boot] [PATCH v7 3/3] T1040QDS/U-QE: Add u-qe support to t1040qds

Quoted 12 lines · York Sun

board/freescale/t1040qds/t1040qds.c int select_i2c_ch_pca9547(u8 ch) · line 97

Quoted 6 lines · Zhao Qiang
board/freescale/t1040qds/t1040qds.c +5 -0
+static void qe_board_setup(void)
+{
+	u8 brdcfg15, brdcfg9;
+
+	if (hwconfig("qe") && hwconfig("tdm")) {

This is called before environmental variables are relocated to DDR. It will cause a warning. Please use hwconfig_f.

Quoted 2 lines

Please fix this patch with a new version. No need to submit other patches in this set.

This upstream patch, qe_board_setup() is called in misc_init_r , it is correct, Doesn't need to change.

Quoted 3 lines

York

Regards,
Zhao Qiang

#7 lore raw

PATCH v7 3/3 T1040QDS/U-QE: Add u-qe support to t1040qds

Quoted 24 lines · On 04/16/2014 06:39 PM, Zhao Qiang-B45475 wrote:
Quoted 22 lines · York Sun

-----Original Message-----
From: Sun York-R58495
Sent: Thursday, April 17, 2014 7:03 AM
To: Zhao Qiang-B45475; u-boot at lists.denx.de
Cc: Xie Xiaobo-R63061
Subject: Re: [U-Boot] [PATCH v7 3/3] T1040QDS/U-QE: Add u-qe support to t1040qds

Quoted 12 lines · York Sun

board/freescale/t1040qds/t1040qds.c int select_i2c_ch_pca9547(u8 ch) · line 97

Quoted 6 lines · Zhao Qiang
board/freescale/t1040qds/t1040qds.c +5 -0
+static void qe_board_setup(void)
+{
+	u8 brdcfg15, brdcfg9;
+
+	if (hwconfig("qe") && hwconfig("tdm")) {

This is called before environmental variables are relocated to DDR. It will cause a warning. Please use hwconfig_f.

Quoted 6 lines
Quoted 2 lines

Please fix this patch with a new version. No need to submit other patches in this set.

This upstream patch, qe_board_setup() is called in misc_init_r , it is correct, Doesn't need to change.

OK. Thanks.

York

#8 lore raw

PATCH v7 3/3 T1040QDS/U-QE: Add u-qe support to t1040qds

In reply to Zhao Qiang
Quoted 17 lines · Zhao Qiang

Add u-qe support for t1040qds

---
Changes for v2:
- modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR
Changes for v3:
- use CONFIG_U_QE instead of CONFIG_PPC_T1040
Changes for v4:
- ifdef CONFIG_U_QE, include "../../../../drivers/qe/qe.h"
Changes for v5:
- no
Changes for v6:
- rebase
Changes for v7:
- split to two patches, the one to support u-qe and the other is to add u-qe to t1040qds

Applied to u-boot-mpc85xx/master, thanks.

York

#9 lore raw

PATCH v7 1/3 QE/FMAN: modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR

In reply to Zhao Qiang
Quoted 5 lines · Zhao Qiang

CONFIG_SYS_QE_FMAN_FW_ADDR is used to both Fman and QE for microcode address. Now using CONFIG_SYS_FMAN_FW_ADDR for Fman microcode address,
and CONFIG_SYS_QE_FW_ADDR for QE microcode address.

Quoted 14 lines

---
Changes for v2:
- no
Changes for v3:
- no
Changes for v4:
- no
Changes for v5:
- modify CONFIG_SYS_QE_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR for kmp204x
Changes for v6:
- rebase
Changes for v7:
- no

Applied to u-boot-mpc85xx/master, thanks.

York