Add PCI USB DT support for R8A7790/Lager reference board

Hello.

Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-v3.14-20140403' tag. Here we add the PCI USB device tree support on the R8A7790/Lager reference board. The patchset requires the 'pci-rcar-gen2' driver device tree support (just re-posted) in order to work.

[1/2] ARM: shmobile: r8a7790: add internal PCI bridge nodes [2/2] ARM: shmobile: lager: enable internal PCI

WBR, Sergei

From: Ben Dooks <[email protected]>

Add device nodes for the R8A7790 internal PCI bridge devices.

---
Changes in version 2:
- reworded summary (fixing typo) and changelog;
- removed extra spaces before {;
- refreshed the patch.

 arch/arm/boot/dts/r8a7790.dtsi |   39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7790.dtsi
===================================================================
@@ -820,4 +820,43 @@
 		#size-cells = <0>;
 		status = "disabled";
 	};
+
+	pci0: pci at ee090000 {
+		compatible = "renesas,pci-r8a7790";
+		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+		reg = <0x0 0xee090000 0x0 0xc00>,
+		      <0x0 0xee080000 0x0 0x1100>;
+		interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+
+		bus-range = <0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+	};
+
+	pci1: pci at ee0b0000 {
+		compatible = "renesas,pci-r8a7790";
+		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+		reg = <0x0 0xee0b0000 0x0 0xc00>,
+		      <0x0 0xee0a0000 0x0 0x1100>;
+		interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+
+		bus-range = <1 1>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+	};
+
+	pci2: pci at ee0d0000 {
+		compatible = "renesas,pci-r8a7790";
+		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+		reg = <0x0 0xee0d0000 0x0 0xc00>,
+		      <0x0 0xee0c0000 0x0 0x1100>;
+		interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+
+		bus-range = <2 2>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+	};
 };

From: Ben Dooks <[email protected]>

Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached to them.

---
Changes in version 2:
- enabled PCI0 device;
- reworded summary and changelog;
- refreshed the patch.

 arch/arm/boot/dts/r8a7790-lager.dts |   33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7790-lager.dts
===================================================================
@@ -199,6 +199,21 @@
 				 "msiof1_tx";
 		renesas,function = "msiof1";
 	};
+
+	usb0_pins: usb0 {
+		renesas,groups = "usb0";
+		renesas,function = "usb0";
+	};
+
+	usb1_pins: usb1 {
+		renesas,groups = "usb1";
+		renesas,function = "usb1";
+	};
+
+	usb2_pins: usb2 {
+		renesas,groups = "usb2";
+		renesas,function = "usb2";
+	};
 };
 
 &ether {

@@ -297,3 +312,21 @@
 	cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
 	status = "okay";
 };
+
+&pci0 {
+	status = "okay";
+	pinctrl-0 = <&usb0_pins>;
+	pinctrl-names = "default";
+};
+
+&pci1 {
+	status = "okay";
+	pinctrl-0 = <&usb1_pins>;
+	pinctrl-names = "default";
+};
+
+&pci2 {
+	status = "okay";
+	pinctrl-0 = <&usb2_pins>;
+	pinctrl-names = "default";
+};

Hi Sergei,

Thanks for your efforts. It is good to see that you are caring for both r8a7790 and r8a7791 now.

By the way, have you decided how to use DT with the PHY driver? Just integrating this portion seems of the hardware seems insufficient to me.

I believe the PHY driver is also needed in the system for correct runtime configuration of USB0 and USB2. So DT support is needed for multiple drivers for correct operation in the DT case. Regardless it is of course good to see DT support for this hardware block but it would be useful to have a good overview of DT support for all components involved in USB Host support to avoid committing to a premature half-baked ABI.

/ magnus

Hello.

Yes, I have written the new driver for the generic PHY framework,
supporting DT probing. I'm going to post it today -- I lacked the time to post all at once.
This new driver (and some additional patches) provides for doing what
you've indicated to be the desirable behavior, i.e. configuring the PHY's UGCTRL2 register depending on what kind of USB driver gets loaded. I hope you will be able to use my patches for your further work on USB DT support.

WBR, Sergei

Hi Sergei,

Thanks, that's very nice to hear. I'm looking forward to see how the pieces fit together!

Cheers,

/ magnus