Add support for the Cortex A5 global timer
Subsystems (6)
v2 cover Add support for the Cortex A5 global timer
This patch series adds support for the global timer with the Cortex A5. This is relatively simple patch series and mainly consists of:
- Update a check in the drive probe code for an unusable global timer to be non-specific to the A9.
- Add the appropriate device tree node and Kconfig options.
- Add a compatible node for the specific A5 global timer in the DT binding.
Changes since v1
================
- Retain information in the DT binding documentation that the driver will only work on a A9 r0p2 and above.
Any comments welcome.
Matt
Matthew Leach (4):
clocksource: arm_global_timer: Only check for unusable timer on A9
documentaion: DT: allow a A5 compatible string in global timer
dts: ca5: add the global timer for the A5
KConfig: Vexpress: build the ARM_GLOBAL_TIMER with vexpress platform
Documentation/devicetree/bindings/arm/global_timer.txt | 7 +++++-- arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 10 +++++++++- arch/arm/mach-vexpress/Kconfig | 1 + drivers/clocksource/arm_global_timer.c | 5 +++-- 4 files changed, 18 insertions(+), 5 deletions(-)
Signature · 1 line
1.8.5.3
PATCH v2 1/4 clocksource: arm_global_timer: Only check for unusable timer on A9
The check for a usable global timer in the probe code does not enquire which CPU we are currently running on. This can cause the driver to incorrectly assume we have an unusable global timer if we are running on a CPU other than A9.
Before checking the CPU revision, ensure we are running on an A9 CPU.
--- drivers/clocksource/arm_global_timer.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
drivers/clocksource/arm_global_timer.c +3 -2
@@ -246,11 +246,12 @@ static void __init global_timer_of_register(struct device_node *np)int err =0 ;/* -* In r2p0 the comparators for each processor with the global timer +* In A9 r2p0 the comparators for each processor with the global timer * fire when the timer value is greater than or equal to. In previous * revisions the comparators fired when the timer value was equal to. */ -if ((read_cpuid_id () &0xf0000f ) <0x200000 ) { +if (read_cpuid_part_number () ==ARM_CPU_PART_CORTEX_A9 + && (read_cpuid_id () &0xf0000f ) <0x200000 ) {pr_warn ("global-timer: non support for this cpu version.\n" );return ; }
Signature · 1 line
1.8.5.3
PATCH v2 1/4 clocksource: arm_global_timer: Only check for unusable timer on A9
Quoted 22 lines · Matthew Leach
The check for a usable global timer in the probe code does not enquire which CPU we are currently running on. This can cause the driver to incorrectly assume we have an unusable global timer if we are running on a CPU other than A9.
Before checking the CPU revision, ensure we are running on an A9 CPU.
Acked-by Will Deacon <[email protected]>Signed-off-by Matthew Leach <[email protected]>--- drivers/clocksource/arm_global_timer.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)drivers/clocksource/arm_global_timer.c +0
-1@@ -246,11 +246,12 @@ static void __init global_timer_of_register(struct device_node *np)int err =0 ;/* -* In r2p0 the comparators for each processor with the global timer
drivers/clocksource/arm_global_timer.c static void __init global_timer_of_register(struct device_node *np) · line 257
Quoted 10 lines
drivers/clocksource/arm_global_timer.c +3
-1+* In A9 r2p0 the comparators for each processor with the global timer * fire when the timer value is greater than or equal to. In previous * revisions the comparators fired when the timer value was equal to. */ -if ((read_cpuid_id () &0xf0000f ) <0x200000 ) { +if (read_cpuid_part_number () ==ARM_CPU_PART_CORTEX_A9 + && (read_cpuid_id () &0xf0000f ) <0x200000 ) {pr_warn ("global-timer: non support for this cpu version.\n" );return ; }
Applied on my tree for 3.16
Signature · 5 lines
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PATCH v2 2/4 documentaion: DT: allow a A5 compatible string in global timer
In reply to Matthew LeachThe global timer is present on the Cortex A5. Add a compatibility string to the DT binding to allow a Cortex A5 global timer.
--- Documentation/devicetree/bindings/arm/global_timer.txt | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/arm/global_timer.txt +5 -2
@@ -4,8 +4,11 @@ ** Timer node required properties: -- compatible : Should be "arm,cortex-a9-global-timer" - Driver supports versions r2p0 and above. +- compatible : should contain + * "arm,cortex-a5-global-timer" for Cortex-A5 global timers. + * "arm,cortex-a9-global-timer" for Cortex-A9 global + timers or any compatible implementation. Note: driver + supports versions r2p0 and above. - interrupts : One interrupt to each core
Signature · 1 line
1.8.5.3
PATCH v2 2/4 documentaion: DT: allow a A5 compatible string in global timer
Quoted 4 lines · Matthew Leach
The global timer is present on the Cortex A5. Add a compatibility string to the DT binding to allow a Cortex A5 global timer.
Signed-off-by Matthew Leach <[email protected]>
Quoted 26 lines
--- Documentation/devicetree/bindings/arm/global_timer.txt | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)Documentation/devicetree/bindings/arm/global_timer.txt +5
-3@@ -4,8 +4,11 @@ ** Timer node required properties: -- compatible : Should be "arm,cortex-a9-global-timer" - Driver supports versions r2p0 and above. +- compatible : should contain + * "arm,cortex-a5-global-timer" for Cortex-A5 global timers. + * "arm,cortex-a9-global-timer" for Cortex-A9 global + timers or any compatible implementation. Note: driver + supports versions r2p0 and above. - interrupts : One interrupt to each core --1.8.5.3
PATCH v2 3/4 dts: ca5: add the global timer for the A5
In reply to Matthew LeachThe Cortex A5 contains a global timer: add the appropriate device tree node.
--- arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
arch/arm/boot/dts/vexpress-v2p-ca5s.dts +9 -1
@@ -88,6 +88,14 @@ interrupts = <1 13 0x304>; }; + timer at 2c000200 { + compatible = "arm,cortex-a5-global-timer", + "arm,cortex-a9-global-timer"; + reg = <0x2c000200 0x20>; + interrupts = <1 11 0x304>; + clocks = <&oscclk0>; + }; + watchdog at 2c000620 { compatible = "arm,cortex-a5-twd-wdt"; reg = <0x2c000620 0x20>;
@@ -120,7 +128,7 @@ compatible = "arm,vexpress,config-bus"; arm,vexpress,config-bridge = <&v2m_sysreg>; - osc at 0 { + oscclk0: osc at 0 { /* CPU and internal AXI reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 0>;
Signature · 1 line
1.8.5.3
PATCH v2 4/4 KConfig: Vexpress: build the ARM_GLOBAL_TIMER with vexpress platform
In reply to Matthew LeachThe Cortex A5 now contains bindings for the global timer driver. Ensure that the driver is built with a vexpress platform.
--- arch/arm/mach-vexpress/Kconfig | 1 + 1 file changed, 1 insertion(+)
arch/arm/mach-vexpress/Kconfig +1 -0
@@ -4,6 +4,7 @@ config ARCH_VEXPRESS select ARCH_SUPPORTS_BIG_ENDIAN select ARM_AMBA select ARM_GIC + select ARM_GLOBAL_TIMER select ARM_TIMER_SP804 select COMMON_CLK select COMMON_CLK_VERSATILE
Signature · 1 line
1.8.5.3