ARM: OMAP2+: AM437x: L2 cache support
Subsystems (3)
v3 cover ARM: OMAP2+: AM437x: L2 cache support
This patch series adds L2 cache support for AM437x and does some clean-ups for existing OMAP4 support along the way (no functional changes). On OMAP4 Panda, the Aux control value remains 0x7e470000 before and after the series.
Tested on OMAP4 Panda and AM437x EPOS EVMs.
It is based on RMK's 75 patch series titled "l2c series" +
the patch contained in https://www.mail-archive.com/linux-omap at vger.kernel.org/msg103439.html
Sekhar Nori (3):
ARM: OMAP2+: L2 cache: get rid of init call
ARM: OMAP2+: L2 cache: git rid of redundant cache replacement policy
setting
ARM: OMAP2+: AM43x: L2 cache support
arch/arm/mach-omap2/Kconfig | 1 + arch/arm/mach-omap2/common.h | 1 + arch/arm/mach-omap2/io.c | 2 ++ arch/arm/mach-omap2/omap4-common.c | 17 ++++------------- 4 files changed, 8 insertions(+), 13 deletions(-)
Signature · 1 line
1.7.10.1
PATCH v3 1/3 ARM: OMAP2+: L2 cache: get rid of init call
Get rid of init call to initialize L2 cache. Instead use the init_early machine hook. This helps in using the initialization routine across SoCs without the need of ugly cpu_is_*() checks.
--- arch/arm/mach-omap2/common.h | 1 + arch/arm/mach-omap2/io.c | 1 + arch/arm/mach-omap2/omap4-common.c | 10 +--------- 3 files changed, 3 insertions(+), 9 deletions(-)
arch/arm/mach-omap2/common.h +1 -0
@@ -91,6 +91,7 @@ extern void omap3_sync32k_timer_init(void);extern void omap3_secure_sync32k_timer_init (void );extern void omap3_gptimer_timer_init (void );extern void omap4_local_timer_init (void ); +int omap_l2_cache_init (void );extern void omap5_realtime_timer_init (void );void omap2420_init_early (void );
arch/arm/mach-omap2/io.c +1 -0
@@ -640,6 +640,7 @@ void __init omap4430_init_early(void)omap44xx_clockdomains_init ();omap44xx_hwmod_init ();omap_hwmod_init_postsetup (); +omap_l2_cache_init (); omap_clk_soc_init = omap4xxx_dt_clk_init; }
arch/arm/mach-omap2/omap4-common.c +1 -9
@@ -196,17 +196,10 @@ static void omap4_l2c310_write_sec(unsigned long val, unsigned reg)omap_smc1 (smc_op, val); } -static int __init omap_l2_cache_init (void ) +int __init omap_l2_cache_init (void ) {u32 aux_ctrl; -/* -* To avoid code running on other OMAPs in -* multi-omap builds -*/ -if (!cpu_is_omap44xx ()) -return -ENODEV ; -/* Static mapping, never released */ l2cache_base =ioremap (OMAP44XX_L2CACHE_BASE ,SZ_4K );if (WARN_ON (!l2cache_base))
@@ -226,7 +219,6 @@ static int __init omap_l2_cache_init(void) return 0; } -omap_early_initcall (omap_l2_cache_init);#endif void __iomem *omap4_get_sar_ram_base (void )
Signature · 1 line
1.7.10.1
PATCH v3 2/3 ARM: OMAP2+: L2 cache: git rid of redundant cache replacement policy setting
In reply to Sekhar NoriL2 cache initialization for OMAP4 redundantly sets the cache policy to Round-Robin. This is not needed since thats the PL310 default anyway.
Removing this reduces the number of platform specific aux control settings.
--- arch/arm/mach-omap2/omap4-common.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)
arch/arm/mach-omap2/omap4-common.c +3 -4
@@ -206,16 +206,15 @@ int __init omap_l2_cache_init(void)return -ENOMEM ;/* 16-way associativity, parity disabled, way size - 64KB (es2.0 +) */ - aux_ctrl =L310_AUX_CTRL_CACHE_REPLACE_RR | -L2C_AUX_CTRL_SHARED_OVERRIDE | + aux_ctrl =L2C_AUX_CTRL_SHARED_OVERRIDE |L310_AUX_CTRL_DATA_PREFETCH |L310_AUX_CTRL_INSTR_PREFETCH ; outer_cache.write_sec = omap4_l2c310_write_sec;if (of_have_populated_dt ()) -l2x0_of_init (aux_ctrl,0xcd9fffff ); +l2x0_of_init (aux_ctrl,0xcf9fffff );else -l2x0_init (l2cache_base, aux_ctrl,0xcd9fffff ); +l2x0_init (l2cache_base, aux_ctrl,0xcf9fffff );return 0 ; }
Signature · 1 line
1.7.10.1
PATCH v3 3/3 ARM: OMAP2+: AM43x: L2 cache support
In reply to Sekhar NoriAdd support for L2 cache controller (PL310) on
AM437x SoC.
--- arch/arm/mach-omap2/Kconfig | 1 + arch/arm/mach-omap2/io.c | 1 + 2 files changed, 2 insertions(+)
arch/arm/mach-omap2/Kconfig +1 -0
@@ -65,6 +65,7 @@ config SOC_AM43XX select ARCH_HAS_OPP select ARM_GIC select MACH_OMAP_GENERIC + select MIGHT_HAVE_CACHE_L2X0 config SOC_DRA7XX bool "TI DRA7XX"
arch/arm/mach-omap2/io.c +1 -0
@@ -609,6 +609,7 @@ void __init am43xx_init_early(void)am43xx_clockdomains_init ();am43xx_hwmod_init ();omap_hwmod_init_postsetup (); +omap_l2_cache_init (); omap_clk_soc_init = am43xx_dt_clk_init; }
Signature · 1 line
1.7.10.1
v3 cover ARM: OMAP2+: AM437x: L2 cache support
In reply to Sekhar NoriQuoted 8 lines · Sekhar Nori
This patch series adds L2 cache support for AM437x and does some clean-ups for existing OMAP4 support along the way (no functional changes). On OMAP4 Panda, the Aux control value remains
0x7e470000before and after the series.Tested on OMAP4 Panda and AM437x EPOS EVMs.
Quoted 9 lines
It is based on RMK's 75 patch series titled "l2c series" +
the patch contained in https://www.mail-archive.com/linux-omap at vger.kernel.org/msg103439.htmlSekhar Nori (3):
ARM: OMAP2+: L2 cache: get rid of init call
ARM: OMAP2+: L2 cache: git rid of redundant cache replacement policy
setting
ARM: OMAP2+: AM43x: L2 cache support
For the whole series,
v3 cover ARM: OMAP2+: AM437x: L2 cache support
Quoted 12 lines · Santosh Shilimkar
Quoted 11 lines · Sekhar Nori
This patch series adds L2 cache support for AM437x and does some clean-ups for existing OMAP4 support along the way (no functional changes). On OMAP4 Panda, the Aux control value remains
0x7e470000before and after the series.Tested on OMAP4 Panda and AM437x EPOS EVMs.
It is based on RMK's 75 patch series titled "l2c series" +
the patch contained in https://www.mail-archive.com/linux-omap at vger.kernel.org/msg103439.html
Quoted 8 lines
Quoted 6 lines
Sekhar Nori (3):
ARM: OMAP2+: L2 cache: get rid of init call
ARM: OMAP2+: L2 cache: git rid of redundant cache replacement policy
setting
ARM: OMAP2+: AM43x: L2 cache supportFor the whole series,
Okay, as these depend on my series, I'll take them into my l2c branch, which I'll be pushing into linux-next from this evening.
Signature · 2 lines
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