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powerpc: Add support 2 stage boot loader for corenet platform

PATCH New Prabhakar Kushwaha 2 participants 2 messages Apr 8, 2014 – Apr 23, 2014

v2 of 4 New Latest is v4 →

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v2 cover powerpc: Add support 2 stage boot loader for corenet platform

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Add support of 2 stage boot loader in cornet platforms using SPL framework.
B4860QDS: NAND boot
T1040RDB: NAND, SD, SPI boot
T1042RDB_PI: NAND, SD, SPI boot

In current secenrio size of u-boot can become >=512KB. So This patch set will be helpful for those SoC which has less internal SRAM(512KB).

here, PBL initialise the internal SRAM and copy SPL(160KB) in SRAM. SPL further initialise DDR using SPD and environment variables and copy u-boot(768 KB) from flash to DDR.
Finally SPL transer control to u-boot for futher booting.

SPL has following features:
- Executes within 256K
- No relocation required

Run time view of SPL framework during boot :-
-----------------------------------------------
Area | Address |
-----------------------------------------------

 Secure boot | 0xFFFC0000 (32KB)               |
 headers     |                                 |

-----------------------------------------------
GD, BD | 0xFFFC8000 (4KB) |
-----------------------------------------------
ENV | 0xFFFC9000 (8KB) |
-----------------------------------------------
HEAP | 0xFFFCB000 (30KB) |
-----------------------------------------------
STACK | 0xFFFD8000 (22KB) |
-----------------------------------------------
U-boot SPL | 0xFFFD8000 (160KB) |
-----------------------------------------------

NAND Flash memory Map on T104xRDB
------------------------------------------
Start End Definition Size

0x000000	0x0FFFFF	u-boot                          1MB
0x180000	0x19FFFF	u-boot env                      128KB
0x200000	0x21FFFF	FMAN Ucode                      128KB

SD Card memory Map on T104xRDB
------------------------------------------
Block #blocks Definition Size

0x008		2048		u-boot                          1MB
0x800		0024		u-boot env                      8KB
0x820		0256		FMAN Ucode                      128KB

SPI Flash memory Map on T104xRDB
------------------------------------------
Start End Definition Size

0x000000	0x0FFFFF	u-boot                          1MB
0x100000	0x101FFF	u-boot env                      8KB
0x110000	0x12FFFF	FMAN Ucode                      128KB

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This patch set contains:-

[PATCH 1/10] powerpc/mpc85xx: Move LAW_EN define outside of config

[PATCH 2/10] powerpc/mpc85xx: Avoid hardcoding in SPL linker script

[PATCH 3/10] powerpc:Add support of SPL non-relocation

[PATCH 4/10] powerpc/mpc85xx:Disable non DDR LAWs before init_law

[PATCH 5/10] driver/ifc: define nand_spl_load_image() for SPL

[PATCH 6/10] driver/mtd/spi:Read 8KB data chunk during u-boot load in SPL

[PATCH 7/10] driver: Add support of image load for MMC & SPI in SPL

[PATCH 8/10] Makefile: Add support of RAMBOOT_SPLPBL

[PATCH 9/10] board/b4qds:Add support of 2 stage NAND boot-loader

[PATCH 10/10] board/t104xrdb: Add support of NAND, SD, SPI boot for T1040RDB

Signature · 1 line
1.7.9.5
#1 lore raw

v2 cover powerpc: Add support 2 stage boot loader for corenet platform

Quoted 18 lines · Prabhakar Kushwaha

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This patch set contains:-

[PATCH 1/10] powerpc/mpc85xx: Move LAW_EN define outside of config

[PATCH 2/10] powerpc/mpc85xx: Avoid hardcoding in SPL linker script

[PATCH 3/10] powerpc:Add support of SPL non-relocation

[PATCH 4/10] powerpc/mpc85xx:Disable non DDR LAWs before init_law

[PATCH 5/10] driver/ifc: define nand_spl_load_image() for SPL

[PATCH 6/10] driver/mtd/spi:Read 8KB data chunk during u-boot load in SPL

Quoted 8 lines

[PATCH 7/10] driver: Add support of image load for MMC & SPI in SPL

[PATCH 8/10] Makefile: Add support of RAMBOOT_SPLPBL

[PATCH 9/10] board/b4qds:Add support of 2 stage NAND boot-loader

[PATCH 10/10] board/t104xrdb: Add support of NAND, SD, SPI boot for T1040RDB

Applied to u-boot-mpc85xx/master, thanks.

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