Skip to contentSkip to conversation

powerpc/mpc85xx: SECURE BOOT- Add secure boot target for BSC9132QDS

PATCH New Aneesh Bansal 2 participants 2 messages Mar 11, 2014 – Apr 23, 2014 PowerPC

lore
Share & tools
lore

Aneesh Bansal

author
#0 lore raw

PATCH 1/1 powerpc/mpc85xx: SECURE BOOT- Add secure boot target for BSC9132QDS

Add NOR, SPI and SD secure boot targets for BSC9132QDS.

Changes:
- Debug TLB entry is not required for Secure Boot Target.

Signed-off-by Aneesh Bansal <[email protected]>
---
 arch/powerpc/cpu/mpc85xx/start.S           | 9 ++-------
 arch/powerpc/include/asm/fsl_secure_boot.h | 2 ++
 boards.cfg                                 | 6 ++++++
 include/configs/BSC9132QDS.h               | 2 ++
 4 files changed, 12 insertions(+), 7 deletions(-)
arch/powerpc/cpu/mpc85xx/start.S +2 -7
index 4ef0985..c692ba6 100644
@@ -461,7 +461,8 @@ nexti:	mflr	r1		/* R1 = our PC */
 2:	cmpw	r3, r4
 	blt	1b
 
-#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(MINIMAL_SPL)
+#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(MINIMAL_SPL) && \
+	!defined(CONFIG_SECURE_BOOT)
 /*
  * TLB entry for debuggging in AS1
  * Create temporary TLB entry in AS0 to handle debug exception

@@ -482,12 +483,6 @@ nexti:	mflr	r1		/* R1 = our PC */
 		0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR, \
 		0, r6
 
-#elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT)
-	create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB, \
-		0, BOOKE_PAGESZ_1M, \
-		CONFIG_SYS_MONITOR_BASE, MAS2_I|MAS2_G, \
-		CONFIG_SYS_PBI_FLASH_WINDOW, MAS3_SX|MAS3_SW|MAS3_SR, \
-		0, r6
 #else
 /*
  * TLB entry is created for IVPR + IVOR15 to map on valid OP code address
arch/powerpc/include/asm/fsl_secure_boot.h +2 -0
index 8f5bf10..c705d5a 100644
@@ -10,6 +10,8 @@
 #ifdef CONFIG_SECURE_BOOT
 #if defined(CONFIG_FSL_CORENET)
 #define CONFIG_SYS_PBI_FLASH_BASE		0xc0000000
+#elif defined(CONFIG_BSC9132QDS)
+#define CONFIG_SYS_PBI_FLASH_BASE		0xc8000000
 #else
 #define CONFIG_SYS_PBI_FLASH_BASE		0xce000000
 #endif
boards.cfg +6 -0
index cf2b1df..3e73d7e 100644
@@ -798,6 +798,12 @@ Active  powerpc     mpc85xx        -           freescale       bsc9132qds
 Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_SDCARD_DDRCLK133          BSC9132QDS:BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133                                                                                  Naveen Burmi <[email protected]>
 Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_SPIFLASH_DDRCLK100        BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100                                                                                Naveen Burmi <[email protected]>
 Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_SPIFLASH_DDRCLK133        BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133                                                                                Naveen Burmi <[email protected]>
+Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_NOR_DDRCLK100_SECURE      BSC9132QDS:BSC9132QDS,SYS_CLK_100_DDR_100,SECURE_BOOT                                                                             Aneesh Bansal <[email protected]>
+Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_NOR_DDRCLK133_SECURE      BSC9132QDS:BSC9132QDS,SYS_CLK_100_DDR_133,SECURE_BOOT                                                                             Aneesh Bansal <[email protected]>
+Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_SDCARD_DDRCLK100_SECURE   BSC9132QDS:BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100,SECURE_BOOT                                                                      Aneesh Bansal <[email protected]>
+Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_SDCARD_DDRCLK133_SECURE   BSC9132QDS:BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133,SECURE_BOOT                                                                      Aneesh Bansal <[email protected]>
+Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_SPIFLASH_DDRCLK100_SECURE BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100,SECURE_BOOT                                                                    Aneesh Bansal <[email protected]>
+Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_SPIFLASH_DDRCLK133_SECURE BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133,SECURE_BOOT                                                                    Aneesh Bansal <[email protected]>
 Active  powerpc     mpc85xx        -           freescale       c29xpcie            C29XPCIE                             C29XPCIE:C29XPCIE,36BIT                                                                                                           Po Liu <[email protected]>
 Active  powerpc     mpc85xx        -           freescale       c29xpcie            C29XPCIE_NAND                        C29XPCIE:C29XPCIE,36BIT,NAND                                                                                                      Po Liu <[email protected]>
 Active  powerpc     mpc85xx        -           freescale       c29xpcie            C29XPCIE_SPIFLASH                    C29XPCIE:C29XPCIE,36BIT,SPIFLASH                                                                                                  Po Liu <[email protected]>
include/configs/BSC9132QDS.h +2 -0
index 052a0f1..772e123 100644
@@ -696,4 +696,6 @@ combinations. this should be removed later
 
 #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
 
+#include <asm/fsl_secure_boot.h>
+
 #endif	/* __CONFIG_H */
Signature · 1 line
1.8.1.4
#1 lore raw

PATCH 1/1 powerpc/mpc85xx: SECURE BOOT- Add secure boot target for BSC9132QDS

Quoted 7 lines · Aneesh Bansal

Add NOR, SPI and SD secure boot targets for BSC9132QDS.

Changes:
- Debug TLB entry is not required for Secure Boot Target.

Signed-off-by Aneesh Bansal <[email protected]>

---

Applied to u-boot-mpc85xx/master, thanks.

York